Patents by Inventor Chun-Liang A. Chen

Chun-Liang A. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120295564
    Abstract: A general receiver device with adaptive filter includes an antenna, a low noise amplifier, a bandpass tracking filter, a single-ended-to-differential converter unit, a mixer, and an adaptive filter. The antenna receives an RF signal. The low noise amplifier amplifies the RF signal for generating an amplified RF signal. The band-pass tracking filter filters the amplified RF signal for generating a filtered RF signal. The single-ended-to-differential converter unit converts the filtered RF signal into a differential RF signal. The mixer receives a differential local oscillation signal and uses the differential local oscillation signal to down-convert the differential RF signal into a differential IF signal. The adaptive filter filters the differential IF signal for generating a filtered differential IF signal.
    Type: Application
    Filed: March 8, 2012
    Publication date: November 22, 2012
    Applicant: Sunplus Technology Co., Ltd.
    Inventor: Chun-Liang CHEN
  • Publication number: 20120293248
    Abstract: An active and configurable filter device includes a first filter with a first quality factor, a second filter with a second quality factor and a third filter with a third quality factor. The first filter defines a bandwidth and central frequency of the filter device. The second filter is connected to the first filter for using the spectrums of the first filter and second filter to define a lower bound frequency and sharpness of the bandwidth of the filter device. The third filter is connected to the second filter for using the spectrums of the first filter and third filter to define an upper bound frequency and sharpness of the bandwidth of the filter device. The first quality factor is an adjustable value in a range of 5 to 15, and the second and the third quality factors are each an adjustable value greater than 15.
    Type: Application
    Filed: March 22, 2012
    Publication date: November 22, 2012
    Applicant: Sunplus Technology Co., Ltd.
    Inventors: Chun-Liang CHEN, Hui-Chun HSU
  • Patent number: 8281631
    Abstract: A corrugated metal sheet member fabrication system formed of a material feeder, a roller-ramming unit, a cutting unit, a conveyer, and a finished product receiving rack is disclosed. When the reciprocating cutting-off device is moved forwards or backwards, the belt frame of the conveyer is synchronously moved to carry the movable frames forwards or backwards, and therefore the front driven roller and the rear driven roller with the conveying belt are moved with the movable frames forwards to the extended position or backwards to the retrieved position. After the movable frames has been moved forwards, the front side of the conveying belt is kept spaced above the base for receiving finished products from the reciprocating cutting-off device of the cutting unit and delivering collected finished products to the finished product receiving rack.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: October 9, 2012
    Inventor: Chun-Liang Chen
  • Patent number: 8249667
    Abstract: A wireless communication terminal includes a battery module, a monitor module, a battery-capacitance update module, and a display module. The monitor module detects a working state of the wireless communication terminal including idle and communication states, periodically detects and records a voltage of the battery module, calculates dynamic average voltages of the battery module in the idle and communication states, and subtracts the dynamic average voltages in the idle and communication states to calculate a dynamic voltage compensation of the battery module in the communication state. The battery-capacitance update module includes a timer, and detects a voltage of the battery module after the timer has timed out, compensates the detected voltage with the dynamic voltage compensation when in the communication state, and reads battery capacitance of the battery module according to the compensated voltage. The display module displays the battery capacitance.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: August 21, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chun-Liang Chen
  • Publication number: 20120182704
    Abstract: An electronic device including a conductive element, a conductive layer, and a case is provided. The case has a surface, a first supporting member, and a second supporting member. The first supporting member and the second supporting member are disposed on the surface, and the first supporting member has a suspending arm. The case, the first supporting member and the second supporting member are integrally formed, and the conductive layer exists on the surface of the case, the first supporting member, and the second supporting member. The conductive element presses the first suspending arm to contact the second supporting member, such that a ground circuit is formed with the conductive element, the first suspending arm, the second supporting member, and the surface.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 19, 2012
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Lee, Ching-Jen Wang, Yu-Ti Kuo, Chun-Liang Chen
  • Publication number: 20120084594
    Abstract: A USB device with a clock calibration function and a method for calibrating reference clocks of a USB device are provided. A USB 2.0 initial calibration is performed on the USB device in order to control an embedded oscillator (EMOSC) of the USB device to output a first reference clock compliance USB 2.0 specification and USB 3.0 specification during the initialization phase. After that, a USB 3.0 on-line calibration is performed on the USB device in order to control the EMOSC of the USB device to calibrate a second reference clock during a super-speed mode of USB 3.0 specification.
    Type: Application
    Filed: January 16, 2011
    Publication date: April 5, 2012
    Inventors: Chun-Liang Chen, Yi-Le Yang, Yu-Cheng Lo
  • Patent number: 8076962
    Abstract: In a frequency synthesis system with self-calibrated loop stability and bandwidth, a detector produces a detection signal based on a difference between an input signal and a feedback signal; a charge pump produces a control signal based on the detection signal; a filter produces a tuning signal and a source current based on the control signal; a bias circuit produces first and second bias signals; a controllable oscillator produces a differential output signal with a selected specific frequency; a differential-to-single converter produces an output signal with the selected specific frequency; a programmable frequency divider produces the feedback signal; a current mirror circuit receives the source current for producing a mirror current; a compensation circuit produces a compensation current based on the mirror current for compensating the variation of the damping factor and the bandwidth-to-reference frequency ratio.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: December 13, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Chun-Liang Chen, Hui-Chun Hsu
  • Patent number: 8073513
    Abstract: A wireless communication device includes an earphone, a frequency modulation integrated circuit, a microphone, an analog switch, and a main processor. The main processor includes a software amplifier operable to amplify signals from the analog switch and output the amplified signals. The wireless communication device amplifies audio signals by the software amplifier of the main processor.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: December 6, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chun-Liang Chen
  • Patent number: 8067988
    Abstract: A low jitter and wide-range frequency synthesizer for low voltage operation includes a detector to generate a detection signal based on a logic level difference between an input signal and a feedback signal, a charge pump to generate a control signal based on the detection signal, a filter to generate a tuning signal based on the control signal, a bias circuit to generate a first bias signal and a second bias signal based on the tuning signal, a controllable oscillator to generate a differential output signal based on the first and the second bias signals, a differential to single ended converter to convert the differential output signal into an output signal, and a programmable frequency divider to generate the feedback signal based on the output signal.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: November 29, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventors: Chun-Liang Chen, Hui-Chun Hsu
  • Publication number: 20110214004
    Abstract: A packaged circuit includes an internal circuit, an embedded clock generator, a plurality of multi-function pins and a control pad. The embedded clock generator is for generating an internal clock. The pins include a clock output pin and a clock input pin. The clock output pin outputs the internal clock generated by the embedded clock generator. The clock input pin is for receiving an external clock. The control pad receives a control signal to determine whether the internal circuit utilizes a system clock according to the internal clock generated by the embedded clock generator or the external clock received by the clock input pin.
    Type: Application
    Filed: March 24, 2010
    Publication date: September 1, 2011
    Inventors: Yi-Le Yang, Chun-Liang Chen, Yu-Cheng Lo
  • Publication number: 20110111811
    Abstract: A mobile phone power supply circuit for a mobile phone, including a super capacitor, a photovoltaic module, a comparator, a battery power source, and a single-pole-double-throw (SPDT) switch. The photovoltaic module buffers solar power in the super capacitor. The comparator compares voltage of the super capacitor and a reference voltage and outputs a control signal according to the comparison. The SPDT switch selects either the super capacitor or the battery power source to supply power to the mobile phone according to the control signal.
    Type: Application
    Filed: December 30, 2009
    Publication date: May 12, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: JR-FU JUANG, WEN-CHING HSIAO, WEN-FENG HU, CHUN-LIANG CHEN
  • Patent number: 7940097
    Abstract: An all digital phase locked loop circuit includes a reference frequency indicator for receiving a reference signal with a reference frequency and generating a frequency indicating value; a phase frequency detector for comparing the reference signal with a frequency divided signal and generating a phase difference pulse; a time-to-digital circuit for receiving the phase difference pulse and a plurality of output signals and generating a phase difference value; a digital controller for receiving the frequency indicating value and the phase difference value and generating a control value; a delta-sigma modulator for modulating the control value and generating a modulated control value; a DCO for receiving the modulated control value and generating an output oscillating signal with a digital controlled frequency; a frequency divider for dividing the digital controlled frequency to generate the frequency divided signal; and a multi-phase generator for receiving the output oscillating signal and generating the outp
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: May 10, 2011
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Chun-Liang Chen
  • Publication number: 20110063004
    Abstract: In a frequency synthesis system with self-calibrated loop stability and bandwidth, a detector produces a detection signal based on a difference between an input signal and a feedback signal; a charge pump produces a control signal based on the detection signal; a filter produces a tuning signal and a source current based on the control signal; a bias circuit produces first and second bias signals; a controllable oscillator produces a differential output signal with a selected specific frequency; a differential-to-single converter produces an output signal with the selected specific frequency; a programmable frequency divider produces the feedback signal; a current mirror circuit receives the source current for producing a mirror current; a compensation circuit produces a compensation current based on the mirror current for compensating the variation of the damping factor and the bandwidth-to-reference frequency ratio.
    Type: Application
    Filed: September 9, 2010
    Publication date: March 17, 2011
    Applicant: Sunplus Technology Co., Ltd.
    Inventors: Chun-Liang Chen, Hui-Chun Hsu
  • Publication number: 20100232721
    Abstract: An image compression method includes: inputting an original image data and performing a specific transform operation upon the original image data to generate a transformed image data; performing a quantization operation upon the transformed image data according to a quantization table to generate a quantized image data; encoding the quantized image data to generate a compressed image data; and calculating a data amount corresponding to the compressed image data and accordingly determining whether to adjust the quantization table according to the data amount.
    Type: Application
    Filed: May 11, 2009
    Publication date: September 16, 2010
    Inventors: Yi-Le Yang, Chun-Liang Chen, Yu-Cheng Lo
  • Publication number: 20100214025
    Abstract: A low jitter and wide-range frequency synthesizer for low voltage operation includes a detector to generate a detection signal based on a logic level difference between an input signal and a feedback signal, a charge pump to generate a control signal based on the detection signal, a filter to generate a tuning signal based on the control signal, a bias circuit to generate a first bias signal and a second bias signal based on the tuning signal, a controllable oscillator to generate a differential output signal based on the first and the second bias signals, a differential to single ended converter to convert the differential output signal into an output signal, and a programmable frequency divider to generate the feedback signal based on the output signal.
    Type: Application
    Filed: February 18, 2010
    Publication date: August 26, 2010
    Applicant: Sunplus Technology Co., Ltd.
    Inventors: Chun-Liang Chen, Hui-Chun Hsu
  • Patent number: 7779663
    Abstract: A finished product receiving rack used in a corrugated metal sheet member fabrication system for receiving finished products in which two guardrails with protective members are arranged in parallel along the length of the rack body to guide delivering finished products in course and to prevent accidental injury to workers, and steering gears and guide screws are arranged on the rack body and rotatable by motors to move the guardrails and to further adjust the gap between the guardrails subject to the size of the finished products to be carried.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: August 24, 2010
    Inventor: Chun-Liang Chen
  • Publication number: 20100141314
    Abstract: An all digital phase locked loop circuit includes a reference frequency indicator for receiving a reference signal with a reference frequency and generating a frequency indicating value; a phase frequency detector for comparing the reference signal with a frequency divided signal and generating a phase difference pulse; a time-to-digital circuit for receiving the phase difference pulse and a plurality of output signals and generating a phase difference value; a digital controller for receiving the frequency indicating value and the phase difference value and generating a control value; a delta-sigma modulator for modulating the control value and generating a modulated control value; a DCO for receiving the modulated control value and generating an output oscillating signal with a digital controlled frequency; a frequency divider for dividing the digital controlled frequency to generate the frequency divided signal; and a multi-phase generator for receiving the output oscillating signal and generating the outp
    Type: Application
    Filed: October 7, 2009
    Publication date: June 10, 2010
    Applicant: Sunplus Technology Co., Ltd.
    Inventor: CHUN-LIANG CHEN
  • Patent number: 7725634
    Abstract: To reduce production cost, the present invention provides a microprocessor device for an LCD controller, which includes a memory, a first processing unit, a second processing unit, a first arbiter and a second arbiter. The memory is utilized for storing data. The first processing unit is utilized for executing a first program. The second processing unit is utilized for executing a second program. The first arbiter is coupled to the first processing unit and the second processing unit and utilized for deciding an operation order for the first processing unit and the second processing unit. The second arbiter is coupled to the first processing unit, the second processing unit and the memory and utilized for deciding a memory accessing order for the first processing unit and the second processing unit.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: May 25, 2010
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Wen-Hsuan Lin, Chun-Liang Chen
  • Patent number: 7712345
    Abstract: A main beam fabrication procedure and system for making main beams for warehouse framework through feeding, auto-forwarding and flattening, punching, roller shape-forming, cutting-off and finished product collection steps, in which the punching machine comprises an upper mold holder, four upper punching dies arranged in two longitudinal rows on the bottom side of the upper mold holder and adjustable to change the transverse pitch between the two longitudinal rows of upper punching dies, a bottom mold holder, and four bottom punching dies arranged in two longitudinal rows on the top side of the bottom mold holder and adjustable to change the transverse pitch between the two longitudinal rows of bottom punching dies.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: May 11, 2010
    Inventor: Chun-Liang Chen
  • Patent number: D636254
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: April 19, 2011
    Assignee: Master United Holdings Ltd.
    Inventor: Chun-Liang Chen