Abstract: A method of forming a shallow trench isolation (STI) structure is disclosed. Instead of using a conventional chemical mechanical polishing (CMP), a wet etching is used in the present invention while forming a shallow trench isolation structure. By using the high selectivity of the wet etching, the thickness of the silicon nitride (Si3N4) layer and the oxide layer in the shallow trench isolation structure can be decreased or controlled, and the micro-scratch caused by the chemical mechanical polishing can be avoided.

Abstract: In the structure of convention logic/flash memory, this invention provides a novel process to generate some dent, which is used for isolating in following self-alignment silicide process, in some specific location in the substrate, so there will not be short among those produced silicide. Also, during the following of the installation process of borderless contact, this present invention avoids the problem caused by mis-aligned borderless contact. Moreover, the present invention will improve the integration of Very Large Scale Integration (VLSI) structure and no extra special mask layer is needed in the process by using the present invention.

Abstract: Method for soft-programming at least one floating gate memory cell in at least one page of a persistent memory device by converging the low threshold voltages of the several cells of the page within an optimal range, and apparatus implementing the method. The methodology of the present invention teaches connecting the individual drains of the several memory cells of the device of a given page, or block, to a voltage limited constant current circuitry component. The methodology applies a first positive voltage to the word line of the page and a second positive voltage to the common source in a fixed time period to converge the pages low threshold voltage distribution. The methodology is capable of implementation on either the source or drain side of the memory array.