Abstract: Provided herein are 1-oxo-isoindoline-5-carboxamide compounds having the following structure: wherein R1, R2, R3, R4 and n are as defined herein, compositions comprising an effective amount of a 1-oxo-isoindoline-5-carboxamide compound, and methods for treating or preventing disorders.

Abstract: Methods, systems, and devices for anchor frame switching in an imaging system are described. A device may generate a pixel map based on a set of frames. A first subset of frames of the set of frames have a first exposure and a second subset of frames of the set of frames have a second exposure different than the first exposure. The device may determine a region of the pixel map representing motion between at least two frames of the first set of frames. If the device determines that a quantity of motion pixels in the region is higher than a threshold, the device may select a short exposure frame as an anchor frame, beginning at a later frame. Otherwise, the device may maintain using a long exposure frame as the anchor frame.

Abstract: Methods, systems, and devices for minimizing ghosting in high dynamic range image processing are described. The method may include capturing from a sensor of the device a downscaled first frame of a first exposure length and a downscaled second frame of a second exposure length that is longer than the first exposure length, identifying a highlight region associated with the downscaled first frame and a motion region associated with the downscaled first frame and with the downscaled second frame, blending the motion region in accordance with determining whether at least a portion of the motion region overlaps the highlight region, and incorporating the blending of the motion region in a set of full resolution frames.

Abstract: An inductor and a power module are respectively provided. The inductor includes an insulating body and a conductive body. The insulating body has a top surface and a bottom surface. The conductive body includes two pin parts and a heat dissipation part. A portion of each of the pin parts is exposed outside the bottom surface. The portions of the two pin parts exposed outside the insulating body are configured to fix to a circuit board. The heat dissipation part is connected to the two pin parts, the heat dissipation part is exposed outside the top surface, and the heat dissipation part is configured to connect to an external heat dissipation member. When the inductor is fixed to the circuit board through the two pin parts exposed outside the bottom surface, the two pin parts and the bottom surface jointly define an accommodating space for accommodating a chip.

Abstract: A fluid sterilizing device includes a first reaction chamber, a second reaction chamber, a communication chamber and a light source. The first reaction chamber is connected to a fluid inlet. The second reaction chamber is connected to a fluid outlet. The communication chamber is connected the first reaction chamber with the second reaction chamber. The light source is configured to emit sterilization light to enter the first reaction chamber and the second reaction chamber. The fluid inlet allows a fluid to enter the first reaction chamber, the communication chamber allows the fluid to pass through and enter the second reaction chamber, and a flow velocity distribution of the fluid in the second reaction chamber is different from that of the fluid in the first reaction chamber.

Abstract: Provided herein are 1-oxo-isoindoline-5-carboxamide compounds having the following structure: wherein R1, R2, R3, R4 and n are as defined herein, compositions comprising an effective amount of a 1-oxo-isoindoline-5-carboxamide compound, and methods for treating or preventing disorders.

Abstract: The invention relates to DRAM with sustainable storage architecture. The DRAM comprises a DRAM cell with an access transistor and a storage capacitor, and a word-line coupled to a gate terminal of the access transistor. During the period between the word-line being selected to turn on the access transistor and the word line being unselected to turn off the access transistor, either a first voltage level or a second voltage level is stored in the DRAM cell, wherein the first voltage level is higher than a voltage level of a signal ONE utilized in the DRAM, and the second voltage level is lower than a voltage level of a signal ZERO utilized in the DRAM.

Abstract: A ring input device, and more particularly to pressure-sensitive input mechanisms within the ring input device that detect pressure to initiate an operation, is disclosed. Because finger rings are often small and routinely worn, electronic finger rings can be employed as unobtrusive communication devices that are readily available to communicate wirelessly with other devices capable of receiving those communications. Ring input devices according to examples of the disclosure can detect press inputs on its band to generate inputs that can then be wirelessly communicated to companion devices.

Abstract: A flow battery system and methods are provided for eliminating crossover issues of active materials in redox flow batteries. A solid adsorbent with large specific surface area is disposed in an electrolyte of at least one half-cell, in contact with the electrolyte. During a charging process, the active material in a charged state is captured and stored on surfaces of the adsorbent, so that concentrations of the active material in the electrolyte in the charged state is reduced and the crossover is inhibited. During a discharging process, the active material is desorbed from the adsorbent to the electrolyte and pumped into the stack for reaction. The flow battery stack can have a microporous membrane separator. The electrolyte of the flow battery includes zinc iodide as active material and polyethylene glycol (PEG) as an additive.

Abstract: A transistor structure includes a semiconductor substrate, a gate structure, a channel region, and a first conductive region. The semiconductor substrate has a semiconductor surface. The gate structure is above the semiconductor surface, and a first concave is formed to reveal the gate structure. The channel region is under the semiconductor surface. The first conductive region is electrically coupled to the channel region, and a second concave is formed to reveal the first conductive region. A mask pattern in a photolithography process is used to define the first concave, and the mask pattern only defines one dimension length of the first concave.

Abstract: Compositions and methods are provided for potent mRNA vaccines for prevention and treatment of 2019 novel Coronavirus (2019-nCoV) infections. The compositions include a pharmaceutical composition containing one or more mRNA molecules encoding spike protein epitopes, including mutated epitopes, or mRNA cocktails that encode critical viral genes together with pharmaceutically acceptable polymeric nanoparticle carriers and liposomal nanoparticle carriers. Methods for stimulating system immune responses and treatment are provided, including subcutaneous, intraperitoneal and intramuscular injections.

Abstract: An electric paper tray includes a base, a paper holding element pivotally mounted to at least one side of the base, a power unit arranged at the base, and a lifting module connected between the paper holding element and the power unit. The lifting module is movably mounted under the paper holding element. When the lifting module is driven by the power unit to move to a first position, with respect to the base, the lifting module drives the paper holding element to make the paper holding element rotate to a closed position, when the lifting module is driven by the power unit to move to a second position, with respect to the base, the lifting module drives the paper holding element to make the paper holding element rotate to an opened position.

Abstract: A wafer-grade LED detection device and a wafer-grade LED detection method are provided. The wafer-grade LED detection device includes a light-generating module for providing a first light beam that passes through an LED wafer to be converted into a second light beam, a light-filtering module adjacent to the LED wafer for receiving the second light beam that passes through the light-filtering module to be converted into a third light beam, and a light-detecting module adjacent to the light-filtering module for receiving and detecting the third light beam. A wavelength range of the second light beam is restricted by the light-filtering module, so that a wavelength range of the third light beam is smaller than the wavelength range of the second light beam. When the third light beam is received by the light-detecting module, the light-detecting module can detect the third light beam for obtaining relevant information.

Abstract: A transistor structure includes a semiconductor substrate, a gate structure, a channel region, a first conductive region, and a first isolation region. The semiconductor substrate has a semiconductor surface. The gate structure has a length. The first conductive region is electrically coupled to the channel region. The first isolation region is next to the first conductive region. A length of the first conductive region between the gate structure and the first isolation is controlled by a single photolithography process which is originally configured to define the length of the gate structure.

Abstract: A transistor structure includes a semiconductor substrate, a gate structure, a channel region, a first conductive region, and a first isolation region. The semiconductor substrate has a semiconductor surface. The gate structure has a length. The first conductive region is electrically coupled to the channel region. The first isolation region is next to the first conductive region. A length of the first conductive region between the gate structure and the first isolation is controlled by a single photolithography process which is originally configured to define the length of the gate structure.

Abstract: A device with a noise shaping function in gain control includes a first adder, an N-bit quantizer, a mapping circuit, a second adder, a first D flip-flop, a scaler, and a second D flip-flop. The first adder generates a first value according to an input signal, a second value, and a third value. The N-bit quantizer outputs a codeword to a controller according to the first value. Adjusting orders corresponding to codewords outputted by the N-bit quantizer are between a smallest predetermined negative value and a largest positive predetermined value, the controller utilizes an adjusting order corresponding to the codeword to make a signal generator generate a signal with adjusted power, and N is an integer greater than 2. The first D flip-flop, the scaler, and the second D flip-flop are used for providing a high-pass filter effect to the device.

Abstract: The present invention discloses a memory cell structure. The memory cell structure includes a silicon substrate, a transistor, and a capacitor. The silicon substrate has a silicon surface. The transistor is coupled to the silicon surface, wherein the transistor includes a gate structure, a first conductive region, and a second conductive region. The capacitor has a storage electrode, wherein the capacitor is over the transistor and the storage electrode is electrically coupled to the second conductive region of the transistor. The capacitor includes a capacitor periphery, and the transistor is located within the capacitor periphery.

Abstract: A feeding roller structure includes a fastening frame, a transmission component, a transmission roller and a floating coupler. The transmission component is assembled in the fastening frame. The transmission component includes a drive shaft transversely pivoted to two sides of the fastening frame. The transmission roller is concentrically arranged around the drive shaft. The floating coupler is mounted to the fastening frame. The floating coupler is coupled between the drive shaft and the transmission roller. Two opposite ends of the floating coupler are adjacent to and spaced from the two sides of the fastening frame to form two gaps. Each gap is formed between one end of the floating coupler and one side of the fastening frame. The two gaps limit an angular displacement of the floating coupler.

Abstract: The invention relates to a DRAM structure which comprise a capacitor set and at least a transistor. The capacitor set includes a first capacitor with a first electrode and a second capacitor with a second electrode, and a counter electrode is shared by the first and the second capacitors. The counter electrode is perpendicular or substantially perpendicular to an extension direction of an active region of the transistor, or the counter electrode is not positioned above or below the first and second electrode.

Abstract: A memory cell structure includes a silicon substrate, a transistor, a bit line, and a capacitor. The silicon substrate has a silicon surface. The transistor is coupled to the silicon surface, wherein the transistor includes a gate structure, a first conductive region, and a second conductive region. The bit line is electrically coupled to the first conductive region of the transistor and positioned under the silicon surface. The capacitor is over the transistor and electrically coupled to the second conductive region of the transistor.