Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a metal gate thereon and a hard mask atop the metal gate; and performing a high-density plasma (HDP) process to form a cap layer on the hard mask and the substrate.

Abstract: A method of forming a semiconductor device is provided. A material layer, a first flowing material layer and a first mask layer are sequentially formed on a substrate. A first etching process is performed by using the first mask layer as a mask, so as to form a first opening in the material layer. The first mask layer and the first flowing material layer are removed. A filler layer is formed in the first opening. A second flowing material layer is formed on the material layer and the filler layer. A second mask layer is formed on the second flowing material layer. A second etching process is performed by using the second mask layer as a mask, so as to form a second opening in the material layer.

Abstract: The metal gate structure includes at least a substrate, a dielectric layer, first and second trenches, first metal layer and second metal layers, and two cap layers. In particular, the dielectric layer is disposed on the substrate, and the first and second trenches are disposed in the dielectric layer. The width of the first trench is less than the width of the second trench. The first and second metal layers are respectively disposed in the first trench and the second trench, and the height of the first metal layer is less than or equal to the height of the second metal layer. The cap layers are respectively disposed in a top surface of the first metal layer and a top surface of the second metal layer.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate, a gate structure on the substrate, and a spacer adjacent to the gate structure, in which the bottom of the spacer includes a tapered profile and the tapered profile comprises a convex curve.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a first dielectric layer, and a first metal plug structure, wherein a circuit element is disposed on the substrate. The first dielectric layer is disposed on the circuit element and on the substrate. The first metal plug structure, including a first barrier metal layer and a first metal interconnector, is embedded in the first dielectric layer. The first metal interconnector is in direct contact with the circuit element. The first barrier metal layer is disposed on the first metal interconnector; wherein the first barrier metal layer and the first metal interconnect have different metal materials.

Abstract: The metal gate structure includes at least a substrate, a dielectric layer, first and second trenches, first metal layer and second metal layers, and two cap layers. In particular, the dielectric layer is disposed on the substrate, and the first and second trenches are disposed in the dielectric layer. The width of the first trench is less than the width of the second trench. The first and second metal layers are respectively disposed in the first trench and the second trench, and the height of the first metal layer is less than or equal to the height of the second metal layer. The cap layers are respectively disposed in a top surface of the first metal layer and a top surface of the second metal layer.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a device thereon; forming a dielectric layer on the device and the substrate; forming a first mask layer on the dielectric layer; removing part of the first mask layer and part of the dielectric layer for forming a patterned first mask layer on the dielectric layer; covering a hard mask on the patterned first mask layer and the dielectric layer; partially removing the hard mask for forming a spacer adjacent to the patterned first mask layer and the dielectric layer; forming a contact hole adjacent to the spacer; filling the contact hole with a metal layer; and planarizing the metal layer for forming a contact plug, wherein the contact plug contacts the dielectric layer and the spacer simultaneously.

Abstract: A metal gate structure includes a substrate including a dense region and an iso region. A first metal gate structure is disposed within the dense region, and a second metal gate structure is disposed within the iso region. The first metal gate structure includes a first trench disposed within the dense region, and a first metal layer disposed within the first trench. The second metal gate structure includes a second trench disposed within the iso region, and a second metal layer disposed within the second trench. The height of the second metal layer is greater than the height of the first metal layer.

Abstract: A method of forming a semiconductor device having a metal gate includes the following steps. First of all, a first gate trench is formed in a dielectric layer. Next, a first work function layer is formed, covering the first gate trench. Then, a protection layer is formed in the first gate trench, also on the first work function layer. Then, a patterned sacrificial mask layer is formed in the first gate trench to expose a portion of the protection layer. After that, the exposed protection layer is removed, to form a U-shaped protection layer in the first gate trench. As following, a portion of the first work function layer under the exposed protection layer is removed, to form a U-shaped first work function layer in the first gate trench. Finally, the patterned sacrificial mask layer and the U-shaped protection layer are completely removed.

Abstract: A method of forming a contact hole includes providing a substrate. A nitrogen-containing dielectric layer, a first material layer, a second material layer, an oxygen-containing dielectric layer and a patterned photoresist layer cover the substrate from bottom to top. Then, the oxygen-containing dielectric layer is etched by taking the second material layer as a first etching stop layer to form a patterned oxygen-containing dielectric layer. Latter, the second material layer is etched by taking the first material layer as a second etching stop layer to form a patterned second material layer. Subsequently, the first material layer is etched by taking the nitrogen-containing dielectric layer as a third etching stop layer to form a patterned first material layer. Finally, the nitrogen-containing dielectric layer is etched until the substrate is exposed.

Abstract: A method for fabricating a metal gate structure includes providing a substrate on which a dielectric layer, a first trench disposed in the dielectric layer, a first metal layer filling up the first trench, a second trench disposed in the dielectric layer, a second metal layer filling up the second trench are disposed, and the width of the first trench is less than the width of the second trench; forming a mask layer to completely cover the second trench; performing a first etching process to remove portions of the first metal layer when the second trench is covered by the mask layer; and performing a second etching process to concurrently remove portions of the first metal layer and portions of the second metal layer after the first etching process.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; depositing a liner on the gate structure and the substrate; and performing an etching process by injecting a gas comprising CH3F, O2, and He for forming a spacer adjacent to the gate structure.

Abstract: A test system may include a master test station and slave test stations. The test stations may receive devices under test such as portable wireless electronic devices. Each test station may have adjustable antenna structures coupled to test equipment. The adjustable antenna structures may include antenna support structures on which test antennas are mounted and rail along which the antenna support structures and test antennas are moved by a pneumatic positioner. A rotatable platform may be provided in each test station to support the device under test in that test station. By making a series of over-the-air test measurements in the master test station while adjusting the antenna system and device positioning system, a satisfactory location for the active test antenna and device position may be identified. This configuration may then be used in performing single-point over-the-air tests in the slave test stations.

Abstract: A method of forming a semiconductor device is provided. A material layer, a first flowing material layer and a first mask layer are sequentially formed on a substrate. A first etching process is performed by using the first mask layer as a mask, so as to form a first opening in the material layer. The first mask layer and the first flowing material layer are removed. A filler layer is formed in the first opening. A second flowing material layer is formed on the material layer and the filler layer. A second mask layer is formed on the second flowing material layer. A second etching process is performed by using the second mask layer as a mask, so as to form a second opening in the material layer.

Abstract: A connection structure for a substrate is provided. The substrate has a plurality of connection pads and an insulation protection layer with the connection pads being exposed therefrom. The connection structure includes a metallic layer formed on an exposed surface of each of the connection pads and extending to the insulation protection layer, and a plurality of conductive bumps disposed on the metallic layer and spaced apart from one another at a distance less than or equal to 80 ?m, each of conductive bumps having a width less than a width of each of the connection pads. Since the metallic layer covers the exposed surfaces of the connection pads completely, a colloid material will not flow to a surface of the connection pads during a subsequent underfilling process of a flip-chip process. Therefore, the colloid material will not be peeled off from the connection pads.

Abstract: Electronic device structures may be tested using a radio-frequency test system. The radio-frequency test system may include radio-frequency test equipment and an associated test fixture. The radio-frequency test equipment may be used in generating and measuring radio-frequency signals. The test fixture may contain adjustable structures that allow the positions of radio-frequency test probes to be adjusted. The test system may be configured to position radio-frequency probes in the test fixture so that some probe contacts form electrical connections with conductive antenna structures. The radio-frequency probes may contain other contacts that are positioned to form electrical connections with conductive electronic device housing structures. During radio-frequency testing, the test equipment in the test system may apply radio-frequency test signals to the device structures under test using the test probes. Corresponding radio-frequency test signals may be measured by the test equipment.

Abstract: A test system may include a wireless test chamber with metal walls lined with pyramidal absorbers. A trapdoor may be provided in a wall opening to accommodate a robotic arm. The robotic arm may have grippers that grip a device under test or a support structure that is supporting a device under test. The robotic arm may move the device under test to a docking station for automatic battery charging during testing. When it is desired to perform wireless tests on a device under test, the robotic arm may move the device under test through the trapdoor into an interior portion of the test chamber. A turntable and movable test antenna may be used to rotate the device under test while varying angular orientations between test antenna and device under test. Emitted radiation levels can be measured using a liquid filled phantom and test probe on a robotic arm.

Abstract: Damage to conductive material that serves as bridging connections between conductive structures within an electronic device may result in deficiencies in radio-frequency (RF) and other wireless communications. A test system for testing device structures under test is provided. Device structures under test may include substrates and a conductive material between the substrates. The test system may include a test fixture for increasing tensile or compressive stress on the device structures under test to evaluate the resilience of the conductive material. The test system may also include a test unit for transmitting RF test signals and receiving test data from the device structures under test. The received test data may include scattered parameter measurements from the device structures under test that may be used to determine if the device structures under test meet desired RF performance criteria.

Abstract: An antenna with a curved shape may be mounted behind a curved antenna window. The antenna may have an antenna resonating element such as an inverted-F antenna resonating element and may have an antenna ground. The antenna resonating element may be formed from patterned metal traces on a flexible printed circuit. The flexible printed circuit may have ground traces that run along a peripheral edge of the flexible printed circuit. The antenna ground may be formed from a metal can with walls surrounding a cavity having an opening. The metal can may have a lip formed from bent portions of the walls. The flexible printed circuit may be soldered to the lip so that the ground traces are shorted to the can. A cable connector may be mounted on a bent tab in the flexible printed circuit that extends through a notch in the lip.

Abstract: Electronic devices may include radio-frequency transceiver circuitry and antenna structures. The antenna structures may include a dielectric carrier such as a foam carrier. The foam carrier may be formed from a material that can withstand elevated temperatures. Metal traces for antennas can be formed on the foam carrier by selectively activating areas on a powder coating with a laser and plating the laser-activated areas. Metal for the antennas may also be formed by attaching layers such as flexible printed circuit layers and metal foil layers to the foam carrier. Solder may be used to attach a coaxial cable or other transmission line, electrical components, and other electrical structures to the metal antenna structures on the foam carrier. The foam carrier may be formed from open cell or closed cell foam. The surface of the foam may be smoothed to facilitate formation of metal antenna structures.