Abstract: A semiconductor device having metal gate includes a substrate, a first metal gate positioned on the substrate, and a second metal gate positioned on the substrate. The first metal gate includes a first work function metal layer, and the first work function metal layer includes a taper top. The second metal gate includes a second work function metal layer. The first work function metal layer and the second work function metal layer are complementary to each other.

Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate; a gate structure on the substrate; an interlayer dielectric (ILD) around the gate structure; a first contact plug in the ILD layer; a second dielectric layer on the ILD layer; a second contact plug in the second dielectric layer and electrically connected to the first contact plug; and a spacer between the second contact plug and the second dielectric layer.

Abstract: An electronic product and its cable set are provided in which the cable set includes a cable assembly and a connector. The connector includes a single magnet block, a metal unit and two conductive ends. The metal unit is fixed and contacted with outer surfaces of the single magnet block, and is electrically connected to the cable assembly for attracting and electrically connecting to a portable electronic device. The conductive ends respectively penetrate through the single magnet block and electrically connect to the cable assembly for electrically connecting to the portable electronic device.

Abstract: An electronic device may be provided with wireless circuitry that includes antennas. An antenna may be formed from metal traces on a dielectric antenna carrier. The antenna carrier may be formed by molding a layer of plastic onto the surface of a foam member. The foam member may have a low dielectric constant to enhance antenna performance and may be formed from a stiff closed cell plastic foam material. Heat and pressure may be used to attach the layer of plastic to the surface of the foam member without adhesive. A laser may be used to selectively expose portions of the plastic layer to laser light. The plastic layer may include additives that sensitize the plastic layer to light exposure. Electroplated metal traces for the antenna may be formed on the exposed portions of the plastic layer while leaving other portions of the plastic layer uncovered with metal.

Abstract: A wearable device includes a nonconductive base, a metal loop, and a matching circuit. The nonconductive base substantially has a hollow structure. The metal loop is disposed on the nonconductive base, and has a feeding point and a grounding point. The metal loop has at least one notch. The grounding point of the metal loop is coupled through the matching circuit to a ground voltage. An antenna structure of the wearable device is formed by the metal loop and the matching circuit.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a gate structure thereon and an interlayer dielectric (ILD) layer around the gate structure; forming a hard mask on the gate structure and the ILD layer; forming a first patterned mask layer on the hard mask; using the first patterned mask layer to remove part of the hard mask for forming a patterned hard mask; and utilizing a gas to strip the first patterned mask layer while forming a protective layer on the patterned hard mask, wherein the gas is selected from the group consisting of N2 and O2.

Abstract: An antenna with a curved shape may be mounted behind a curved antenna window. The antenna may have an antenna resonating element such as an inverted-F antenna resonating element and may have an antenna ground. The antenna resonating element may be formed from patterned metal traces on a flexible printed circuit. The flexible printed circuit may have ground traces that run along a peripheral edge of the flexible printed circuit. The antenna ground may be formed from a metal can with walls surrounding a cavity having an opening. The metal can may have a lip formed from bent portions of the walls. The flexible printed circuit may be soldered to the lip so that the ground traces are shorted to the can. A cable connector may be mounted on a bent tab in the flexible printed circuit that extends through a notch in the lip.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a gate structure thereon and an interlayer dielectric (ILD) layer surrounding the gate structure, wherein the gate structure comprises a hard mask thereon; forming a dielectric layer on the gate structure and the ILD layer; removing part of the dielectric layer to expose the hard mask and the ILD layer; and performing a surface treatment to form a doped region in the hard mask and the ILD layer.

Abstract: An electronic product and its cable set are provided in which the cable set includes a cable assembly and a connector. The connector includes a single magnet block, a metal unit and two conductive ends. The metal unit is fixed and contacted with outer surfaces of the single magnet block, and is electrically connected to the cable assembly for attracting and electrically connecting to a portable electronic device. The conductive ends respectively penetrate through the single magnet block and electrically connect to the cable assembly for electrically connecting to the portable electronic device.

Abstract: A wearable electronic device includes a main body, a watchband spring pin engaged with one side of the main body, and a wrist-worn watchband connected to the watchband spring pin. The main body includes a wireless communication module and a conductive member electrically connected to the wireless communication module. The watchband spring pin is physically connected to the conductive member on the main body to be an antenna unit of the wireless communication module.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon and an interlayer dielectric (ILD) layer around the gate structure; forming a dielectric layer on the ILD layer and the gate structure; forming an opening in the dielectric layer and the ILD layer; forming an organic dielectric layer (ODL) on the dielectric layer and in the opening; removing part of the ODL; removing part of the dielectric layer for extending the opening; removing the remaining ODL; and forming a contact plug in the opening.

Abstract: Damage to conductive material that serves as bridging connections between conductive structures within an electronic device may result in deficiencies in radio-frequency (RF) and other wireless communications. A test system for testing device structures under test is provided. Device structures under test may include substrates and a conductive material between the substrates. The test system may include a test fixture for increasing tensile or compressive stress on the device structures under test to evaluate the resilience of the conductive material. The test system may also include a test unit for transmitting RF test signals and receiving test data from the device structures under test. The received test data may include scattered parameter measurements from the device structures under test that may be used to determine if the device structures under test meet desired RF performance criteria.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate, a gate structure on the substrate, and a spacer adjacent to the gate structure, in which the bottom of the spacer includes a tapered profile and the tapered profile comprises a convex curve.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a gate structure thereon and an interlayer dielectric (ILD) layer surrounding the gate structure; forming a sacrificial layer on the gate structure; forming a first contact plug in the sacrificial layer and the ILD layer; removing the sacrificial layer; and forming a first dielectric layer on the gate structure and the first contact plug.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a gate structure thereon and an interlayer dielectric (ILD) layer around the gate structure; forming a hard mask on the gate structure and the ILD layer; forming a first patterned mask layer on the hard mask; using the first patterned mask layer to remove part of the hard mask for forming a patterned hard mask; and utilizing a gas to strip the first patterned mask layer while forming a protective layer on the patterned hard mask, wherein the gas is selected from the group consisting of N2 and O2.

Abstract: The present invention provides a method for manufacturing contact holes of a semiconductor device, including a first dielectric layer is provided, a first region and a second region are defined on the first dielectric layer respectively, at least two cutting hard masks are formed and disposed within the first region and the second region respectively, at least two step-height portions disposed right under the cutting hard masks respectively. Afterwards, at least one first slot opening within the first region is formed, where the first slot opening partially overlaps the cutting hard mask and directly contacts the cutting hard mask, and at least one second contact opening is formed within the second region, where the second contact opening does not contact the cutting hard mask directly, and at least two contact holes are formed, where each contact hole penetrates through each step height portion.

Abstract: A method for fabricating a substrate structure is provided, which includes the steps of: disposing at least a strengthening member on a carrier; sequentially forming a first circuit layer and a dielectric layer on the carrier, wherein the strengthening member is embedded in the dielectric layer; forming a second circuit layer on the dielectric layer; removing the carrier; and forming an insulating layer on the first circuit layer and the second circuit layer. The strengthening member facilitates to reduce thermal warping of the substrate structure.

Abstract: A metal gate structure includes a substrate including a dense region and an iso region. A first metal gate structure is disposed within the dense region, and a second metal gate structure is disposed within the iso region. The first metal gate structure includes a first trench disposed within the dense region, and a first metal layer disposed within the first trench. The second metal gate structure includes a second trench disposed within the iso region, and a second metal layer disposed within the second trench. The height of the second metal layer is greater than the height of the first metal layer.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a plurality of gate structures on the substrate; forming a first stop layer on the gate structures; forming a second stop layer on the first stop layer; forming a first dielectric layer on the second stop layer; forming a plurality of first openings in the first dielectric layer to expose the second stop layer; forming a plurality of second openings in the first dielectric layer and the second stop layer to expose the first stop layer; and removing part of the second stop layer and part of the first stop layer to expose the gate structures.

Abstract: A semiconductor device having metal gate includes a substrate, a first metal gate positioned on the substrate, and a second metal gate positioned on the substrate. The first metal gate includes a first work function metal layer, and the first work function metal layer includes a taper top. The second metal gate includes a second work function metal layer. The first work function metal layer and the second work function metal layer are complementary to each other.