Patents by Inventor Chun-Ming Chang
Chun-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230378314Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.Type: ApplicationFiled: July 13, 2023Publication date: November 23, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20230369448Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.Type: ApplicationFiled: July 13, 2023Publication date: November 16, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Patent number: 11810972Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a first recess, a second recess, a passivation layer, and an etch mask layer. The group III-V barrier layer includes a thinner portion, a first thicker portion and a second thicker portion in the active region, the thinner portion surrounds the first thicker portion, and the second thicker portion surrounds the thinner portion. The first recess is disposed in the group III-V barrier layer in the active region. The second recess is disposed in the group III-V barrier layer in the isolation region.Type: GrantFiled: December 13, 2022Date of Patent: November 7, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Wen-Jung Liao
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Patent number: 11804544Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.Type: GrantFiled: January 14, 2022Date of Patent: October 31, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20230335614Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.Type: ApplicationFiled: June 28, 2023Publication date: October 19, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
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Publication number: 20230290839Abstract: A high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation layer and the mesa structure. The mesa structure includes a channel layer, a barrier layer on the channel layer, two opposite first edges extending along a first direction, and two opposite second edges extending along a second direction. The contact structure includes a body portion and a plurality of protruding portions. The body portion penetrates through the passivation layer. The protruding portions penetrate through the barrier layer and a portion of the channel layer. In a top view, the body portion overlaps the two opposite first edges of the mesa structure without overlapping the two opposite second edges of the mesa structure.Type: ApplicationFiled: May 18, 2023Publication date: September 14, 2023Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Chun-Ming Chang, Yi-Shan Hsu, Ruey-Chyr Lee
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Patent number: 11749740Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.Type: GrantFiled: December 31, 2019Date of Patent: September 5, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Patent number: 11742418Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a group III-V gate structure and a group III-V patterned structure. The group III-V body layer and the group III-V barrier layer are disposed on the substrate. The group III-V gate structure is disposed on the group III-V barrier layer within the active region. The group III-V patterned structure is disposed on the group III-V barrier layer within the isolation region. The composition of the group III-V patterned structure is the same as the composition of the group III-V gate structure.Type: GrantFiled: October 24, 2021Date of Patent: August 29, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Wen-Jung Liao
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Patent number: 11735644Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.Type: GrantFiled: December 14, 2021Date of Patent: August 22, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
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Patent number: 11695049Abstract: A high electron mobility transistor (HEMT) and method for forming the same are disclosed. The high electron mobility transistor includes a substrate, a mesa structure disposed on the substrate, a passivation layer disposed on the mesa structure, and at least a contact structure disposed in the passivation and the mesa structure. The mesa structure includes a channel layer and a barrier layer disposed on the channel layer. The contact structure includes a body portion and a plurality of protruding portions. The body portion is through the passivation layer. The protruding portions connect to a bottom surface of the body portion and through the barrier layer and a portion of the channel layer.Type: GrantFiled: September 23, 2020Date of Patent: July 4, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Tung Yeh, Chun-Liang Hou, Wen-Jung Liao, Chun-Ming Chang, Yi-Shan Hsu, Ruey-Chyr Lee
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Patent number: 11659691Abstract: A server device includes a casing, an electronic assembly, a cover, and a heat dissipation device. The electronic assembly includes a circuit board and at least one heat source. The circuit board is disposed on the casing, and the heat source is disposed on the circuit board. The cover is slidably disposed on the casing. The heat dissipation device includes at least one air cooling heat exchanger and at least one liquid cooling heat exchanger. The air cooling heat exchanger is fixed on and thermally coupled with the heat source. The liquid cooling heat exchanger is fixed on the cover and thermally coupled with the air cooling heat exchanger.Type: GrantFiled: September 14, 2021Date of Patent: May 23, 2023Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATIONInventors: Chun-Ming Chang, Tai-Jung Sung
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Publication number: 20230111035Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, a first recess, a second recess, a passivation layer, and an etch mask layer. The group III-V barrier layer includes a thinner portion, a first thicker portion and a second thicker portion in the active region, the thinner portion surrounds the first thicker portion, and the second thicker portion surrounds the thinner portion. The first recess is disposed in the group III-V barrier layer in the active region. The second recess is disposed in the group III-V barrier layer in the isolation region.Type: ApplicationFiled: December 13, 2022Publication date: April 13, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Wen-Jung Liao
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Patent number: 11610989Abstract: The present disclosure provides a high electron mobility transistor (HEMT) including a substrate; a buffer layer over the substrate; a GaN layer over the buffer layer; a first AlGaN layer over the GaN layer; a first AlN layer over the first AlGaN layer; a p-type GaN layer over the first AlN layer; and a second AlN layer on the p-type GaN layer.Type: GrantFiled: March 3, 2021Date of Patent: March 21, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Chun-Liang Hou, Wen-Jung Liao
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Publication number: 20230059769Abstract: A facial skin disorder (FSD) identification system is provided and includes a sliding rail arranged around a human facial epidermis, a carrier arranged on the sliding rail, at least one image capturing device arranged on the carrier, and a control circuit unit arranged on the carrier for the carrier to move on the sliding rail and the image capturing device to capture images of the human facial epidermis.Type: ApplicationFiled: January 27, 2022Publication date: February 23, 2023Applicants: BUDDHIST TZU CHI MEDICAL FOUNDATION, NATIONAL APPLIED RESEARCH LABORATORIESInventors: Chung-Hsing Chang, Shinn-Zong Lin, Chun-Ming Chang, Nai-Yuan Chiang, Rou-Jhen Chen, Han-Chao Chang
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Patent number: 11557669Abstract: A semiconductor device includes an enhancement mode high electron mobility transistor (HEMT) with an active region and an isolation region. The HEMT includes a substrate, a group III-V body layer, a group III-V barrier layer, recesses, a passivation layer and an etch mask layer. The group III-V body layer is disposed on the substrate. The group III-V barrier layer is disposed on the group III-V body layer in the active region and the isolation region. The recesses are disposed in the group III-V barrier layer in the active region and the isolation region, respectively. The passivation layer disposed in the recesses of the active region and the isolation region. The etch mask layer disposed between the passivation layer and the group III-V barrier layer in the active region, where the etch mask layer is spaced apart from bottoms of the recesses in the active region and the isolation region.Type: GrantFiled: May 17, 2021Date of Patent: January 17, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Wen-Jung Liao
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Publication number: 20220394885Abstract: A server device includes a casing, an electronic assembly, a cover, and a heat dissipation device. The electronic assembly includes a circuit board and at least one heat source. The circuit board is disposed on the casing, and the heat source is disposed on the circuit board. The cover is slidably disposed on the casing. The heat dissipation device includes at least one air cooling heat exchanger and at least one liquid cooling heat exchanger. The air cooling heat exchanger is fixed on and thermally coupled with the heat source. The liquid cooling heat exchanger is fixed on the cover and thermally coupled with the air cooling heat exchanger.Type: ApplicationFiled: September 14, 2021Publication date: December 8, 2022Inventors: CHUN-MING CHANG, TAI-JUNG SUNG
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Publication number: 20220394887Abstract: A server device includes a casing, an electronic assembly, a cover, and a heat dissipation device. The electronic assembly includes a circuit board and at least one heat source. The circuit board is disposed on the casing, and the heat source is disposed on the circuit board. The cover is removably disposed on the casing. The heat dissipation device includes at least one air cooling heat exchanger and at least one liquid cooling heat exchanger. The air cooling heat exchanger is fixed on and thermally coupled with the heat source. The liquid cooling heat exchanger is fixed on the cover and thermally coupled with the air cooling heat exchanger.Type: ApplicationFiled: September 15, 2021Publication date: December 8, 2022Inventors: CHUN-MING CHANG, Tai-Jung Sung
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Patent number: 11502177Abstract: A high-electron mobility transistor includes a substrate, a GaN channel layer over the substrate, an AlGaN layer over the GaN channel layer, a gate recess in the AlGaN layer, a source region and a drain region on opposite sides of the gate recess, a GaN source layer and a GaN drain layer grown on the AlGaN layer within the source region and the drain region, respectively, a p-GaN gate layer in and on the gate recess; and a re-grown AlGaN film on the AlGaN layer, on the GaN source layer and the GaN drain layer, and on interior surface of the gate recess.Type: GrantFiled: June 3, 2021Date of Patent: November 15, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
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Patent number: 11489048Abstract: A method for forming a high-electron mobility transistor is disclosed. A substrate is provided. A buffer layer is formed over the substrate. A GaN channel layer is formed over the buffer layer. An AlGaN layer is formed over the GaN channel layer. A GaN source layer and a GaN drain layer are formed on the AlGaN layer within a source region and a drain region, respectively. A gate recess is formed in the AlGaN layer between the source region and the drain region. A p-GaN gate layer is then formed in and on the gate recess.Type: GrantFiled: June 3, 2021Date of Patent: November 1, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Shin-Chuan Huang, Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20220293780Abstract: The present invention provides a method of forming an insulating structure of a high electron mobility transistor (HEMT), firstly, a gallium nitride layer is formed, next, an aluminum gallium nitride layer is formed on the gallium nitride layer, then, a first patterned photoresist layer is formed on the aluminum gallium nitride layer, and a groove is formed in the gallium nitride layer and the aluminum gallium nitride layer, next, an insulating layer is formed and filling up the groove. Afterwards, a second patterned photoresist layer is formed on the insulating layer, wherein the pattern of the first patterned photoresist layer is complementary to the pattern of the second patterned photoresist layer, and part of the insulating layer is removed, then, the second patterned photoresist layer is removed, and an etching step is performed on the remaining insulating layer to remove part of the insulating layer again.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Wen-Jung Liao