Abstract: A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have cooper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

Abstract: A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.

Abstract: A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.

Abstract: A thin film transistor (TFT) includes a substrate, a gate, a gate dielectric layer, a channel layer, a source and a drain. The gate and the gate dielectric layer are disposed on the substrate and the gate dielectric layer covers the gate. The channel layer is disposed on the gate dielectric layer over the gate, and the source and the drain are respectively disposed on a portion of the channel layer at both sides of the gate. At least one of the gate, the source and the drain has a lower conductive layer, an upper conductive layer and an intermediate conductive layer located between the lower conductive layer and the upper conductive layer. The material of the lower conductive layer is different from the material of the intermediate conductive layer, and the thickness of the lower conductive layer is less than or equal to about 150 ?.

Abstract: A pixel structure disposed on a substrate including a thin film transistor (TFT), a bottom capacitor electrode, a dielectric layer, an upper capacitor electrode, a passivation layer, and a pixel electrode is provided. The TFT having a source/drain and the bottom capacitor electrode are disposed on the substrate. The dielectric layer is disposed on the bottom capacitor electrode. The upper capacitor electrode has a semiconductor layer, a barrier layer, and a metal layer. The semiconductor layer is disposed on the dielectric layer above the bottom capacitor electrode. The barrier layer is disposed on the semiconductor layer. The metal layer whose material includes copper, a copper alloy, or a combination thereof is disposed on the barrier layer. The passivation layer covers the TFT and the upper capacitor electrode and has a first opening exposing the source/drain. The pixel electrode is electrically connected to the TFT through the first opening.

Abstract: A memory structure comprising a plurality of memory cells is described. Each memory cell comprises a substrate, a shallow trench isolation, a spacer, a tunnel oxide, and a floating gate. The shallow trench isolation in the substrate is used to define an active area. The spacer is at the sidewall of the shallow trench isolation and is higher than the shallow trench isolation. The tunnel oxide is on the active area. The floating gate is on the tunnel oxide.

Abstract: A thin-film transistor (TFT) includes a gate electrode, a gate dielectric layer, a semiconductor layer, source/drain electrodes, a passivation layer and a protection layer. The gate electrode is disposed on a substrate. The gate dielectric layer covers the gate electrode and the substrate. The semiconductor layer is disposed on the gate dielectric layer and above the gate electrode. The semiconductor layer has a channel region disposed above the gate electrode and source/drain regions disposed at both sides of the channel region. The source/drain electrodes are disposed on the source/drain regions of the semiconductor layer and each has a barrier layer disposed on the source/drain regions of the semiconductor layer and a conductive layer disposed on the barrier layer. The passivation layer is disposed over the surface of the source/drain electrodes. The protection layer is disposed over the substrate, the passivation layer, and the channel region of the semiconductor layer.

Abstract: A display element and a method of manufacturing the same are provided. The method comprises the following steps: forming a first patterned conducting layer with a gate on a substrate and a dielectric layer thereon; forming a patterned semiconductor layer on the dielectric layer, wherein the patterned semiconductor layer has a channel region, a source and a drain, and wherein the source and the drain lie on the opposite sides of the channel region; selectively depositing a barrier layer, which only wraps the patterned semiconductor layer; forming a second patterned conducting layer on the barrier layer and above the source and the drain. In the display element manufactured by the method, the barrier layer only wraps the patterned semiconductor layer.

Abstract: An airtight ball has an inner bladder, a sealing layer, a wound layer, a rubber layer and an outer leather covering. The inner bladder is a hollow, resilient sphere and has an inner space and an outer surface. The sealing layer is applied to the outer surface of the inner bladder and has a rubber glue layer, a polyvinyl alcohol (PVOH) layer and a rubber balloon. The rubber glue layer fills in air bubbles or holes formed in the outer surface of the inner bladder. The a PVOH layer forms a thin, airtight membrane on the rubber glue layer, keeps air from leaking out of the inner space of the inner bladder and further maintains roundness and increases bouncing ability of the ball. The rubber balloon is a thin layer of rubber attached to the PVOH layer. The wound layer is wound around the rubber balloon that keeps the wound layer from cutting the PVOH and stabilizes the wound layer. The present invention not only prevents air leakage but also increases the ball's roundness and strength.

Abstract: A processing system coupled to an apparatus is provided. The processing system includes: a non-volatile memory (NVM) storing firmware needed by the processing system; and an NVM control interface writing and reading data stored in the NVM. The apparatus verifies a previous piece of data being already written into the NVM, and the NVM control interface writes a current piece of data into the NVM.

Abstract: Disclosed herein are 1,3-dihydroxyl-9,10-anthraquinone and 3-[(3-amino)-propoxy]-9,10-anthraquinone derivatives, in particular 1,3-dihydroxy-4-prenyl-9,10-anthraquinone and 3-[3-(4-methylpiperazinyl)-propoxy]-9,10-anthraquinone, which are found to have inhibitory activities against several types of human tumor/cancer cells and thus can be used in the manufacture of pharmaceutical compositions for use in the treatment of tumors/cancers.

Abstract: A processing system coupled to an apparatus is provided. The processing system includes: a non-volatile memory (NVM) storing firmware needed by the processing system; and an NVM control interface writing and reading data stored in the NVM. The apparatus verifies a previous piece of data being already written into the NVM, and the NVM control interface writes a current piece of data into the NVM.

Abstract: A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have copper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

Abstract: A processing system connected to an apparatus includes a non-volatile memory (NVM) for storing firmware needed by the processing system; and an NVM control interface capable of writing and reading data stored in the NVM; wherein the NVM control interface reads a previous piece of data being already written into the NVM prior to a current piece of data and transmits the previous piece of data to the apparatus for comparison with original data that was previously written into the NVM, and the NVM control interface writes the current piece of data into the NVM.

Abstract: A memory structure comprising a plurality of memory cells is described. Each memory cell comprises a substrate, a shallow trench isolation, a spacer, a tunnel oxide, and a floating gate. The shallow trench isolation in the substrate is used to define an active area. The spacer is at the sidewall of the shallow trench isolation and is higher than the shallow trench isolation. The tunnel oxide is on the active area. The floating gate is on the tunnel oxide.

Abstract: A method for producing a memory with high coupling ratio is provided. First, a shallow trench isolation is formed on a substrate to define an active area. Second, a spacer is formed at the sidewall of the shallow trench isolation. Third, the shallow trench isolation is etched such that the top of the spacer is higher than the surface of the shallow trench isolation. Fourth, a tunnel oxide is formed on the active area. Finally, a floating gate is formed on the tunnel oxide.

Abstract: A ball with a foam carcass has an inner bladder, a winding layer, a foam carcass layer, a colored rubber ink layer, and a leather layer. The inner bladder is hollow. The winding layer is attached to and covers the inner bladder. The colored rubber ink is brushed on and covers the foam carcass layer. The foam carcass layer with the colored rubber ink layer with the colored rubber ink is attached to and covers the winding layer to form a foam covered carcass. The foam covered carcass is vulcanized. The colored rubber ink layer covers the uneven foam-carcass layer to form an even foam covered carcass. The leather layer is attached to the foam covered carcass.

Abstract: A ball with a foam carcass has an inner bladder, a winding layer, a foam carcass layer, a colored rubber ink layer, and a leather layer. The inner bladder is hollow. The winding layer is attached to and covers the inner bladder. The colored rubber ink is brushed on and covers the foam carcass layer. The foam carcass layer with the colored rubber ink layer with the colored rubber ink is attached to and covers the winding layer to form a foam covered carcass. The foam covered carcass is vulcanized. The colored rubber ink layer covers the uneven foam-carcass layer to form an even foam covered carcass. The leather layer is attached to the foam covered carcass.

Abstract: The fresh seeds obtained from the fresh fruits of Garcinia subelliptica, were extracted with chloroform at room temperature. The CHCl3 extract was concentrated under reduced pressure to afford a brown residue. This residue was subjected to column chromatography (silica gel) and eluted with appropriate solvent system to give two phloroglucinol derivatives (Compounds 1 and 4). Compound 1 exhibited potent inhibitory effects on the release of ?-glucuronidase and lysozyme from rat neutrophils stimulated with formyl-Met-Leu-Phe(fMLP)/cyto-chalasin B (CB). Compound 1 also exhibited potent inhibitory effect on the superoxide anion generation in rat neutrophils stimulated with fMLP/CB. Compound 4 exhibited potent inhibitory effect on NO production in lipopolysaccharide (LPS)/interferon-? (IFN-?)-activation in N9 cells. These Compounds may be developed as anti-inflammatory, anti-cancer agent, cure for ageing, and Alzheimer's disease treatment drugs.

Abstract: A processing system connected to an apparatus includes a non-volatile memory (NVM) for storing firmware needed by the processing system; and an NVM control interface capable of writing and reading data stored in the NVM; wherein the NVM control interface reads a previous piece of data being already written into the NVM prior to a current piece of data and transmits the previous piece of data to the apparatus for comparison with original data that was previously written into the NVM, and the NVM control interface writes the current piece of data into the NVM.