Patents by Inventor Chun-Wen Cheng

Chun-Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170197821
    Abstract: A method for forming a micro-electro mechanical system (MEMS) device is provided. The method includes forming a first dielectric layer over a semiconductor layer and forming a blocking layer over the first dielectric layer. The method also includes bonding a CMOS substrate with the blocking layer, and the CMOS substrate includes a second dielectric layer, and the blocking layer is configured to block gas coming from the second dielectric layer. The method further includes partially removing the first dielectric layer to form a cavity between the semiconductor layer and the blocking layer. A portion of the semiconductor layer above the cavity becomes a movable element. In addition, the method includes sealing the cavity such that a closed chamber is formed to surround the movable element.
    Type: Application
    Filed: March 29, 2017
    Publication date: July 13, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hua CHU, Chun-Wen CHENG
  • Patent number: 9702846
    Abstract: A device includes a biosensor, a sensing circuit electrically connected to the biosensor, a quantizer electrically connected to the sensing circuit, a digital filter electrically connected to the quantizer, a selective window electrically connected to the digital filter, and a decision unit electrically connected to the selective window.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: July 11, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui-Cheng Huang, Yi-Shao Liu, Chun-Wen Cheng, Tung-Tsun Chen, Chin-Hua Wen
  • Patent number: 9695039
    Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: July 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Kuei-Sung Chang, Jung-Huei Peng
  • Patent number: 9691725
    Abstract: The present disclosure provides one embodiment of a stacked semiconductor device. The stacked semiconductor device includes a first substrate; a first bond pad over the first substrate; a second substrate including a second electrical device fabricated thereon; a second bond pad over the second electrical device over the second substrate, the second bond pad electrically connecting to the second electrical device; a second insulation layer over the second bond pad having a top surface, the second insulation layer being bonded toward the first bond pad of the first substrate; and a through-substrate-via (“TSV”) extending from a surface opposite to the first bond pad through the first substrate and through the top surface of the second insulation layer to the second bond pad.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: June 27, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuei-Sung Chang, Chun-wen Cheng, Alexander Kalnitsky, Chia-Hua Chu
  • Patent number: 9689835
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity. An amplification factor of the BioFET device may be provided by a difference in capacitances associated with the gate structure on the first surface and with the interface layer formed on the second surface.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 27, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Shao Liu, Rashid Bashir, Fei-Lung Lai, Chun-wen Cheng
  • Publication number: 20170158494
    Abstract: An integrated circuit device includes a dielectric layer disposed over a semiconductor substrate, the dielectric layer having a sacrificial cavity formed therein, a membrane layer formed onto the dielectric layer, and a capping structure formed on the membrane layer such that a second cavity is formed, the second cavity being connected to the sacrificial cavity through a via formed into the membrane layer.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 8, 2017
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 9656852
    Abstract: The present disclosure provides a CMOS-MEMS device structure. The CMOS-MEMS device structure includes a sensing substrate and a CMOS substrate. The sensing substrate includes a bonding mesa structure. The CMOS substrate includes a top dielectric layer. The sensing substrate and the CMOS substrate are bonded through the bonding mesa structure, and the bonding mesa structure defines a bonding gap between the CMOS substrate and the sensing substrate.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Yi-Chuan Teng
  • Patent number: 9650239
    Abstract: A method embodiment for forming a micro-electromechanical (MEMS) device includes providing a MEMS wafer, wherein a portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer, and the carrier wafer is etched to expose the first membrane for the microphone device to an ambient environment. A MEMS substrate is patterned and portions of a first sacrificial layer are removed of the MEMS wafer to form a MEMS structure. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure. A second sealed cavity and a cavity exposed to an ambient environment on opposing sides of the second membrane for the pressure sensor device are formed.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: May 16, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20170129771
    Abstract: A semiconductor structure includes a substrate including a plurality of vias passing through the substrate and filled with a conductive or semiconductive material, and an oxide layer surrounding the conductive or semiconductive material, the substrate defining a cavity therein; a membrane disposed over the substrate and the cavity; a heater disposed within the membrane and electrically connected with the substrate; and a sensing electrode disposed over the membrane and the heater.
    Type: Application
    Filed: January 26, 2017
    Publication date: May 11, 2017
    Inventors: CHUN-WEN CHENG, CHIA-HUA CHU, FEI-LUNG LAI, SHIANG-CHI LIN
  • Publication number: 20170129772
    Abstract: A semiconductor structure includes: a first device; a second device contacted with the first device, wherein a chamber is formed between the first device and the second device; a first hole disposed in the second device and defined between a first end with a first circumference and a second end with a second circumference; a second hole disposed in the second device and aligned to the first hole; and a sealing object for sealing the second hole. The first end links with the chamber, and the first circumference is different from the second circumference, the second hole is defined between the second end and a third end with a third circumference, and the second circumference and the third circumference are smaller than the first circumference.
    Type: Application
    Filed: January 17, 2017
    Publication date: May 11, 2017
    Inventors: CHUN-WEN CHENG, YI-CHUAN TENG, CHENG-YU HSIEH, LEE-CHUAN TSENG, SHIH-CHANG LIU, SHIH-WEI LIN
  • Patent number: 9630837
    Abstract: A structure and a fabrication method thereof are provided. The method includes the following operations. A device substrate having a first surface and a second surface opposite to each other is received. A carrier substrate having a third surface and a fourth surface opposite to each other is received. An intermediate layer is formed between the third surface of the carrier substrate and the second surface of the device substrate. The second surface of the device substrate is attached to the third surface of the carrier substrate. The device substrate is thinned from the first surface. A device is formed over the first surface of the device substrate. The carrier substrate and the device substrate are patterned from the fourth surface to form a cavity in the carrier substrate, the intermediate layer and the device substrate.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: April 25, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 9625493
    Abstract: The present disclosure provides a biosensor device wafer testing and processing methods, system and apparatus. The biosensor device wafer includes device areas separated by scribe lines. A number of test areas that allow fluidic electrical testing are embedded in scribe lines or in device areas. An integrated electro-microfluidic probe card includes a fluidic mount that may be transparent, a microfluidic channels in the fluidic mount in a testing portion, at least one microfluidic probe and a number of electronic probe tips at the bottom of the fluidic mount, fluidic and electronic input and output ports on the sides of the fluidic mount, and at least one handle lug on the fluidic mount. The method includes aligning a wafer, mounting the integrated electro-microfluidic probe card, flowing one or more test fluids in series, and measuring and analyzing electrical properties to determine process qualities and an acceptance level of the wafer.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: April 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Publication number: 20170102353
    Abstract: Some embodiments of the present disclosure provide a gas sensor in an IOT. The gas sensor includes a substrate, a conductor disposed above the substrate, and a sensing film disposed over the conductor. The conductor has a top-view pattern including a plurality of openings, a minimal dimension of the opening being less than about 4 micrometer; and a perimeter enclosing the opening. Some embodiments of the present disclosure provide a method of manufacturing a gas sensor. The method includes receiving a substrate; forming a conductor, over the substrate; patterning the conductor to form a plurality of openings in the conductor by an etching operation, and forming a gas-sensing film over the conductor. The openings are arranged in a repeating pattern, and a minimal dimension of the opening being about 4 micrometer.
    Type: Application
    Filed: October 8, 2015
    Publication date: April 13, 2017
    Inventors: MING-TA LEI, CHIA-HUA CHU, HSIN-CHIH CHIANG, TUNG-TSUN CHEN, CHUN-WEN CHENG
  • Patent number: 9617143
    Abstract: A method of forming a semiconductor device comprises bonding a capping wafer and a base wafer to form a wafer package. The base wafer comprises a plurality of chip package portions. The capping wafer comprises a plurality of isolation trenches. Each isolation trench of the plurality of isolation trenches is configured to substantially align with a corresponding chip package portion of the plurality of chip package portions. The method also comprises separating the wafer package into a plurality of chip packages. Each chip package of the plurality of chip packages comprises at least one chip package portion of the plurality of chip package portions.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: April 11, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 9617147
    Abstract: Exemplary microelectromechanical system (MEMS) devices, and methods for fabricating such are disclosed. An exemplary method includes providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate includes a first silicon layer separated from a second silicon layer by an insulator layer; processing the first silicon layer to form a first structure layer of a MEMS device; bonding the first structure layer to a substrate; and processing the second silicon layer to form a second structure layer of the MEMS device.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: April 11, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng, Jiou-Kang Lee, Kai-Chih Liang, Chung-Hsien Lin, Te-Hao Lee
  • Patent number: 9617150
    Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a CMOS substrate and a MEMS substrate bonded with the CMOS substrate. The CMOS substrate includes a semiconductor substrate, a first dielectric layer formed over the semiconductor substrate, and a plurality of conductive pads formed in the first dielectric layer. The MEMS substrate includes a semiconductor layer having a movable element and a second dielectric layer formed between the semiconductor layer and the CMOS substrate. The MEMS substrate also includes a closed chamber surrounding the movable element. The MEMS substrate further includes a blocking layer formed between the closed chamber and the first dielectric layer of the CMOS substrate. The blocking layer is configured to block gas, coming from the first dielectric layer, from entering the closed chamber.
    Type: Grant
    Filed: October 9, 2013
    Date of Patent: April 11, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 9611141
    Abstract: The present disclosure provides a device having a doped active region disposed in a substrate. The doped active region having an elongate shape and extends in a first direction. The device also includes a plurality of first metal gates disposed over the active region such that the first metal gates each extend in a second direction different from the first direction. The plurality of first metal gates includes an outer-most first metal gate having a greater dimension measured in the second direction than the rest of the first metal gates. The device further includes a plurality of second metal gates disposed over the substrate but not over the doped active region. The second metal gates contain different materials than the first metal gates. The second metal gates each extend in the second direction and form a plurality of respective N/P boundaries with the first metal gates.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ping-Yin Liu, Li-Cheng Chu, Hung-Hua Lin, Shang-Ying Tsai, Yuan-Chih Hsieh, Jung-Huei Peng, Lan-Lin Chao, Chia-Shiung Tsai, Chun-Wen Cheng
  • Patent number: 9604843
    Abstract: Embodiments of the present disclosure include MEMS devices and methods for forming MEMS devices. An embodiment is a method for forming a microelectromechanical system (MEMS) device, the method including forming a MEMS wafer having a first cavity, the first cavity having a first pressure, and bonding a carrier wafer to a first side of the MEMS wafer, the bonding forming a second cavity, the second cavity having a second pressure, the second pressure being greater than the first pressure. The method further includes bonding a cap wafer to a second side of the MEMS wafer, the second side being opposite the first side, the bonding forming a third cavity, the third cavity having a third pressure, the third pressure being greater than the first pressure and less than the second pressure.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: March 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Patent number: 9604840
    Abstract: A device includes a stationary structure, a spring and a proof mass. The stationary structure has a first portion and a second portion. The spring is over a substrate. The spring has a first protrusion protruded from an edge and extended toward the first portion of the stationary structure. The proof mass is over the substrate and supported by the sparing. The proof mass has a second protrusion protruded from an edge and extended toward the second portion of the stationary structure. A first gap between the first protrusion and the first portion is less than a second gap between the second protrusion and the second portion.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: March 28, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMAPNY LTD.
    Inventors: Chun-Wen Cheng, Jiou-Kang Lee
  • Publication number: 20170081173
    Abstract: The present disclosure provides a CMOS MEMS device. The CMOS MEMS device includes a first substrate, a second substrate, a first polysilicon and a second polysilicon. The second substrate includes a movable part and is located over the first substrate. The first polysilicon penetrates the second substrate and is adjacent to a first side of the movable part of the second substrate. The second polysilicon penetrates the second substrate and is adjacent to a second side of the movable part of the second substrate.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 23, 2017
    Inventors: YU-CHIA LIU, CHIA-HUA CHU, CHUN-WEN CHENG