Patents by Inventor Chun-Wen Cheng

Chun-Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing a microphone
    Patent number: 9998843
    Abstract: The present disclosure provides one embodiment of an integrated microphone structure. The integrated microphone structure includes a first silicon substrate patterned as a first plate. A silicon oxide layer formed on one side of the first silicon substrate. A second silicon substrate bonded to the first substrate through the silicon oxide layer such that the silicon oxide layer is sandwiched between the first and second silicon substrates. A diaphragm secured on the silicon oxide layer and disposed between the first and second silicon substrates such that the first plate and the diaphragm are configured to form a capacitive microphone.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Chun-wen Cheng, Chin-Yi Cho, Li-Min Hung, Yao-Te Huang
  • METHOD FOR INTEGRATING COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) DEVICES WITH MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES USING A FLAT SURFACE ABOVE A SACRIFICIAL LAYER
    Publication number: 20180148326
    Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
    Type: Application
    Filed: September 27, 2017
    Publication date: May 31, 2018
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • MEMS integrated pressure sensor and microphone devices and methods of forming same
    Patent number: 9981841
    Abstract: A micro-electromechanical systems (MEMS) device includes a MEMS substrate having a first opening, a second opening, and a membrane layer comprising a first membrane disposed over the first opening and a second membrane disposed over the second opening. The MEMS device also includes a carrier substrate bonded to a first side of the MEMS substrate, the carrier substrate having a first cavity exposing the first membrane and a second cavity exposing the second membrane, and a cap substrate bonded to a second side of the MEMS substrate. The cap substrate has a third cavity connected to the first opening and a fourth cavity connected to the second opening. The first membrane, the first cavity, and the third cavity are part of a pressure sensor. The fourth cavity extends completely through the cap substrate. The second membrane, the second cavity, and the fourth cavity are part of a microphone.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: May 29, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Stacked semiconductor structure and method of forming the same
    Patent number: 9975762
    Abstract: A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Backside sensing BioFET with enhanced performance
    Patent number: 9976982
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Yi-Shao Liu, Fei-Lung Lai, Wei-Cheng Lin, Ta-Chuan Liao, Chien-Kuo Yang
  • Method and Structure for CMOS-MEMS Thin Film Encapsulation
    Publication number: 20180118560
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 3, 2018
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • MEMS device structure with a capping structure
    Patent number: 9938138
    Abstract: An integrated circuit device includes a dielectric layer disposed over a semiconductor substrate, the dielectric layer having a sacrificial cavity formed therein, a membrane layer formed onto the dielectric layer, and a capping structure formed on the membrane layer such that a second cavity is formed, the second cavity being connected to the sacrificial cavity through a via formed into the membrane layer.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: April 10, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Integrated biosensor
    Patent number: 9933388
    Abstract: The present disclosure relates to an integrated chip having an integrated bio-sensor with horizontal and vertical sensing surfaces. In some embodiments, the integrated chip has a sensing device disposed within a substrate, and a lower metal wire over the substrate and electrically coupled to the sensing device. First and second metal vias are arranged on the lower metal wire at locations set back from sidewalls of the lower metal wire, and first and second upper metal wires respectively cover top surfaces of the first and second metal vias. A dielectric structure surrounds the lower metal wire, the first and second metal vias, and the first and second upper metal wires. A sensing well has sensing surfaces that extend along an upper surface of the lower metal wire and along sidewalls of the first and second metal vias and the first and second upper metal wires.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: April 3, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen Cheng, Fei-Lung Lai, Chia-Hua Chu, Yi-Hsien Chang, Hsin-Chieh Huang
  • MEMS DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20180086624
    Abstract: A MEMS device includes a substrate, a supporter, a first back plate, a second back plate and a diaphragm. The substrate has a cavity. The supporter is over the substrate. The first back plate is over the cavity and fixed on the supporter. The second back plate is over the cavity and fixed on the supporter. The diaphragm is between the first back plate and the second back plate. The diaphragm includes a first sub-diaphragm and a second sub-diaphragm over the cavity and fixed on the supporter.
    Type: Application
    Filed: September 26, 2016
    Publication date: March 29, 2018
    Inventors: CHUN-WEN CHENG, CHIA-HUA CHU, MING-DAO WU, TZU-HENG WU
  • MEMS devices including MEMS dies and connectors thereto
    Patent number: 9919914
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Biochip with biosensors and fluidic devices
    Patent number: 9915630
    Abstract: A biochip includes a substrate, where the substrate includes at least one hole extending from a first surface of the substrate to a second surface of the substrate opposite the first surface, and where the substrate comprises a microfluidic channel pattern. The biochip further includes a surface modification layer over the substrate. Additionally, the biochip includes a sensing wafer bonded to the substrate, where the sensing wafer has one or more modified surface patterns having different surface properties from each other.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: March 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Chun-Wen Cheng, Chun-Ren Cheng
  • SEMICONDUCTOR STRUCTURE WITH CAVITY SPACING MONITORING FUNCTIONS
    Publication number: 20180065841
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.
    Type: Application
    Filed: September 2, 2016
    Publication date: March 8, 2018
    Inventors: JUNG-HUEI PENG, YI-CHIEN WU, YU-CHIA LIU, CHUN-WEN CHENG
  • CMOS compatible BioFET
    Patent number: 9910009
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: March 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alexander Kalnitsky, Yi-Shao Liu, Kai-Chih Liang, Chia-Hua Chu, Chun-Ren Cheng, Chun-Wen Cheng
  • INTEGRATION SCHEME FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES AND COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) DEVICES
    Publication number: 20180029882
    Abstract: Processes for integrating complementary metal-oxide-semiconductor (CMOS) devices with microelectromechanical systems (MEMS) devices are provided. In some embodiments, the MEMS devices are formed on a sacrificial substrate or wafer, the sacrificial substrate or wafer is bonded to a CMOS die or wafer, and the sacrificial substrate or wafer is removed. In other embodiments, the MEMS devices are formed over a sacrificial region of a CMOS die or wafer and the sacrificial region is subsequently removed. Integrated circuit (ICs) resulting from the processes are also provided.
    Type: Application
    Filed: October 4, 2016
    Publication date: February 1, 2018
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Vacuum Sealed MEMS and CMOS Package
    Publication number: 20180029881
    Abstract: A vacuum sealed MEMS and CMOS package and a process for making the same may include a capping wafer having a surface with a plurality of first cavities, a first device having a first surface with a second plurality of second cavities, a hermetic seal between the first surface of the first device and the surface of the capping wafer, and a second device having a first surface bonded to a second surface of the first device. The second device is a CMOS device with conductive through vias connecting the first device to a second surface of the second device, and conductive bumps on the second surface of the second device. Conductive bumps connect to the conductive through vias and wherein a plurality of conductive bumps connect to the second device. The hermetic seal forms a plurality of micro chambers between the capping wafer and the first device.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 1, 2018
    Inventors: Chun-Wen Cheng, Yi-Chuan Teng, Hung-Chia Tsai, Chia-Hua Chu
  • Multiple bonding in wafer level packaging
    Patent number: 9873610
    Abstract: A MEMS device is described. The device includes a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, a semiconductor substrate including a second bonding layer, and a cap including a third bonding layer, the cap coupled to the semiconductor substrate by bonding the second bonding layer to the third bonding layer. The first bonding layer includes silicon, the semiconductor substrate is electrically coupled to the MEMS substrate by bonding the first bonding layer to the second bonding layer, and the MEMS substrate is hermetically sealed between the cap and the semiconductor substrate.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: January 23, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Hsien Lin, Chia-Hua Chu, Li-Cheng Chu, Yuan-Chih Hsieh, Chun-Wen Cheng
  • Method and structure for CMOS-MEMS thin film encapsulation
    Patent number: 9868628
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: January 16, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • SEMICONDUCTOR STRUCTURE FOR MEMS DEVICE
    Publication number: 20170369308
    Abstract: The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.
    Type: Application
    Filed: June 27, 2016
    Publication date: December 28, 2017
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • MEMS integrated pressure sensor devices having isotropic cavitites and methods of forming same
    Patent number: 9850125
    Abstract: A method embodiment includes providing a MEMS wafer comprising an oxide layer, a MEMS substrate, a polysilicon layer. A carrier wafer comprising a first cavity formed using isotropic etching is bonded to the MEMS, wherein the first cavity is aligned with an exposed first portion of the polysilicon layer. The MEMS substrate is patterned, and portions of the sacrificial oxide layer are removed to form a first and second MEMS structure. A cap wafer including a second cavity is bonded to the MEMS wafer, wherein the bonding creates a first sealed cavity including the second cavity aligned to the first MEMS structure, and wherein the second MEMS structure is disposed between a second portion of the polysilicon layer and the cap wafer. Portions of the carrier wafer are removed so that first cavity acts as a channel to ambient pressure for the first MEMS structure.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: December 26, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • BIOSENSOR CALIBRATION SYSTEM AND RELATED METHOD
    Publication number: 20170363704
    Abstract: A device includes a first biosensor of a biosensor array; a second biosensor of a biosensor array; a readout circuit electrically connected to the biosensor array; a decoder electrically connected to the biosensor array; a voltage generator electrically connected to the biosensor array; and a decision system electrically connected to the voltage generator and the readout circuit.
    Type: Application
    Filed: August 30, 2017
    Publication date: December 21, 2017
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Hua WEN, Jui-Cheng Huang, Yi-Shao Liu, Chun-Wen Cheng, Tung-Tsun Chen