Abstract: The present disclosure provides a virtual reality (VR) device, an image processing method, and a non-transitory computer readable storage medium. The VR device includes a display and a processor. The display is configured to display a VR object. The processor is configured to receive a control instruction, and acquire, on the VR object, an indicating region according to the control instruction; acquire, on the indicating region, a control region associated with a 2D image; acquire a 3D normal mapping data corresponding to the indicating region; calibrate a range of the control region according to a position information of the control instruction and the 3D normal mapping data; and edit, on the calibrated range, the control region according to the received control instruction.

Abstract: Structures and formation methods of a semiconductor device structure are provided. A semiconductor device structure includes a first dielectric layer and a second dielectric layer over a semiconductor substrate. A cavity penetrates through the first dielectric layer and the second dielectric layer. The semiconductor device structure also includes a first movable membrane between the first dielectric layer and the second dielectric layer. The first movable membrane is partially exposed through the cavity. The first movable membrane includes first corrugated portions arranged along an edge of the cavity.

Abstract: An integrated microphone device is provided. The integrated microphone device includes a substrate, a plate, and a membrane. The substrate includes an aperture allowing acoustic pressure to pass through. The plate is disposed on a side of the substrate. The membrane is disposed between the substrate and the plate and movable relative to the plate as acoustic pressure strikes the membrane. The membrane includes a vent valve having an open area that is variable in response to a change in acoustic pressure.

Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The device substrate includes a first trench and a second trench. A first MEMS device is disposed over the first trench and a second MEMS device is disposed over the second trench. A first stopper is raised from a first trench bottom surface of the first trench but below a top surface of the device substrate and a second stopper is raised from a second trench bottom surface of the second trench but below the top surface of the device substrate. A first depth of the first trench is greater than a second depth of the second trench.

Abstract: Some embodiments of the present disclosure provide a microelectromechanical systems (MEMS). The MEMS includes a semiconductive block. The semiconductive block includes a protruding structure. The protruding structure includes a bottom surface. The semiconductive block includes a sensing structure. A semiconductive substrate includes a conductive region. The conductive region includes a first surface under the sensing structure. The first surface is substantially coplanar with the bottom surface. A dielectric region includes a second surface not disposed over the first surface.

Abstract: The present disclosure provides a semiconductor device, which includes a first substrate comprising an upper surface and a second substrate disposed over the first substrate. The semiconductor device also includes a first electrode disposed in the second substrate and configured to move in a direction substantially parallel to the upper surface in response to a pressure difference, and a second electrode disposed in the second substrate. The second electrode is configured to provide a capacitance in conjunction with the first electrode.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip structure. The integrated chip structure has a plurality of interconnect layers disposed within a dielectric structure over a substrate. A passivation layer is over the dielectric structure. A sensing electrode and a bonding electrode have bottom surfaces directly contacting the passivation layer. A microelectromechanical systems (MEMS) substrate is vertically separated from the sensing electrode. The bonding electrode is electrically connected to the MEMs substrate and to one or more of the plurality of interconnect layers. An electrode extension via is configured to electrically connect the sensing electrode to one or more of the plurality of interconnect layers.

Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.

Abstract: A semiconductor device includes a first substrate, a second substrate bonded to the first substrate from a first surface of the second substrate, a third substrate bonded to the second substrate from a second surface of the second substrate, a cavity defined by the first substrate, the second substrate and the third substrate; and a viewer window provided in the third substrate and aligned with the cavity; wherein the inside of the cavity is observed through the viewer window.

Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.

Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.

Abstract: The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.

Abstract: A method for forming a micro-electro mechanical system (MEMS) device is provided. The method includes bonding a semiconductor substrate with a carrier substrate through a dielectric layer and patterning the semiconductor substrate into multiple elements. The method also includes partially removing the dielectric layer to release some of the elements such that the released elements become one (or more) first movable element and one (or more) second movable element. The method further includes bonding a cap substrate with the semiconductor substrate to form a first closed chamber containing the first movable element and a second closed chamber containing the second movable element. In addition, the method includes opening the second closed chamber and sealing the second closed chamber after vacuumizing the second closed chamber such that the second closed chamber has a reduced pressure smaller than that of the first closed chamber.

Abstract: A semiconductor structure may include a first device having first surface with a first bonding layer formed thereon and a second device having a first surface with a second bonding layer formed thereon. The first bonding layer may provide an electrically conductive path to at least one electrical device in the first device. The second bonding layer may provide an electrically conductive path to at least one electrical device in the second device. One of the first or the second devices may include MEMS electrical devices. The first and/or the second bonding layers may be formed of a getter material, which may provide absorption for outgassing.

Abstract: A device includes a carrier having a plurality of cavities, a micro-electro-mechanical system (MEMS) substrate bonded on the carrier, wherein the MEMS substrate comprises a first side bonded on the carrier, a moving element over a bottom electrode, wherein the bottom electrode is formed of polysilicon and a second side having a plurality of bonding pads and a semiconductor substrate bonded on the MEMS substrate, wherein the semiconductor substrate comprises a top electrode and the first moving element is between the top electrode and the bottom electrode.

Abstract: The present disclosure relates to a micro-fluidic probe card that deposits a fluidic chemical onto a substrate with a minimal amount of fluidic chemical waste, and an associated method of operation. In some embodiments, the micro-fluidic probe card has a probe card body with a first side and a second side. A sealant element, which contacts a substrate, is connected to the second side of the probe card body in a manner that forms a cavity within an interior of the sealant element. A fluid inlet, which provides a fluid from a processing tool to the cavity, is a first conduit extending between the first side and the second side of the probe card body. A fluid outlet, which removes the fluid from the cavity, is a second conduit extending between the first side and the second side of the probe card body.

Abstract: A vacuum sealed MEMS and CMOS package and a process for making the same may include a capping wafer having a surface with a plurality of first cavities, a first device having a first surface with a second plurality of second cavities, a hermetic seal between the first surface of the first device and the surface of the capping wafer, and a second device having a first surface bonded to a second surface of the first device. The second device is a CMOS device with conductive through vias connecting the first device to a second surface of the second device, and conductive bumps on the second surface of the second device. Conductive bumps connect to the conductive through vias and wherein a plurality of conductive bumps connect to the second device. The hermetic seal forms a plurality of micro chambers between the capping wafer and the first device.

Abstract: A getter is provided. The getter consists essentially of from about 0% to 50% of titanium, from about 0% to 50% zirconium, and from about 5% to 50% of tantalum. A MEMS device is provided. The MEMS device includes a substrate and a getter over the substrate. The getter consists essentially of from about 0% to 50% of titanium, from about 0% to 50% zirconium, and from about 5% to 50% of tantalum. A method of forming a MEMS device is provided. The method includes the following operations: providing a substrate; and providing a getter over the substrate, wherein the getter consists essentially of from about 0% to 50% of titanium, from about 0% to 50% zirconium, and from about 5% to 50% of tantalum, and wherein all of the percentages are atomic percentages.

Abstract: A device includes a carrier having a plurality of cavities, a micro-electro-mechanical system (MEMS) substrate bonded on the carrier, wherein the MEMS substrate comprises a shielding layer on the carrier and coupled to ground, a plurality of vias coupled between the shielding layer and a bottom electrode of the MEMS substrate and a moving element over the bottom electrode and a semiconductor substrate bonded on the MEMS substrate, wherein the semiconductor substrate comprises a top electrode, and wherein the moving element is between the top electrode and the bottom electrode.