Patents by Inventor Chun-Wen Cheng

Chun-Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED MICROPHONE DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20200213701
    Abstract: An integrated microphone device is provided. The integrated microphone device includes a substrate, a plate, and a membrane. The substrate includes an aperture allowing acoustic pressure to pass through. The plate is disposed on a side of the substrate. The membrane is disposed between the substrate and the plate and movable relative to the plate as acoustic pressure strikes the membrane. The membrane includes a vent valve having an open area that is variable in response to a change in acoustic pressure.
    Type: Application
    Filed: March 10, 2020
    Publication date: July 2, 2020
    Inventors: Chun-Wen CHENG, Chia-Hua CHU, Chun-Yin TSAI, Tzu-Heng WU, Wen-Cheng KUO
  • Method and structure for CMOS-MEMS thin film encapsulation
    Patent number: 10689247
    Abstract: Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng
  • CMOS COMPATIBLE BIOFET
    Publication number: 20200150080
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Application
    Filed: December 26, 2019
    Publication date: May 14, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alexander KALNITSKY, Yi-Shao LIU, Kai-Chih LIANG, Chia-Hua CHU, Chun-Ren CHENG, Chun-Wen CHENG
  • METHOD OF FORMING SEMICONDUCTOR DEVICE STRUCTURE
    Publication number: 20200140259
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first dielectric layer over a substrate and forming a first recess in the first dielectric layer. The method also includes conformally forming a first movable membrane over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion in the first recess. The method further includes forming a second dielectric layer over the first movable membrane and partially removing the substrate, the first dielectric layer, and the second dielectric layer to form a cavity. In addition, the first corrugated portion of the first movable membrane is partially sandwiched between the first dielectric layer and the second dielectric layer.
    Type: Application
    Filed: December 31, 2019
    Publication date: May 7, 2020
    Inventors: Yi-Chuan Teng, Chun-Yin Tsai, Chia-Hua Chu, Chun-Wen Cheng
  • CMOS-MEMS INTEGRATION WITH THROUGH-CHIP VIA PROCESS
    Publication number: 20200131028
    Abstract: The integrated CMOS-MEMS device includes a CMOS structure, a cap structure, and a MEMS structure. The CMOS structure, fabricated on a first substrate, includes at least one conducting layer. The cap structure, including vias passing through the cap structure, has an isolation layer deposited on its first side and has a conductive routing layer deposited on its second side. The MEMS structure is deposited between the first substrate and the cap structure. The integrated CMOS-MEMS device also includes a conductive connector that passes through one of the vias and through an opening in the isolation layer on the cap structure. The conductive connector conductively connects a conductive path in the conductive routing layer on the cap structure with the at least one conducting layer of the CMOS structure.
    Type: Application
    Filed: May 23, 2019
    Publication date: April 30, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Wen Cheng Kuo, Wei-Jhih Mao
  • MEMS DEVICE WITH DUMMY-AREA UTILIZATION FOR PRESSURE ENHANCEMENT
    Publication number: 20200131032
    Abstract: In some embodiments, a sensor is provided. The sensor includes a microelectromechanical systems (MEMS) substrate disposed over an integrated chip (IC), where the IC defines a lower portion of a first cavity and a lower portion of a second cavity, and where the first cavity has a first operating pressure different than an operating pressure of the second cavity. A cap substrate is disposed over the MEMS substrate, where a first pair of sidewalls of the cap substrate partially define an upper portion of the first cavity, and a second pair of sidewalls of the cap substrate partially define an upper portion of the second cavity. A sensor area comprising a movable portion of the MEMS substrate and a dummy area comprising a fixed portion of the MEMS substrate are both disposed in the first cavity. A pressure enhancement structure is disposed in the dummy area.
    Type: Application
    Filed: July 30, 2019
    Publication date: April 30, 2020
    Inventors: Chun-Wen Cheng, Fei-Lung Lai, Kuei-Sung Chang, Shang-Ying Tsai
  • INTEGRATION SCHEME FOR MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES AND COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) DEVICES
    Publication number: 20200115222
    Abstract: Processes for integrating complementary metal-oxide-semiconductor (CMOS) devices with microelectromechanical systems (MEMS) devices are provided. In some embodiments, the MEMS devices are formed on a sacrificial substrate or wafer, the sacrificial substrate or wafer is bonded to a CMOS die or wafer, and the sacrificial substrate or wafer is removed. In other embodiments, the MEMS devices are formed over a sacrificial region of a CMOS die or wafer and the sacrificial region is subsequently removed. Integrated circuit (ICs) resulting from the processes are also provided.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 16, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Manufacturing method of semiconductor structure including heater
    Patent number: 10618804
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate, receiving a heater, receiving an electrode, and receiving a sensing material. The substrate have a first surface, a second surface opposite to the first surface and a plurality of vias extending from the second surface toward the first surface and filled with a conductive or semiconductive material and a first oxide layer, the first oxide layer surrounding the conductive or semiconductive material in the plurality of vias, and a second oxide layer disposed over the first surface and the second surface. The heater is disposed within a membrane over the first surface of the substrate and electrically connected with the substrate. The electrode is over the heater and the membrane; and the sensing material covers a portion of the electrode.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • MANUFACTURING METHOD OF SENSOR IN AN INTERNET-OF-THINGS
    Publication number: 20200109476
    Abstract: The present disclosure provides a method of manufacturing a gas sensor. The method includes the following operations: a substrate is received; a conductor layer is formed over the substrate; the conductor layer is patterned to form a conductor with a plurality of openings by an etching operation, the openings being arranged in a repeating pattern, a minimal dimension of the opening being about 4 micrometers; and a gas-sensing film is formed over the conductor.
    Type: Application
    Filed: December 6, 2019
    Publication date: April 9, 2020
    Inventors: MING-TA LEI, CHIA-HUA CHU, HSIN-CHIH CHIANG, TUNG-TSUN CHEN, CHUN-WEN CHENG
  • DUAL BACK-PLATE AND DIAPHRAGM MICROPHONE
    Publication number: 20200107130
    Abstract: A MEMS microphone includes a substrate having an opening, a first diaphragm, a first backplate, a second diaphragm, and a second backplate. The first diaphragm faces the opening in the substrate. The first backplate includes multiple accommodating-openings and it is spaced apart from the first diaphragm. The second diaphragm joints the first diaphragm together at multiple locations by pillars passing through the accommodating-openings in the first backplate. The first backplate is located between the first diaphragm and the second diaphragm. The second backplate includes at least one vent hole and it is spaced apart from the second diaphragm. The second diaphragm is located between the first backplate and the second backplate.
    Type: Application
    Filed: July 9, 2019
    Publication date: April 2, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Wen-Tuan Lo
  • Integrated microphone device and manufacturing method thereof
    Patent number: 10609463
    Abstract: An integrated microphone device is provided. The integrated microphone device includes a substrate, a plate, and a membrane. The substrate includes an aperture allowing acoustic pressure to pass through. The plate is disposed on a side of the substrate. The membrane is disposed between the substrate and the plate and movable relative to the plate as acoustic pressure strikes the membrane. The membrane includes a vent valve having an open area that is variable in response to a change in acoustic pressure.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: March 31, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Wen Cheng, Wen-Cheng Kuo, Chia-Hua Chu, Chun-Yin Tsai, Tzu-Heng Wu
  • MEMS DEVICE AND METHOD FOR FORMING THE SAME
    Publication number: 20200071157
    Abstract: A MEMS device includes a first layer and a second layer including a same material, a third layer disposed between the first layer and the second layer, a first air gap separating the first layer and the third layer, a second air gap separating the second layer and the third layer, a plurality of first pillars exposed to the first air gap and arranged in contact with the first layer and the third layer, a plurality of second pillars exposed to the second air gap and arranged in contact with the second layer and the third layer.
    Type: Application
    Filed: August 29, 2018
    Publication date: March 5, 2020
    Inventors: CHEN HSIUNG YANG, CHUN-WEN CHENG, CHIA-HUA CHU, EN-CHAN CHEN
  • Backside CMOS Compatible BioFET with No Plasma Induced Damage
    Publication number: 20200072789
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shao LIU, Chun-Ren Cheng, Ching-Ray Chen, Yi-Hsien Chang, Fei-Lung Lai, Chun-Wen Cheng
  • MEMS Devices Including MEMS Dies and Connectors Thereto
    Publication number: 20200024129
    Abstract: An embodiment is MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 23, 2020
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • METHOD OF USING INTEGRATED ELECTRO-MICROFLUIDIC PROBE CARD
    Publication number: 20200025713
    Abstract: A method includes mounting an integrated electro-microfluidic probe card to a device area on a bio-sensor device wafer, wherein the electro-microfluidic probe card has a first major surface and a second major surface opposite the first major surface. The method further includes electrically connecting at least one electronic probe tip extending from the first major surface to a corresponding conductive area of the device area. The method further includes stamping a test fluid onto the device area. The method further includes measuring via the at least one electronic probe tip a first electrical property of one or more bio-FETs of the device area based on the test fluid.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 23, 2020
    Inventors: Yi-Shao LIU, Fei-Lung LAI, Chun-Ren CHENG, Chun-Wen CHENG
  • METHOD FOR INTEGRATING COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) DEVICES WITH MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES USING A FLAT SURFACE ABOVE A SACRIFICIAL LAYER
    Publication number: 20200024135
    Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 23, 2020
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Structure and formation method of semiconductor device structure
    Patent number: 10526196
    Abstract: Structures and formation methods of a semiconductor device structure are provided. A semiconductor device structure includes a first dielectric layer and a second dielectric layer over a semiconductor substrate. A cavity penetrates through the first dielectric layer and the second dielectric layer. The semiconductor device structure also includes a first movable membrane between the first dielectric layer and the second dielectric layer. The first movable membrane is partially exposed through the cavity. The first movable membrane includes first corrugated portions arranged along an edge of the cavity.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: January 7, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Chuan Teng, Chun-Yin Tsai, Chia-Hua Chu, Chun-Wen Cheng
  • METHOD OF FORMING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE
    Publication number: 20200002161
    Abstract: A method of making a semiconductor package includes bonding a carrier to a surface of the substrate, wherein the carrier is free of active devices, wherein the carrier includes a carrier bond pad on a surface of the carrier. The method further includes bonding a wafer bond pad of an active circuit wafer to the carrier bond pad, wherein the bonding of the wafer bond pad to the carrier bond pad comprises re-graining the wafer bond pad to form at least one grain boundary extending from the wafer bond pad to the carrier bond pad.
    Type: Application
    Filed: August 19, 2019
    Publication date: January 2, 2020
    Inventors: Chun-wen CHENG, Hung-Chia TSAI, Lan-Lin CHAO, Yuan-Chih HSIEH, Ping-Yin LIU
  • MEMS pressure sensor and microphone devices having through-vias and methods of forming same
    Patent number: 10519032
    Abstract: A method embodiment includes providing a MEMS wafer. A portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer. The carrier wafer is etched to expose the first membrane and a first surface of the second membrane to an ambient environment. A MEMS structure is formed in the MEMS wafer. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure and a second sealed cavity including a second surface of the second membrane for the pressure sensor device. The cap wafer comprises an interconnect structure. A through-via electrically connected to the interconnect structure is formed in the cap wafer.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • CMOS compatible BioFET
    Patent number: 10520467
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alexander Kalnitsky, Yi-Shao Liu, Kai-Chih Liang, Chia-Hua Chu, Chun-Ren Cheng, Chun-Wen Cheng