Abstract: A silicon-controlled rectifier (SCR) includes a first-type field, a second-type first field and a second-type second field disconnectedly formed in a first-type well; an entire first-type doped region formed within the first-type field; a segmented second-type doped region formed within the second-type first field; and a segmented first-type doped region formed within the second-type second field.

Abstract: A light emitting device is provided. The light emitting device includes a substrate, an N type semiconductor layer formed on the substrate, an active layer, an electron-blocking layer, and a P type semiconductor layer formed on the electron-blocking layer. An N side electrode is formed on a first portion of the N type semiconductor layer, and the active layer is formed on a second portion of the N type semiconductor layer. The electron-blocking layer is a super lattice multi-layer structure formed on the active layer, the P type semiconductor layer is formed on the electron-blocking layer, and a P side electrode is formed on a portion of the P type semiconductor layer.

Abstract: The invention provides a semiconductor device including a substrate, a first dielectric layer, a conductive layer, a ferroelectric material layer, and a charge-trapping layer. The first dielectric layer is disposed on the substrate. The conductive layer is disposed on the first dielectric layer. The ferroelectric material layer and the charge-trapping layer are disposed between the first dielectric layer and the conductive layer by stacking. The semiconductor device of the invention has better memory characteristics and transistor characteristics.

Abstract: Present disclosure provides a method for manufacturing a semiconductor device array, including (1) providing a temporary substrate; (2) forming a plurality of discrete semiconductor structures over the temporary substrate; and (3) removing a surface portion of the temporary substrate to expose a peripheral bottom surface of the discrete semiconductor structure. Present disclosure also provides a method for transferring discrete semiconductor device, including (1) detaching discrete semiconductor structures of a first type from a first temporary substrate supporting the discrete semiconductor structures of the first type by a transfer stamp; (2) carrying the discrete semiconductor structures over a target substrate by the transfer stamp; and (3) dismounting the discrete semiconductor structures of the first type from the transfer stamp to predetermined sites on the target substrate.

Abstract: The invention discloses a social networking system which includes a main data processing apparatus, a plurality of smart clothing apparatus and a plurality of sub-data-processing apparatuses. Each smart clothing apparatus includes a light-emitting device assembly. Each sub-data-processing apparatus corresponds to one of the smart clothing apparatuses. The main data processing apparatus transmits an inquiry information to each sub-data-processing apparatus. The inquiry information includes a plurality of selection data and a plurality of light color data. Each selection datum corresponds to one of the light color data. Each sub-data-processing apparatus receives the inquiry information, displays the plurality of selection data, and transmits, responsive to a selection signal corresponding to one of the selection data, the light color datum corresponding to said one selection datum to the corresponding smart clothing apparatus.

Abstract: An electronic system, an electronic apparatus, and an access authentication method thereof are provided. The electronic system includes a master apparatus and a slave apparatus. The slave apparatus is coupled to the master apparatus through a serial transmission interface. The slave apparatus includes a data storage unit protected by the slave apparatus with a predetermined key. The master apparatus sends an access request to the data storage unit through the serial transmission interface. The slave apparatus determines whether the master apparatus is allowed to access the data storage unit according to the predetermined key and a key inputted by the master apparatus for authentication.

Abstract: A method for fabricating a magnetic capacitor is provided. A first conducting material is deposited to form a first electrode layer. One or more first ferro-magnetic elements are deposited to form magnetic layer and are aligned and magnetized to produce a magnetic field. An insulating material is deposited to form an insulating layer. A second conducting material is deposited to form a second electrode layer. The one or more ferro-magnetic elements are aligned and magnetized to apply the magnetic field to the insulator layer so that the magnetic field is perpendicular to the first electrode layer and the second electrode layer, and so that the magnetic field is periodic along the length of the insulator layer and results in electric dipoles being formed in the insulator layer when a voltage is applied between the first electrode layer and the second electrode layer.

Abstract: A hybrid data transmission method includes broadcasting a request via a first channel from a first host device, wherein the request comprises Internet protocol (IP) address information; replying to the request with a hardware address and a bus identity of a second host device via the first channel according to the IP address information when the second host device receives the request; transmitting the hardware address and the bus identity to a second interface controller when a first interface controller receives the hardware address and the bus identity; setting a second channel according to the hardware address and the bus identity when the second interface controller receives the hardware address and the bus identity; and transmitting a plurality of data packets between the first host device and the second host device via the second channel.

Abstract: A magnetic capacitor includes two electrode layers, an insulator layer, and one or more magnetized layers. The insulator layer is located between the first electrode layer and the second electrode layer. The one or more magnetized layers include one or more ferro-magnetic elements that are magnetized. The one or more magnetized layers are located so that the one or more ferro-magnetic elements apply a magnetic field to the insulator layer to improve an electrical property of the insulator layer. Magnetic fields applied perpendicular to the electrode layers increase the capacitance and electrical energy storage of the insulator layer. Magnetic fields applied parallel to the electrode layers decrease the leakage current and increase the breakdown voltage of the insulator layer. The one or more ferro-magnetic elements used can include ferro-magnetic plates or magnetic nanodots. The one or more magnetized layers can be located between or outside of the electrode layers.

Abstract: A field effect transistor includes a semiconductor substrate having a protrusion with at least one inclined surface, a gate insulator disposed at least on a portion of the inclined surface, and a gate conductor disposed on the gate insulator, wherein the semiconductor substrate comprises doped regions sandwiching a channel region, wherein the at least one inclined surface has a first crystal orientation in the channel region, and the inclined surface has an included angle to a vertical plane with a second crystal orientation. The hole mobility and the electron mobility are substantially the same in the channel region having a crystalline orientation off from the (110) crystal orientation.

Abstract: A lateral diffused N-type metal oxide semiconductor device includes a semiconductor substrate, an epi-layer on the semiconductor substrate, a patterned isolation layer on the epi-layer, a N-type double diffused drain (NDDD) region in a first active region of the patterned isolation layer, a N+ heavily doped drain region disposed in the NDDD region, a P-body diffused region disposed in a second active region of the patterned isolation layer, a neighboring pair of a N+ heavily doped source region and a P+ heavily doped source region disposed in the P-body diffused region, a first gate structure disposed above a channel region of the patterned isolation layer and a second gate structure disposed above the second active region. The second gate structure and the first gate structure are spaced at a predetermined distance. A making method of the NDDD region includes using an ion implant and an epitaxy layer doping.

Abstract: A lateral diffused N-type metal oxide semiconductor device includes a semiconductor substrate, an epi-layer on the semiconductor substrate, a patterned isolation layer on the epi-layer, a N-type double diffused drain (NDDD) region in a first active region of the patterned isolation layer, a N+ heavily doped drain region disposed in the NDDD region, a P-body diffused region disposed in a second active region of the patterned isolation layer, a neighboring pair of a N+ heavily doped source region and a P+ heavily doped source region disposed in the P-body diffused region, a first gate structure disposed above a channel region of the patterned isolation layer and a second gate structure disposed above the second active region. The second gate structure and the first gate structure are spaced at a predetermined distance.

Abstract: A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the rewritable non-volatile memory module; determining whether the wear degree of the rewritable non-volatile memory module is larger than a threshold; and heating the rewritable non-volatile memory module such that the temperature of the rewritable non-volatile memory module lies in between 100° C.˜600° C. if the wear degree of the rewritable non-volatile memory module is larger than the threshold. Accordingly, deteriorated memory cells in the rewritable non-volatile memory module can be repaired, thereby preventing data loss.

Abstract: A semiconductor structure includes a temporary substrate; a first semiconductor layer positioned on the temporary substrate; a dielectric layer comprising a plurality of patterned nano-scaled protrusions disposed on the first semiconductor layer; a dielectric layer surrounding the plurality of patterned nano-scaled protrusions and disposed on the first semiconductor layer; and a second semiconductor layer positioned on the dielectric layer, wherein the top surfaces of the patterned nano-scaled protrusions are in contact with the bottom of the second semiconductor layer. An etching process is performed on the semiconductor structure to separate the first semiconductor layer and the second semiconductor layer, in order to detach the temporary substrate from the second semiconductor layer and transfer the second semiconductor layer to a permanent substrate.

Abstract: The invention discloses an interactive simulated-globe display system including an imaging body, N image-projecting units, a data processing unit, an optical pointer, and M image-capturing units where N and M are respectively a natural number. The N image-projecting units project N images onto an external hemispheric surface of the imaging body. The N images constitute a hemi-globe image of a whole globe image. The data processing unit detects an indicated spot projected on the external hemispheric surface by the M image-capturing units, judges if a track relative to the indicated spot meets one of a plurality of position input rules, and if YES, executes an instruction corresponding to said one position input rule.

Abstract: A communication method of virtual machines and a server-end system are provided. A virtual hardware address is assigned to a virtual machine when the virtual machine are established, wherein the virtual hardware address includes a tenant identity. A validation procedure for a packet is performed when the virtual machine desires to communicate with another virtual machine by transmitting the packet, so as to determine whether the virtual hardware addresses of the source-end and the destination-end in the packet have the same tenant identity. If the both virtual hardware addresses have the same tenant identity, the packet is transmitted to the another virtual machine.

Abstract: A method of operating system (OS) deployment for installing an OS on a plurality of electronic devices includes installing the OS on a sample electronic device; packing the OS in the sample electronic device into a prebuilt package; transmitting the prebuilt package to the plurality of electronic devices; and restoring the prebuilt package to the OS respectively in the plurality of electronic devices.

Abstract: An interactive display system including a data processing unit, a display, a laser pointer, a translucent optical device, an image capture device, and an optical filter is disclosed. The laser pointer projects a laser beam on the translucent optical device attached to or built in a screen of the display. The laser beam has a specified wavelength within a visible light spectrum. The translucent optical device reflects most of the laser beam. The image capture device acquires under the data processing unit a sensed image including a part of a displayed object image within the specified wavelength and the reflected laser beam. The data processing unit determines a position of the laser beam relative to the displayed object image in accordance with light intensity distribution of the sensed image, calculates a distance vector between the determined position and a cursor, and moves the cursor according to the distance vector.

Abstract: A data writing method for writing data into a physical erasing unit and a memory controller and a memory storage apparatus using the data writing method are provided. The method includes dividing the data into a plurality of information frames in a unit of one physical programming unit. The method also includes writing the information frames in sequence into at least one physical programming unit constituted by memory cells disposed on at least one first word line and programming the storage state of memory cells disposed on at least one second word line following the first word line to an auxiliary pattern. Accordingly, the method effectively prevents data stored in the physical erasing unit, which is not full of data, from being lost due to a high temperature.

Abstract: A field effect transistor includes a semiconductor substrate having a protrusion with at least one inclined surface, a gate insulator disposed at least on a portion of the inclined surface, and a gate conductor disposed on the gate insulator, wherein the semiconductor substrate comprises doped regions sandwiching a channel region, wherein the at least one inclined surface has a first crystal orientation in the channel region, and the inclined surface has an included angle to a vertical plane with a second crystal orientation. The hole mobility and the electron mobility are substantially the same in the channel region having a crystalline orientation off from the (110) crystal orientation.