Abstract: A wireless transmission system includes a signal-transmitting device and a signal-receiving device. The signal-transmitting device is disposed in a remote-control apparatus for transmitting wireless signals wherein the remote-control apparatus is a mouse. The signal-receiving device is installed on an electronic apparatus to receive the wireless signals and trigger operations in response the wireless signals. The signal-receiving device includes a patch antenna including a dielectric substrate having a first surface and a second surface opposite to the first surface, a ground layer disposed on the first surface, and a radiating metal layer. The radiating metal layer is disposed on the second surface and includes a radiation receiving surface. A first position of the radiation receiving surface is separated from the ground layer by a first distance, and a second position of the radiation receiving surface is separated from the ground layer by a second distance less than the first distance.

Abstract: A semiconductor package structure includes a package substrate. The package substrate includes a first core structure, a plurality of first dielectric layers, a plurality of first metal layers, a plurality of second dielectric layers, and a plurality of second metal layers. The first core structure has a first surface and a second surface opposite the first surface. The first dielectric layers and the first metal layers are alternatingly stacked on the first surface of the first core structure. The second dielectric layers and the second metal layers are alternatingly stacked on the second surface of the first core structure. A number of second dielectric layers is less than a number of first dielectric layers.

Abstract: An information handling system includes a top portion, a heatsink, a base portion, and a foot portion. The top portion transitions between a closed position and an open position. The heatsink includes a main portion and an extension portion. The main portion of the heatsink is located within the base portion, and extension portion of the heatsink extends beyond a surface of the base portion. The foot portion transitions between a retracted position and an extended position. The foot portion is in the retracted position and the extension portion of the heatsink is surrounded by the foot portion when the top portion is in the closed position. The foot portion is in the extended position and the extension portion of the heatsink is viewable when the top portion is in the open position.

Abstract: A semiconductor structure includes a metal gate structure and an isolation structure adjacent to the metal gate structure. The isolation structure includes a first dielectric layer, a second dielectric layer over the first dielectric layer and a third dielectric layer over the second dielectric layer. The first dielectric layer includes carbon of a first concentration, the second dielectric layer includes carbon of a second concentration, and the third dielectric layer includes carbon of a third concentration. The third concentration is greater than the second concentration, and the second concentration is greater than the first concentration.

Abstract: Provided are a manufacturing method of an overlay mark and an overlay measurement method. The manufacturing method includes the following steps. A first stitching overlay mark structure having a plurality of first patterns is formed on a first layer. A second layer is formed on the first layer. A second stitching overlay mark structure having a plurality of second patterns is formed on the second layer. The second stitching overlay mark structure is located above the first stitching overlay mark structure, and from the top view on the second layer, the second patterns and the first patterns are alternately arranged.

Abstract: A photomask set including a first photomask and a second photomask is provided. The first photomask includes a first pattern. The first pattern includes a first main portion and a first stitching portion connected to each other. The first stitching portion includes a first matching portion and a first overlapping portion connected to each other. The second photomask includes a second pattern. The second pattern includes a second main portion and a second stitching portion connected to each other. The second stitching portion includes a second matching portion and a second overlapping portion connected to each other. After the first photomask is aligned with the second photomask, the first matching portion matches the second matching portion, the first overlapping portion overlaps the second pattern, and the second overlapping portion overlaps the first pattern.

Abstract: An apparatus including a first body; an intake cover; a first hinge coupling the intake cover to the first body such that the intake cover is rotatable with respect to the first body about the first hinge; a second body; a second hinge coupling the second body to the first body; a lever coupled to the second hinge, the lever including a shaft; and a lift bar coupled to the first body and rotatable about a first end of the lift bar, wherein the lever is configured to rotate about the second hinge in response to rotation of the second body about the second hinge with respect to the first body such that the shaft of the lever contacts the lift bar to rotate the lift bar to contact the intake cover and rotate the intake cover about the first hinge.

Abstract: A semiconductor device structure includes first nanostructures and second nanostructures formed over a substrate. The structure also includes gate structures that are wrapped around the first nanostructures and the second nanostructures and that extend along a first direction. The structure also includes a dielectric structure formed between two of the gate structures and parallel to the gate structures. A first sidewall of the first nanostructures is shifted from a first sidewall of the second nanostructures in a second direction, the second direction is different from the first direction.

Abstract: As deposited, hard mask thin films have internal stress components which are an artifact of the material, thickness, deposition process of the mask layer as well as of the underlying materials and topography. This internal stress can cause distortion and twisting of the mask layer when it is patterned, especially when sub-micron critical dimensions are being patterned. A stress-compensating process is employed to reduce the impact of this internal stress. Heat treatment can be employed to relax the stress, as an example. In another example, a second mask layer with an opposite internal stress component is employed to offset the internal stress component in the hard mask layer.

Abstract: A method includes forming first and second semiconductor fins and a gate structure over a substrate; forming a first and second source/drain epitaxy structures over the first and second semiconductor fins; forming an interlayer dielectric (ILD) layer over the first and second source/drain epitaxy structures; etching the gate structure and the ILD layer to form a trench; performing a first surface treatment to modify surfaces of a top portion and a bottom portion of the trench to NH-terminated; performing a second surface treatment to modify the surfaces of the top portion of the trench to N-terminated, while leaving the surfaces of the bottom portion of the trench being NH-terminated; and depositing a first dielectric layer in the trench, wherein the first dielectric layer has a higher deposition rate on the surfaces of the bottom portion of the trench than on the surfaces of the bottom portion of the trench.

Abstract: An optimization method for a mask pattern optical transfer includes steps as follows: First, a projection optical simulation is performed to obtain an optimal pupil configuration scheme corresponding to a virtual mask pattern. Next, a position scanning is performed to change the optimal pupil configuration scheme, so as to generate a plurality of adjusted pupil configuration schemes. A mask pattern transfer simulation is performed to obtain a plurality of pupil configuration schemes-critical dimension relationship data corresponding to the virtual mask pattern. Subsequently, an actual pupil configuration scheme suitable for an actual mask pattern is selected according to the plurality of pupil configuration schemes-critical dimension relationship data, and upon which an actual mask pattern transfer is performed.

Abstract: As deposited, hard mask thin films have internal stress components which are an artifact of the material, thickness, deposition process of the mask layer as well as of the underlying materials and topography. This internal stress can cause distortion and twisting of the mask layer when it is patterned, especially when sub-micron critical dimensions are being patterned. A stress-compensating process is employed to reduce the impact of this internal stress. Heat treatment can be employed to relax the stress, as an example. In another example, a second mask layer with an opposite internal stress component is employed to offset the internal stress component in the hard mask layer.

Abstract: An information handling system includes a host processing system and a Liquid Crystal Display device. The host processing system includes a graphics processing unit (GPU) and the LCD device includes a memory device and a DisplayPort Configuration Data (DPCD) register. The host processing system 1) determines whether the first GPU supports a Dynamic Display Shifting (DDS) mode, 2) when the GPU does not support the DDS mode, provides a first indication to the LCD device that the GPU does not support the DDS mode, and 3) when the GPU supports the DDS mode, provides a second indication to the LCD device that the GPU supports the DDS mode. The LCD device retrieves a Panel Self Refresh (PSR) setting from the memory device and stores the PSR setting to the DPCD register in response to the first indication, and retrieves a DDS setting from the memory and stores the DDS setting to the DPCD register in response to the second indication.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes first and second gate structures formed over a semiconductor substrate and a multilayer gate isolation structure separating the first gate structure from the second gate structure. The multilayer gate isolation structure includes a first insulating feature adjacent to upper portions of the first gate structure and the second gate structure, and a second insulating feature separating the semiconductor substrate from the first insulating feature. The material of the second insulating feature is different than that of the first insulating feature. The second insulating feature has a lower dielectric constant or lower etch resistance than the first insulating feature.

Abstract: A semiconductor device structure and a formation method are provided. The method includes forming a dummy gate stack over a substrate and forming a dielectric layer laterally surrounding the dummy gate stack. The method also includes introducing dopants into an upper portion of the dielectric layer and removing the dummy gate stack to form a trench surrounded by the dielectric layer. The method further includes forming a metal gate stack in the trench.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack over a substrate. The first gate stack includes a first gate electrode and a dielectric layer between the first gate electrode and the substrate, and the first gate electrode has a void. The method includes oxidizing a side portion of the first gate electrode to form an oxide layer over the first gate electrode. The oxide layer fills the void.

Abstract: A wireless transmission system includes a signal-transmitting device and a signal-receiving device. The signal-transmitting device is disposed in a remote-control apparatus for transmitting wireless signals wherein the remote-control apparatus is a mouse. The signal-receiving device is installed on an electronic apparatus to receive the wireless signals and trigger operations in response the wireless signals. The signal-receiving device includes a patch antenna including a dielectric substrate having a first surface and a second surface opposite to the first surface, a ground layer disposed on the first surface, and a radiating metal layer. The radiating metal layer is disposed on the second surface and includes a radiation receiving surface. A first position of the radiation receiving surface is separated from the ground layer by a first distance, and a second position of the radiation receiving surface is separated from the ground layer by a second distance less than the first distance.

Abstract: An information handling system includes a host processing system and a Liquid Crystal Display device. The host processing system includes a graphics processing unit (GPU) and the LCD device includes a memory device and a DisplayPort Configuration Data (DPCD) register. The host processing system 1) determines whether the first GPU supports a Dynamic Display Shifting (DDS) mode, 2) when the GPU does not support the DDS mode, provides a first indication to the LCD device that the GPU does not support the DDS mode, and 3) when the GPU supports the DDS mode, provides a second indication to the LCD device that the GPU supports the DDS mode. The LCD device retrieves a Panel Self Refresh (PSR) setting from the memory device and stores the PSR setting to the DPCD register in response to the first indication, and retrieves a DDS setting from the memory and stores the DDS setting to the DPCD register in response to the second indication.

Abstract: As deposited, hard mask thin films have internal stress components which are an artifact of the material, thickness, deposition process of the mask layer as well as of the underlying materials and topography. This internal stress can cause distortion and twisting of the mask layer when it is patterned, especially when sub-micron critical dimensions are being patterned. A stress-compensating process is employed to reduce the impact of this internal stress. Heat treatment can be employed to relax the stress, as an example. In another example, a second mask layer with an opposite internal stress component is employed to offset the internal stress component in the hard mask layer.

Abstract: A stacked testing assembly (100) includes a microfluidic cartridge (10) for analyzing a fluid sample and a testing setup, said microfluidic cartridge includes a number of layers (1, 2) stacked in a height direction with many different kinds of combinations, said testing setup (20) is capable of assembling and testing all kinds of said layers combinations with no change to the setup.