Patents by Inventor Chun-Yi Wu

Chun-Yi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8474233
    Abstract: An optoelectronic device has a substrate and a first window layer on the substrate with a first sheet resistance, a first thickness, and a first impurity concentration. A second window layer has a second sheet resistance, a second thickness, and a second impurity concentration. A semiconductor system is between the first window layer and the second window layer. The second window layer has a semiconductor material different from the semiconductor system, and the second sheet resistance is greater than the first sheet resistance. A method for manufacturing is provided, having the steps of providing a substrate, forming a semiconductor system on the substrate, and forming a window layer on the semiconductor system. The window layer has a semiconductor material different from the semiconductor system. Selectively removing the window layer forms a width difference greater than 1 micron between the window layer and semiconductor system.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: July 2, 2013
    Assignee: Epistar Corporation
    Inventors: Shih-I Chen, Chia-Liang Hsu, Tzu-Chieh Hsu, Chun-Yi Wu, Chien-Fu Huang
  • Patent number: 8336693
    Abstract: A bicycle hub comprises: a housing, a driving base in the housing, and an engaging unit for the driving base to drive the housing in a single direction. The engaging unit consists of several claws and elastic elements surrounding thereon. Each of the elastic elements is an arc hook and urges against the corresponding claw. The claws thus enable the driving base to drive the housing.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: December 25, 2012
    Inventor: Chun-Yi Wu
  • Publication number: 20120256164
    Abstract: An optoelectronic device has a substrate and a first window layer on the substrate with a first sheet resistance, a first thickness, and a first impurity concentration. A second window layer has a second sheet resistance, a second thickness, and a second impurity concentration. A semiconductor system is between the first window layer and the second window layer. The second window layer has a semiconductor material different from the semiconductor system, and the second sheet resistance is greater than the first sheet resistance. A method for manufacturing is provided, having the steps of providing a substrate, forming a semiconductor system on the substrate, and forming a window layer on the semiconductor system. The window layer has a semiconductor material different from the semiconductor system. Selectively removing the window layer forms a width difference greater than 1 micron between the window layer and semiconductor system.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Inventors: Shih-I Chen, Chia-Liang Hsu, Tzu-Chieh Hsu, Chun-Yi Wu, Chien-Fu Huang
  • Publication number: 20120251916
    Abstract: A fuel cell unit including a membrane electrode assembly (MEA), a cathode collector plate, an anode collector plate, and a plurality of ribs is provided. The cathode collector plate is disposed at one side of the membrane electrode assembly. The anode collector plate is disposed at another side of the membrane electrode assembly. A material of the anode collector plate may be metal. The ribs are respectively disposed on the anode collector plate. A material of the ribs may be metal. The ribs and the anode collector slate form a plurality of gas channels for supplying a reaction gas to the membrane electrode assembly.
    Type: Application
    Filed: February 24, 2012
    Publication date: October 4, 2012
    Applicant: YOUNG GREEN ENERGY CO.
    Inventors: Yueh-Chang Wu, Chih-Lin Ho, Hsuan-Yi Lu, Chun-Yi Wu
  • Publication number: 20120231560
    Abstract: A semiconductor light-emitting device having a thinned structure comprises a thinned structure formed between a semiconductor light-emitting structure and a carrier. The manufacturing method comprises the steps of forming a semiconductor light-emitting structure above a substrate; attaching the semiconductor light-emitting structure to a support; thinning the substrate to form a thinned structure; forming or attaching a carrier to the thinned substrate; and removing the support.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Inventors: Min-Hsun Hsieh, Chih-Chiang Lu, Chien-Yuan Wang, Yen-Wen Chen, Jui-Hung Yeh, Shih-Chin Hung, Yu-Wei Tu, Chun-Yi Wu, Wei-Chih Peng
  • Patent number: 8258741
    Abstract: A solar power management system is provided for managing electric energy conversion by a photovoltaic cell module, supplying the converted electric energy to an external load, and storing the converted electric energy in a battery. The solar power management system comprises a multiphase maximum power tracking (MPT) module, a charging circuit, and a voltage conversion module. The multiphase MPT module regulates output current of the photovoltaic cell module to output maximum power within the high limit thereof and obtain improved solar energy conversion efficiency. The voltage conversion module converts the electric energy generated by the photovoltaic cell module into different voltage formats, such as 5.6V DC, 1.0V DC, 0.6˜0.3V DC low voltage, or ?1.2V DC negative voltage, to meet different external load requirements. The solar power management system has simple circuitry and can be configured as a system on chip (SoC) at reduced cost while provides very wide applications.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: September 4, 2012
    Assignee: National Chiao Tung University
    Inventors: Chun-Yi Wu, Wei-Chih Hsieh, Wei Hwang
  • Patent number: 8207539
    Abstract: A semiconductor light-emitting device having a thinned structure comprises a thinned structure formed between a semiconductor light-emitting structure and a carrier. The manufacturing method comprises the steps of forming a semiconductor light-emitting structure above a substrate; attaching the semiconductor light-emitting structure to a support; thinning the substrate to form a thinned structure; forming or attaching a carrier to the thinned substrate; and removing the support.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: June 26, 2012
    Assignee: Epistar Corporation
    Inventors: Min-Hsun Hsieh, Chih-Chiang Lu, Chien-Yuan Wang, Yen-Wen Chen, Jui-Hung Yeh, Shih-Chin Hung, Yu-Wei Tu, Chun-Yi Wu, Wei-Chih Peng
  • Patent number: 8207550
    Abstract: One aspect of the present disclosure provides an optoelectronic device comprising a substrate; a first window layer on the substrate, having a first sheet resistance, a first thickness, and a first impurity concentration; a second window layer having a second sheet resistance, a second thickness, and a second impurity concentration; and a semiconductor system between the first window layer and the second window layer; wherein the second window layer comprises a semiconductor material different from the semiconductor system, and the second sheet resistance is greater than the first sheet resistance. One aspect of the present disclosure provides a method for manufacturing an optoelectronic device in accordance with the present disclosure.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: June 26, 2012
    Assignee: EPISTAR Corporation
    Inventors: Shih-I Chen, Chia-Liang Hsu, Tzu-Chieh Hsu, Chun-Yi Wu, Chien-Fu Huang
  • Patent number: 8125263
    Abstract: A charge pump is disclosed for amplifying an input voltage received at an input end and outputting the amplified voltage at an output end as an output voltage. The charge pump includes a plurality of source/drain coupling transistors for serving as charging capacitors, and a plurality of cascode-connected transistors being symmetrically connected to between the input end and the output end. The charge pump further includes a plurality of diode-connected transistors to protect the source/drain coupling transistors against breakdown during the course of charge transfer and to speed up the charge transfer.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: February 28, 2012
    Assignee: National Chiao Tung University
    Inventors: Chun-Yi Wu, Wei-Chih Hsieh, Ming-Hung Chang, Wei Hwang
  • Publication number: 20110292625
    Abstract: A bonding pad structure is disclosed, which is composed of two bonding pad units that are symmetrically disposed with respect to an axial line. Each bonding pad units is further composed of at least two bonding pads, i.e. each bonding pad unit is composed of at least one first bonding pad and at least one second bonding pad. In an embodiment, the first bonding pad is arranged next to the axial line and the second bonding pad is arranged at a side of the corresponding first bonding pad away from the axial line while enabling the first bonding pad and the corresponding second bonding pad to be interconnected to each other by a first neck portion. Thereby, a plurality of solder areas of different sizes can be formed by the interconnecting of the at least two bonding pad units that can be used for soldering electronic components of different sizes.
    Type: Application
    Filed: May 27, 2011
    Publication date: December 1, 2011
    Applicant: WINTEK CORPORATION
    Inventors: HAN-CHUNG CHEN, Chun-Yi Wu, Shih-Cheng Wang, Chin-Mei Huang, Tsui-Chuan Wang, Pei-Fang Tsai
  • Publication number: 20110254046
    Abstract: The present invention is related to a light-emitting device. The present invention illustrates a vertical light-emitting device in one embodiment, comprising the following elements: a conductive substrate includes a through-hole, a patterned semiconductor structure disposed on a first surface of the substrate, a first bonding pad and a second bonding pad disposed on a second surface of the substrate, a conductive line passing through the through-hole connecting electrically the semiconductor structure layer, and an insulation layer on at least one sidewall of the through-hole insulates the conductive line form the substrate.
    Type: Application
    Filed: June 30, 2011
    Publication date: October 20, 2011
    Applicant: Epistar Corporation
    Inventors: Chia-Liang Hsu, Chih-Chiang Lu, Chien-Fu Huang, Chun-Yi Wu
  • Patent number: 8025139
    Abstract: A clutch having high engaging force and featuring of smooth operation, wherein clutch weights that are biased by return elements are subject to thrusting force caused by constraint sections of a main driving plate that receive and convert torque from an engine into the pressing action against engaging slots defined in the clutch weights so as to gain enhanced engaging force even when the minor difference or error existing on the response time of the clutch weight or the strength of the return elements and also provides anti-reversal function to reduced the oscillation and let the power output more smooth and more stable. Accordingly, slippage of clutch and wear of the clutch wear pad are both reduced and temperature rise of the wear pad is also reduced.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: September 27, 2011
    Inventors: Norman Lean, Chun-Yi Wu
  • Publication number: 20110221512
    Abstract: A charge pump is disclosed for amplifying an input voltage received at an input end and outputting the amplified voltage at an output end as an output voltage. The charge pump includes a plurality of source/drain coupling transistors for serving as charging capacitors, and a plurality of cascode-connected transistors being symmetrically connected to between the input end and the output end. The charge pump further includes a plurality of diode-connected transistors to protect the source/drain coupling transistors against breakdown during the course of charge transfer and to speed up the charge transfer.
    Type: Application
    Filed: June 30, 2010
    Publication date: September 15, 2011
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Chun-Yi WU, Wei-Chih HSIEH, Ming-Hung CHANG, Wei HWANG
  • Patent number: 8007730
    Abstract: An automatic synthesis device for fluorine-18-ACETATE ([18F]fluoroacetate) consists of a machinery housing that has multiple reactors and multiple raw material containers, and uses multiple control valves between each reactor and container, and operates the control valves through a control system to charge the raw material from each container to each reactor in an automatic and sequential fashion to execute the six procedures: fluorination, azeotropic dewatering, synthesis (reaction with precursors), purification and separation, hydrolysis and neutralization, purification and collection. The operation simply requires adding raw materials to the containers in advance, turning on power, charging reactive gases. In 50 minutes, the process to produce the product will be completed. The operation is really simple and can effectively improve production efficiency.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: August 30, 2011
    Assignee: Institute of Nuclear Energy Research
    Inventors: Ming-Hsin Li, Hsin-EII Wang, Chun-Yi Wu, Wuu-Jyh Lin
  • Publication number: 20110193515
    Abstract: A solar power management system is provided for managing electric energy conversion by a photovoltaic cell module, supplying the converted electric energy to an external load, and storing the converted electric energy in a battery. The solar power management system comprises a multiphase maximum power tracking (MPT) module, a charging circuit, and a voltage conversion module. The multiphase MPT module regulates output current of the photovoltaic cell module to output maximum power within the high limit thereof and obtain improved solar energy conversion efficiency. The voltage conversion module converts the electric energy generated by the photovoltaic cell module into different voltage formats, such as 5.6V DC, 1.0V DC, 0.6˜0.3V DC low voltage, or ?1.2V DC negative voltage, to meet different external load requirements. The solar power management system has simple circuitry and can be configured as a system on chip (SoC) at reduced cost while provides very wide applications.
    Type: Application
    Filed: July 8, 2010
    Publication date: August 11, 2011
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: CHUN-YI WU, WEI-CHIH HSIEH, WEI HWANG
  • Publication number: 20110193119
    Abstract: One aspect of the present disclosure provides an optoelectronic device comprising a substrate; a first window layer on the substrate, having a first sheet resistance, a first thickness, and a first impurity concentration; a second window layer having a second sheet resistance, a second thickness, and a second impurity concentration; and a semiconductor system between the first window layer and the second window layer; wherein the second window layer comprises a semiconductor material different from the semiconductor system, and the second sheet resistance is greater than the first sheet resistance. One aspect of the present disclosure provides a method for manufacturing an optoelectronic device in accordance with the present disclosure.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 11, 2011
    Inventors: Shih-I CHEN, Chia-Liang HSU, Tzu-Chieh HSU, Chun-Yi WU, Chien-Fu HUANG
  • Patent number: 7973331
    Abstract: The present invention is related to a light-emitting device. The present invention illustrates a vertical light-emitting device in one embodiment, comprising the following elements: a conductive substrate includes a through-hole, a patterned semiconductor structure disposed on a first surface of the substrate, a first bonding pad and a second bonding pad disposed on a second surface of the substrate, a conductive line passing through the through-hole connecting electrically the semiconductor structure layer, and an insulation layer on at least one sidewall of the through-hole insulates the conductive line form the substrate.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: July 5, 2011
    Assignee: Epistar Corporation
    Inventors: Chia-Liang Hsu, Chih-Chiang Lu, Chien-Fu Huang, Chun-Yi Wu
  • Patent number: D648287
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: November 8, 2011
    Assignee: Epistar Corporation
    Inventors: Chia-Liang Hsu, Han-Min Wu, Shih-I Chen, Chun-Yi Wu, Mei-Chun Liu
  • Patent number: D676001
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: February 12, 2013
    Assignee: Epistar Corporation
    Inventors: Chia-Liang Hsu, Chun-Yi Wu, Shih-I Chen
  • Patent number: D680977
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: April 30, 2013
    Assignee: Epistar Corporation
    Inventors: Chia-Liang Hsu, Chun-Yi Wu, Shih-I Chen