Abstract: Methods and systems for detecting objects from aerial imagery are disclosed. According to certain embodiments, the method may include obtaining a Digital Surface Model (DSM) image of an area. The method may also include obtaining a DSM image of one or more target objects. The method may further include detecting the target object in the area based on the DSM images of the area and the one or more target objects. The method may further include recognizing the detected target objects by artificial intelligence. The method may further include acquiring the positions of the recognized target objects. The method may further include calculating the number of the recognized target objects.

Abstract: A light emitting diode includes a segmented quantum well formed via selective growth method to avoid re-absorption effect of photons in the LED internal quantum well. This improves external extraction efficiency and increases luminance. The light emitting diode includes a first semiconductor layer, an active layer, and a second semiconductor layer, wherein, the upper surface of the first semiconductor layer has a first growth region and a second growth region; the active layer is formed only in the first growth region via selective epitaxial growth; and the second semiconductor layer covers the active layer and the second growth region of the first semiconductor layer via epitaxial growth.

Abstract: An infrared light-emitting diode includes, from up to bottom, a P-type ohmic electrode, a contact layer, a P-type cladding layer, an active layer, an N-type cladding layer, a buffer layer, a GaAs substrate and an N-type ohmic electrode. The N-type cladding layer and the P-type cladding layer or either of them is InxGa1-xAs. The cladding layer of InxGa1-xAs, due to low resistance, can improve current expansion, reduce voltage and improve light-emitting efficiency.

Abstract: A light-emitting diode includes a light-emitting epitaxial laminated layer with an upper surface including an ohmic contact region and a non-ohmic contact region; an ohmic contact layer in the ohmic contact region; an expanding electrode over the ohmic contact layer, at least a part of which contacts with the upper surface of the light-emitting epitaxial laminated layer; a transparent insulating layer that covers the expanding electrode, the exposed ohmic contact layer and the upper surface of the light-emitting epitaxial laminated layer, having a current channel connected to the expanding electrode; a welding wire electrode over the transparent insulating layer, which connects to the expanding electrode via a current channel; when current is input, current quickly flows to the ohmic contact region along the current channel under the welding wire electrode, so that no current is input to the active layer under the welding wire electrode for lighting.

Abstract: A chip is provided. A power transmission path and a data transmission path are coupled between an upstream port and a downstream port. A first detection unit generates a first trigger signal when a voltage level of the power transmission path reaches a first predetermined value. A first control unit turns on the data transmission path according to the first trigger signal. A second detection unit detects a voltage level of the data transmission path. When the voltage level of the data transmission path matches a pre-determined condition, the second detection unit generates a second trigger signal, and the first control unit turns off the data transmission path according to the second trigger signal. A setting unit sets the voltage level of the data transmission path when the first control unit turns off the data transmission path.

Abstract: An invisible-light light-emitting diode includes an N-type ohmic contact semiconductor layer, an N-type current spreading layer, an N—GaAs visible-light absorption layer, an N-type cladding layer, a light-emitting layer, a P-type cladding layer and a P-type ohmic contact semiconductor layer. In the invisible-light light-emitting diode, the absorption layer is GaAs, which can effectively remove all visible light when current density is >1 A/mm2, and essentially all visible light when current density is below 3 A/mm2. This effectively solves the red dot effect of invisible-light light-emitting diodes.

Abstract: A light-emitting diode chip includes an electrical connection layer is arranged over the light-emitting surface of the light-emitting epitaxial laminated layer, which is not connected with isolation of the dielectric layer. After CMP treatment, the flat surface is plated with a transparent current spreading layer, which reduces horizontal conduction resistance of the transparent current spreading layer and replaces the metal spreading finger for horizontal conduction.

Abstract: A flip-chip light-emitting diode chip with a patterned transparent bonding layer includes: an epitaxial laminated layer, having an upper surface and a lower surface opposite to each other, which further includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer. Part of the n-type semiconductor layer and the active layer are etched to expose part of the p-type semiconductor layer. A first electrode is over the surface of the n-type semiconductor layer, and a second electrode is over the surface of the exposed p-type semiconductor layer. A transparent medium layer over the upper surface of the epitaxial laminated layer, wherein the upper surface is provided with a grid-shaped or array-shaped recess region. A patterned transparent bonding medium layer fills up the recess region of the transparent medium layer, and the upper surface is at the same plane with the upper surface of the transparent medium layer.

Abstract: A light-emitting diode chip includes a first semiconductor layer, a second semiconductor layer and an active layer between them; an dielectric layer having a conductive through-hole array over the lower surface of the light-emitting epitaxial laminated layer; a metal conductive layer over the lower surface of the dielectric layer, which fills up the conductive through-hole, and forms ohmic contact with the light-emitting epitaxial laminated layer; a conductive substrate over the lower surface of the metal conductive layer for supporting the light-emitting epitaxial laminated layer; a first electrode comprising a bonding pad electrode and a finger-shape electrode over the upper surface of the light-emitting epitaxial laminated layer, wherein, a rotation angle is formed between the conductive through-hole array and the finger-shape electrode, which is selected to prevent a preferred number of conductive through-holes from being shielded by the bonding pad electrode and the finger-shape electrode.

Abstract: A fabrication method of a vertical light-emitting diode, such as an infrared light-emitting diode, includes heating the reaction chamber during growth of the reflective layer to pre-diffuse the metal molecules of the reflective layer into the epitaxial layer. As a result, the diffusion of the metal molecules in the reflective layer into the epitaxial layer during high-temperature fusion of the reflective layer and the epitaxial layer slows down, and the blackness level of conventional ohm contact holes is reduced.

Abstract: A connection device including a first connection port, a second connection port, a third connection port and a chip is provided. When a host device is coupled to the first connection port and an electronic device is coupled to the second connection port, the connection device sets the level of an identification pin of the second connection port to a high level such that the electronic device operates in a device mode. In the device mode, the host device provides power to the electronic device. When the electronic device is coupled to the second connection port and a peripheral device is coupled to the third connection port, the connection device sets the level of the identification pin to a low level such that the electronic device operates in a host mode. In the host mode, the electronic device provides power to the peripheral device.

Abstract: A wafer and a forming method thereof are provided. The wafer has a die region and a scribe-line region adjacent to the die region, and includes a conductive bonding pad in the die region of the wafer and a wafer acceptance test (WAT) pad in the scribe-line region of the wafer. A top surface of the WAT pad is lower than a top surface of the conductive bonding pad.

Abstract: A light-emitting diode includes: an epitaxial-laminated layer having from bottom up: an n-type ohmic contact layer, a first n-type transition layer, an n-type etching-stop layer, a second n-type transition layer, an n-type confinement layer, an active layer, a p-type confinement layer, a p-type transition layer and a p-type window layer; a p electrode on the upper surface of the p-type window layer; a metal bonding layer over the bottom surface of the n-type ohmic contact layer, wherein, the portion corresponding to the p electrode position extends upwards and passes through the n-type ohmic contact layer and the first n-type transition layer, till the n-type etching-stop layer, thereby forming a current distribution adjustment structure such that the injected current would not flow towards the epitaxial-laminated layer right below the p electrode; and a conductive substrate over the bottom surface of the metal bonding layer.

Abstract: A light-emitting diode (LED) structure and a fabrication method thereof effectively enhance external extraction efficiency of the LED, which includes: a light-emitting epitaxial laminated layer, a transparent dielectric layer, and a transparent conductive layer forming a reflectivity-enhancing system; and a metal reflective layer. The light-emitting epitaxial laminated layer has opposite first and second surfaces, and includes an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer. The transparent dielectric layer is on the second surface, inside which are conductive holes. The transparent conductive layer is located on one side surface of the transparent dielectric layer distal from the light-emitting epitaxial laminated layer. The metal reflective layer is located on one side surface of the transparent conductive layer distal from the transparent dielectric layer.

Abstract: A wafer and a forming method thereof are provided. The wafer has a die region and a scribe-line region adjacent to the die region, and includes a conductive bonding pad in the die region of the wafer and a wafer acceptance test (WAT) pad in the scribe-line region of the wafer. A top surface of the WAT pad is lower than a top surface of the conductive bonding pad.

Abstract: A power management circuit is provided. The power management circuit includes a power switch, a current/voltage detector, a current setting unit, and a control unit. The power switch is coupled to a power supply of the computer system. When the power switch is turned on, it supplies an output current and an output voltage of the power supply to an external device. The current/voltage detector detects the magnitudes of the output current and the output voltage. The current setting unit sets a plurality of current thresholds. When the computer system is in a power-saving state and when the output current is greater than a first current threshold and smaller than a second current threshold or the output voltage is smaller than a first voltage threshold and larger than a second voltage threshold, the control unit issues a notification signal to execute a predetermined operation on the power supply.

Abstract: A four-element light emitting diode with a transparent substrate, comprising a AlGaInP light emitting diode (LED) epitaxial wafer, and the surface of a GaP layer of the AlGaInP-LED epitaxial wafer is roughened into a bonding surface, a film is plated on the bonding surface and is bonded with a transparent substrate, and finally a GaAs substrate is removed. The transparent bonding disclosed herein can replace the GaAs substrate made of light absorption materials with the transparent substrate by substrate transfer technology, increasing the light emitting efficiency of the light emitting diode chip and avoiding extremely low external quantum efficiency caused due to the limitations of the material of conventional AlGaInP light emitting diode and the substrate; in addition, with the support of the cut path pre-etching technology, back melting or splashing during the epitaxial layer cutting process is avoided, light emitting efficiency is increased and electric leakage risk is eliminated.

Abstract: A light emitting diode includes: a substrate; a semiconductor light emitting laminate on the substrate, including from bottom up a first semiconductor layer, an active layer, and a second semiconductor layer electrically dissimilar to the first semiconductor layer; a transparent conductive layer with an opening portion; the first electrode electrically connected with the first semiconductor layer; and the second electrode electrically connected with the second semiconductor layer; the second electrode fills the opening portion, and the position where the second electrode contacts the transparent conductive layer is arranged with a recessed portion, and the second electrode is embedded in the transparent conductive layer.

Abstract: A high-brightness light-emitting diode with surface microstructure and preparation and screening methods thereof are provided. The ratio of total roughened surface area of light transmission surface of a light emitting diode to vertically projected area is greater than 1.5, and the peak density of light transmission surface is not less than 0.3/um2. The higher the ratio of total roughened surface area of an epitaxial wafer to vertically projected area and the higher the number of peak over the critical height within a unit area, the more beneficial to improve light extraction efficiency of the epitaxial wafer. As a result, light extraction efficiency of the epitaxial wafer is greatly improved.

Abstract: A chip is provided. A power transmission path and a data transmission path are coupled between an upstream port and a downstream port. A first detection unit generates a first trigger signal when a voltage level of the power transmission path reaches a first predetermined value. A first control unit turns on the data transmission path according to the first trigger signal. A second detection unit detects a voltage level of the data transmission path. When the voltage level of the data transmission path matches a pre-determined condition, the second detection unit generates a second trigger signal, and the first control unit turns off the data transmission path according to the second trigger signal. A setting unit sets the voltage level of the data transmission path when the first control unit turns off the data transmission path.