Patents by Inventor Chun-Yu Lin

Chun-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12214462
    Abstract: A monitoring method and a monitoring system for a machine tool to machine a workpiece are provided. The monitoring method includes the following steps. First, a vibration signal of a spindle of the machine tool is detected. Next, a vibration feature value of the vibration signal is obtained. Whether the vibration feature value exceeds a threshold condition is determined, wherein the threshold condition is determined by a training model based on a predetermined surface quality of the workpiece. When the vibration feature value exceeds the threshold condition, a machining parameter of the machine tool is adjusted.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: February 4, 2025
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Yu Tsai, Chi-Chen Lin, Sheng-Ming Ma, Ta-Jen Peng
  • Publication number: 20240421253
    Abstract: An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure located on the substrate, a second type semiconductor structure located on the first type semiconductor structure, an active structure located between the first type semiconductor structure and the second type semiconductor structure, a plurality of contact portions disposed between the first type semiconductor structure and the substrate, and a first conductive oxide layer, a second conductive oxide layer, a first insulating layer and a second insulating layer. The plurality of contact portions is separated from each other, and one of them includes a semiconductor and has a side wall. The first conductive oxide layer contacts the contact portion, and the second conductive oxide layer contacts the first conductive oxide layer. The first insulating layer contacts the side wall. The second insulating layer is disposed between the first insulating layer and the second conductive oxide layer.
    Type: Application
    Filed: August 26, 2024
    Publication date: December 19, 2024
    Inventors: Chung-Hao WANG, Yu-Chi WANG, Yi-Ming CHEN, Yi-Yang CHIU, Chun-Yu LIN
  • Publication number: 20240413268
    Abstract: A semiconductor device includes a semiconductor stack, a reflective structure, and a conductive structure. The semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active region located between the first semiconductor structure and the second semiconductor structure. The reflective structure is located at a side of semiconductor stack closed to the first semiconductor structure, and includes a first metal. The conductive structure locates between the reflective structure and the first semiconductor structure, and includes a first region overlapping with the active structure and a second region which does not overlap with the active structure. The first metal in the second region has a concentration smaller than 5 atomic percent.
    Type: Application
    Filed: June 7, 2024
    Publication date: December 12, 2024
    Inventors: Yi-Yang CHIU, Chun-Yu LIN, Chun Wei CHANG, Yi-Ming CHEN, Chen OU, Hung-Yu CHOU, Liang-Yi WU, Hsiao-Chi YANG
  • Patent number: 12136379
    Abstract: A display panel includes a plurality of driving electrode regions and a plurality of wiring regions connected between the driving electrode regions. A (2n?1)th wiring region extended from a (2n?1)th driving electrode region toward a (2n)th driving electrode region has a wiring extending direction forming a first included angle with an arrangement direction, and a (2n)th wiring region extended from the (2n)th driving electrode region toward a (2n+1)th driving electrode region has a wiring extending direction forming a second included angle with the arrangement direction, and a (2n+1)th wiring region extended from the (2n+1)th driving electrode region toward a (2n+2)th driving electrode region has a wiring extending direction forming a third included angle with the arrangement direction, wherein n is a positive integer. At least one of the first included angle, the second included angle and the third included angle is positive and at least one of them is negative.
    Type: Grant
    Filed: July 10, 2023
    Date of Patent: November 5, 2024
    Assignee: AUO Corporation
    Inventors: Chun-Yu Lin, Kun-Cheng Tien, Jia-Long Wu, Rong-Fu Lin, Shu-Hao Huang
  • Patent number: 12074252
    Abstract: An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure, a second type semiconductor structure, an active structure and a contact structure. The first type semiconductor structure is located on the substrate and has a first protrusion part with a first thickness and a platform part with a second thickness. The second type semiconductor structure is located on the first type semiconductor structure. The active structure is between the first type semiconductor structure and the second type semiconductor structure. The contact structure is disposed between the first type semiconductor structure and the substrate. The second thickness of the platform part is in a range of 0.01 ?m to 1 ?m.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: August 27, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chung-Hao Wang, Yu-Chi Wang, Yi-Ming Chen, Yi-Yang Chiu, Chun-Yu Lin
  • Publication number: 20240204898
    Abstract: A time synchronization method for a plurality of time synchronization domains includes building a plurality of precision time protocol (PTP) instances corresponding to the plurality of time synchronization domains; determining a grandmaster clock; and synchronizing, by the plurality of PTP instances, timings of the plurality of time synchronization domains according to the grandmaster clock.
    Type: Application
    Filed: July 26, 2023
    Publication date: June 20, 2024
    Applicant: Moxa Inc.
    Inventors: Chi-Chuan Liu, Chun-Yu Lin, Chien-Yu Lai, Po-Hung Lin
  • Publication number: 20240186447
    Abstract: The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Inventors: Chien-Fu HUANG, Chih-Chiang LU, Chun-Yu LIN, Hsin-Chih CHIU
  • Publication number: 20240179065
    Abstract: An auto-configuration method for a time-sensitive networking (TSN) system includes obtaining, by a first OPC UA client module, a TSN configuration of a stream; transmitting, by the first OPC UA client module, the TSN configuration to an OPC UA server module of a centralized user configuration (CUC) in the TSN system; obtaining, by the CUC, a routing information and scheduling of the stream according to the TSN configuration and a network topology; sending, by the first OPC UA client module, a request to the OPC UA server to obtain the routing information and scheduling of the stream; and configuring the routing information and scheduling of the stream to a plurality of end stations in the TSN system after the plurality of end stations are online.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 30, 2024
    Applicant: Moxa Inc.
    Inventors: Yueh-Ming Ko, Chun-Yu Lin, Tzu-Lun Huang
  • Publication number: 20240150308
    Abstract: The invention relates to processes for preparing benzoprostacyclin analogues and intermediates prepared from the process, and the benzoprostacyclin analogues prepared therefrom. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Application
    Filed: December 7, 2023
    Publication date: May 9, 2024
    Applicant: CHIROGATE INTERNATIONAL INC.
    Inventors: CHUN-YU LIN, TZYH-MANN WEI, SHIH-YI WEI
  • Publication number: 20240145460
    Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Min WU, Ming-Dou KER, Chun-Yu LIN, Li-Wei CHU
  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240083828
    Abstract: The present application relates to a system and a method for producing vinyl chloride. The system comprise a preheat unit, a gas-liquid separating unit, a heat-recovery unit, a heating unit and a thermal pyrolysis unit, and therefore heat energy of the thermal pyrolysis product can be efficiently recovered. Energy cost of the system can be efficiently lowered with the heat-recovery unit and the heating unit, and further prolonging operating cycle of the system.
    Type: Application
    Filed: June 28, 2023
    Publication date: March 14, 2024
    Inventors: Wen-Hsi HUANG, Sheng-Yen KO, Shih-Hong CHEN, Chun-Yu LIN
  • Patent number: 11916084
    Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: February 27, 2024
    Assignee: AUO Corporation
    Inventors: Chun-Yu Lin, Kun-Cheng Tien, Jia-Long Wu, Ming-Lung Chen, Shu-Hao Huang
  • Patent number: 11901480
    Abstract: The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: February 13, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Huang, Chih-Chiang Lu, Chun-Yu Lin, Hsin-Chih Chiu
  • Patent number: 11901353
    Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Min Wu, Ming-Dou Ker, Chun-Yu Lin, Li-Wei Chu
  • Publication number: 20240047604
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Patent number: 11884640
    Abstract: The invention relates to processes for preparing benzoprostacyclin analogues and intermediates prepared from the process, and the benzoprostacyclin analogues prepared therefrom. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: January 30, 2024
    Assignee: CHIROGATE INTERNATIONAL INC.
    Inventors: Chun-Yu Lin, Tzyh-Mann Wei, Shih-Yi Wei
  • Patent number: 11884613
    Abstract: The invention relates to processes for preparing carbaprostacyclin analogues and intermediates prepared from the processes. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: January 30, 2024
    Assignee: CHIROGATE INTERNATIONAL INC.
    Inventors: Chun-Yu Lin, Tzyh-Mann Wei, Shih-Yi Wei
  • Publication number: 20240025832
    Abstract: The invention relates to processes for preparing carbaprostacyclin analogues and intermediates prepared from the processes. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 25, 2024
    Applicant: CHIROGATE INTERNATIONAL INC.
    Inventors: CHUN-YU LIN, TZYH-MANN WEI, SHIH-YI WEI
  • Publication number: 20230416216
    Abstract: A racemic or optically enriched compound of Formula 1: wherein P is H or a protective group for hydroxyl groups; and X is Cl, Br, I, or —CH2CH2CH2COOR1, wherein R1 is C1-7-alkyl or C7-11-aralkyl.
    Type: Application
    Filed: September 14, 2023
    Publication date: December 28, 2023
    Applicant: CHIROGATE INTERNATIONAL INC.
    Inventors: CHUN-YU LIN, TZYH-MANN WEI, SHIH-YI WEI