Patents by Inventor Chun-Yu Lin

Chun-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230091623
    Abstract: The present disclosure provides a defect inspecting method and a defect inspecting system configured to inspect a memory device. The defect inspecting method includes the operations of: resetting the memory device from a power on state; initializing the memory device; performing a plurality of write operations to a memory cell array of the memory device according to a test pattern; performing a plurality of read operations to the memory cell array of the memory cell to generate a readout pattern; and determining whether a defect existed in the memory device according to the readout pattern.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Inventors: CHIH-LEI CHANG, CHUN-YU LIN, LI-PING YU, SHAO-HSUAN CHANG
  • Publication number: 20230082000
    Abstract: A display apparatus includes a first conductive pattern layer, a first insulating pattern layer, a second conductive pattern layer, a second insulating pattern layer, pixel structures, and a light-absorbing pattern layer. The first insulating pattern layer is disposed on the first conductive pattern layer and has a first opening. The second conductive pattern layer is disposed on the first insulating pattern layer and has light-shielding conductive patterns arranged periodically. The second insulating pattern layer is disposed on the second conductive pattern layer and has a second opening overlapped with the first opening. The light-absorbing pattern layer covers at least a first sidewall defining the first opening and a second sidewall defining the second opening and separates the light-shielding conductive patterns of the second conductive pattern layer. The light-absorbing pattern layer has a light-transmitting opening overlapped with the first opening and the second opening.
    Type: Application
    Filed: May 24, 2022
    Publication date: March 16, 2023
    Applicant: Au Optronics Corporation
    Inventors: Chun-Yu Lin, Ming-Lung Chen, Kun-Cheng Tien, Jia-Long Wu, YuTang Tsai
  • Publication number: 20230052419
    Abstract: A total internal reflection display includes a sub-pixel, a reflecting layer, at least one first stereoscopic electrode and a display medium layer. The sub-pixel is defined by a color filter and a black matrix disposed adjacently to the color filter. The reflecting layer is located beneath the sub-pixel. The first stereoscopic electrode is located beneath the black matrix. The width of the first stereoscopic electrode is less than the width of the black matrix. The display medium layer is located between the sub-pixel and the reflecting layer. The height of the first stereoscopic electrode is greater than half of the thickness of the display medium layer.
    Type: Application
    Filed: October 28, 2021
    Publication date: February 16, 2023
    Inventors: Chun-Yu LIN, Kun-Cheng TIEN
  • Publication number: 20230014825
    Abstract: An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure, a second type semiconductor structure, an active structure and a contact structure. The first type semiconductor structure is located on the substrate and has a first protrusion part with a first thickness and a platform part with a second thickness. The second type semiconductor structure is located on the first type semiconductor structure. The active structure is between the first type semiconductor structure and the second type semiconductor structure. The contact structure is disposed between the first type semiconductor structure and the substrate. The second thickness of the platform part is in a range of 0.01 ?m to 1 ?m.
    Type: Application
    Filed: September 19, 2022
    Publication date: January 19, 2023
    Inventors: Chung-Hao WANG, Yu-Chi WANG, Yi-Ming CHEN, Yi-Yang CHIU, Chun-Yu LIN
  • Publication number: 20230010081
    Abstract: A semiconductor device includes a semiconductor stack, a third semiconductor structure, a dielectric layer, and a reflective layer under the third semiconductor structure. The semiconductor stack includes a first semiconductor structure, an active structure, a second semiconductor structure. The first semiconductor structure has a first surface which includes a first portion and a second portion, and the first surface has a first area. The third semiconductor structure connects to the first portion, and has a second surface with a second area. The dielectric layer connects to the second portion and includes a plurality of openings, and the plurality of openings have a third area. A ratio of the second area to the first area is between 0.1˜0.7, and a ratio of the third area to the first area is less than 0.2.
    Type: Application
    Filed: July 8, 2022
    Publication date: January 12, 2023
    Inventors: Chun-Yu Lin, Jun-Yi Li, Yi-Yang Chiu, Chun-Wei Chang, Yi-Ming Chen, Chang-Hsiu Wu, Wen-Luh Liao, Chen Ou, Wei-Wun Jheng
  • Publication number: 20230002339
    Abstract: The invention relates to processes for preparing benzoprostacyclin analogues and intermediates prepared from the process, and the benzoprostacyclin analogues prepared therefrom. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Application
    Filed: June 2, 2021
    Publication date: January 5, 2023
    Applicant: CHIROGATE INTERNATIONAL INC.
    Inventors: CHUN-YU LIN, TZYH-MANN WEI, SHIH-YI WEI
  • Publication number: 20220418087
    Abstract: A method for manufacturing a bending-tolerant multilayered flexible circuit board (FPC) suitable for use in a disposable biosensor chip includes manufacturing and bending a single-sided FPC. The single-sided FPC includes a base layer, a wiring layer, and through holes. The wiring layer includes first and second wiring areas. A first bending area is formed between each first wiring area and the corresponding second wiring area, the through holes forming an easy bending line. The second wiring area is bent relative to the first wiring area along the bending line to obtain the multilayered FPC.
    Type: Application
    Filed: December 30, 2021
    Publication date: December 29, 2022
    Inventors: KAI YANG, CHUN-YU LIN, BI-SHENG JANG, SHIH-HSUN MA, YU-MIN WANG, BEEN-YANG LIAW, LIEN-HSIANG PAN, SHIN-SHIAN LIOU, CHIEN-YU GU, CHUNG-JEN HSIEH
  • Publication number: 20220352430
    Abstract: An embodiment of the present invention provides a micro light emitting diode (LED) array and its manufacturing method. The micro-LED includes a substrate, an epitaxial layer formed on the substrate, and a conversion film formed on the epitaxial layer. Pixels can be defined through lithography, and the pixel size can be very small. This method is characterized in that a mass transfer is not required.
    Type: Application
    Filed: July 13, 2022
    Publication date: November 3, 2022
    Inventors: Ching-Fuh Lin, Chun-Yu Lin, Yi-Shan Lin, Jung-Kuan Huang
  • Patent number: 11450787
    Abstract: An optoelectronic semiconductor device includes a semiconductor stack, an electrode, and a plurality of contact portions. The semiconductor stack includes a first type semiconductor structure, an active structure on the first type semiconductor structure, and a second type semiconductor structure on the active structure. The first type semiconductor structure includes a first protrusion part, a second protrusion part and a platform part between the first protrusion part and the second protrusion part. The semiconductor stack includes a thickness. The electrode on the second type semiconductor structure includes a region corresponding to the first protrusion. The contact portions are located at the second protrusion part without being at the first protrusion part. The contact portions are attached to the first type semiconductor structure.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: September 20, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Chung-Hao Wang, Yu-Chi Wang, Yi-Ming Chen, Yi-Yang Chiu, Chun-Yu Lin
  • Publication number: 20220293583
    Abstract: An integrated circuit includes a T-coil circuit, a silicon-controlled rectifier (SCR), and a signal-loss prevention circuit. The T-coil circuit is coupled to an input/output (I/O) pad and an internal circuit. The SCR is coupled to the T-coil circuit and the internal circuit. The signal-loss prevention circuit is coupled to the T-coil circuit and the SCR. The signal-loss prevention circuit includes a resistor coupled to the T-coil circuit and the SCR. An electrostatic current flows through the resistor and turns on the SCR. The signal-loss prevention circuit may also include a diode circuit coupled to the T-coil circuit and the SCR. The diode circuit is configured to prevent signal loss.
    Type: Application
    Filed: March 12, 2021
    Publication date: September 15, 2022
    Inventors: Wei-Min WU, Ming-Dou KER, Chun-Yu LIN, Li-Wei CHU
  • Patent number: 11430923
    Abstract: An embodiment of the present invention provides a micro light emitting diode (LED) array and its manufacturing method. The micro-LED includes a substrate, an epitaxial layer formed on the substrate, and a conversion film formed on the epitaxial layer. Pixels can be defined through lithography, and the pixel size can be very small. This method is characterized in that a mass transfer is not required.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 30, 2022
    Assignee: National Taiwan University
    Inventors: Ching-Fuh Lin, Chun-Yu Lin, Yi-Shan Lin, Jung-Kuan Huang
  • Patent number: 11355490
    Abstract: A semiconductor structure corresponds to a first diode and a second diode connected in series. A first well region is on a first deep well region. Two second well regions are at two sides of the first well region respectively. A first doping region and a second doping region are on the first well region. A first isolation region is between the first doping region and the second doping region. A third well region is on a second deep well region. Two fourth well regions are at two sides of the third well region respectively. A third doping region and a fourth doping region are on the third well region. A second isolation region is between the third doping region and the fourth doping region. The second doping region and third doping region are connected. The second deep well region is separated from the first deep well region.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: June 7, 2022
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Yu Lin, Chun-Cheng Chen, Wen-Tai Wang
  • Patent number: 11336054
    Abstract: A connector device is provided, including a first housing, a circuit assembly, a second housing, and a connector. The circuit assembly is disposed on the first housing, and has a first connecting port and a second connecting port. The second housing is detachably engaged with the first housing. The connector is disposed on the second housing, and has an opening and a terminal. When the first housing is engaged with the second housing and the opening faces the first direction, the terminal is electrically connected to the first connecting port. When the first housing is engaged with the second housing and the opening faces the second direction, the terminal is electrically connected to the second connecting port. The first direction is different from the second direction.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: May 17, 2022
    Assignee: MOXA INC.
    Inventors: Chi Hang Leong, Mao-Hung Yang, Chia-Hua Chang, Chun-Yu Lin, Sung-Wei Chou, Tsun-Hsi Wang
  • Publication number: 20220131029
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Application
    Filed: January 6, 2022
    Publication date: April 28, 2022
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Publication number: 20220068908
    Abstract: A semiconductor structure corresponds to a first diode and a second diode connected in series. A first well region is on a first deep well region. Two second well regions are at two sides of the first well region respectively. A first doping region and a second doping region are on the first well region. A first isolation region is between the first doping region and the second doping region. A third well region is on a second deep well region. Two fourth well regions are at two sides of the third well region respectively. A third doping region and a fourth doping region are on the third well region. A second isolation region is between the third doping region and the fourth doping region. The second doping region and third doping region are connected. The second deep well region is separated from the first deep well region.
    Type: Application
    Filed: November 12, 2020
    Publication date: March 3, 2022
    Inventors: Chun-Yu LIN, Chun-Cheng CHEN, Wen-Tai WANG
  • Patent number: 11251328
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: February 15, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Patent number: 11235064
    Abstract: The present disclosure provides various core constructs. According to embodiments of the present disclosure, the core construct can be used to configure pharmaceutical molecules. In particular, the core construct may be conjugated with a functional element via the click chemistry.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: February 1, 2022
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu, Chun-Yu Lin
  • Publication number: 20220019302
    Abstract: The application relates to a capacitance sensing circuit, which samples and holds a reference signal to generate an input reference signal, hereby, an input signal is generated to a sensing circuit. Thereby, the sensing circuit generates an output signal according to the input signal and a sensing signal, for the capacitance sensing.
    Type: Application
    Filed: March 25, 2021
    Publication date: January 20, 2022
    Inventors: TUN-JU WANG, CHING-JEN TUNG, CHI-HUAN LU, CHUN-YU LIN, YEN-SHAO LIN
  • Publication number: 20210367376
    Abstract: A connector device is provided, including a first housing, a circuit assembly, a second housing, and a connector. The circuit assembly is disposed on the first housing, and has a first connecting port and a second connecting port. The second housing is detachably engaged with the first housing. The connector is disposed on the second housing, and has an opening and a terminal. When the first housing is engaged with the second housing and the opening faces the first direction, the terminal is electrically connected to the first connecting port. When the first housing is engaged with the second housing and the opening faces the second direction, the terminal is electrically connected to the second connecting port. The first direction is different from the second direction.
    Type: Application
    Filed: January 12, 2021
    Publication date: November 25, 2021
    Inventors: Chi Hang LEONG, Mao-Hung YANG, Chia-Hua CHANG, Chun-Yu LIN, Sung-Wei CHOU, Tsun-Hsi WANG
  • Publication number: 20210367098
    Abstract: The present disclosure provides a light-emitting device comprising a substrate with a topmost surface; a first semiconductor stack arranged on the substrate, and comprising a first top surface separated from the topmost surface by a first distance; a first bonding layer arranged between the substrate and the first semiconductor stack; a second semiconductor stack arranged on the substrate, and comprising a second top surface separated from the topmost surface by a second distance which is different form the first distance; a second bonding layer arranged between the substrate and the second semiconductor stack; a third semiconductor stack arranged on the substrate, and comprising third top surface separated from the topmost surface by a third distance; and a third bonding layer arranged between the substrate and the third semiconductor stack; wherein the first semiconductor stack, the second semiconductor stack, and the third semiconductor stack are configured to emit different color lights.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Inventors: Chien-Fu HUANG, Chih-Chiang LU, Chun-Yu LIN, Hsin-Chih CHIU