Patents by Inventor Chun-Yu Lin

Chun-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9335450
    Abstract: An optical element includes a lens and a light diffusion layer formed on the lens. The lens includes a light incident face and a light emerging face. The light emerging face includes a concave face opposite to the light incident face and a convex face surrounding the concave face. The convex face is covered by the light diffusion layer. The concave face is exposed outside the light diffusion layer. A method for manufacturing the optical element is also disclosed.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: May 10, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chau-Jin Hu, Jia-Ming Wang, Chun-Yu Lin
  • Patent number: 9312303
    Abstract: A method for manufacturing a light-emitting device comprises the steps of: providing a first substrate; forming a semiconductor structure on the first substrate, wherein the semiconductor structure comprises a first type semiconductor layer, a second type semiconductor layer, and an active layer between the first type semiconductor layer and the second type semiconductor layer; forming an isolation region through the second type semiconductor and the active layer to separate the semiconductor structure into a first part and a second part on the first substrate; and injecting an electrical current with a current density to the second part to make the second part to be permanently broken-down; wherein after the second part is permanently broken-down, the first part is capable of generating electromagnetic radiation and the second part is incapable of generating electromagnetic radiation.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: April 12, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Rong-Ren Lee, Cheng-Hong Chen, Chih-Peng Ni, Chun-Yu Lin
  • Publication number: 20160079481
    Abstract: This disclosure discloses a light-emitting chip comprises: a light-emitting stack, having a side wall, comprising an active layer emitting light; and a light-absorbing layer having a first portion surrounding the side wall and being configured to absorb 50% light toward the light-absorbing layer.
    Type: Application
    Filed: November 23, 2015
    Publication date: March 17, 2016
    Inventors: Chun-Yu LIN, Tzu-Chieh HSU, Fu-Chun TSAI, Yi-Wen HUANG, Chih-Chiang LU
  • Publication number: 20160062226
    Abstract: A photomask and method for fabricating an integrated circuit is provided. The photomask includes a plurality of main features, enclosed in at least one first region and at least one second region, wherein the first region comprises single the main feature and the second region comprises multiple the main features; and a plurality of assistant features disposed between the first region and the second region, or between the second regions. The photomask enhances the accuracy of the critical dimension and facilitate fabricating an integrated circuit.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 3, 2016
    Inventors: Chun-Yu LIN, Yi-Jie CHEN, Feng-Yuan CHIU, Ying-Chou CHENG, Kuei-Liang LU, Ya-Hui CHANG, Ru-Gun LIU, Tsai-Sheng GAU
  • Publication number: 20160005941
    Abstract: A semiconductor light-emitting device includes a semiconductor stack comprising a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes a periphery surface surrounding the active layer; a plurality of vias penetrating the semiconductor stack to expose the first semiconductor layer; and a patterned metal layer formed on the plurality of vias and covered the periphery surface of the first semiconductor layer.
    Type: Application
    Filed: September 14, 2015
    Publication date: January 7, 2016
    Inventors: Min-Yen Tsai, Chao-Hsing Chen, Tsung-Hsun Chiang, Wen-Hung Chuang, Bo-Jiun Hu, Tzu-Yao Tseng, Jia-Kuen Wang, Kuan-Yi Lee, Yi-Ming Chen, Chun-Yu Lin, Tsung-Hsien Yang, Tzu-Chieh Hsu, Kun-De Lin, Yao-Ning Chan, Chih-Chiang Lu
  • Publication number: 20150378511
    Abstract: The present disclosure provides a capacitor voltage information sensing circuit. The capacitor voltage information sensing circuit includes a mixer and an analog filter. The mixer includes a first input terminal for receiving a reference signal, a second input terminal for receiving a voltage signal, the voltage signal includes capacitor voltage information and a noise when a touch occurs, a first output terminal for outputting a first differential signal according to the voltage signal and the reference signal, and a second output terminal for outputting a second differential signal according to the voltage signal and the reference signal. The analog filter is coupled to the mixer for generating a first low-frequency signal and a second low-frequency signal according to the first differential signal and second differential signal.
    Type: Application
    Filed: October 8, 2014
    Publication date: December 31, 2015
    Inventors: Chun-Kuan Wu, Ching-Jen Tung, Chen-Yuan Yang, Chun-Yu Lin
  • Patent number: 9193056
    Abstract: A pneumatic spanner structure includes a head body, a link bevel gear unit, a hit unit and a driving handle. A driving motor axle portion at an open end of the driving handle drives a motor link bevel gear post and a hit unit link bevel gear plate of the link bevel gear unit. The hit unit link bevel gear plate links the hit unit. The link bevel gear unit enhances and transmits the force to the hit unit. The hit unit applies the acting force on a workpiece. The hit unit doesn't need a buffer space for actuation and the force is indirect. The link bevel gear unit is a deceleration device to extend the service life of the whole structure. The output force is more powerful than the prior art, providing a stable and compact structure.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: November 24, 2015
    Inventor: Chun Yu Lin
  • Patent number: 9196806
    Abstract: This disclosure discloses a light-emitting chip comprises: a light-emitting stack, having a side wall, comprising an active layer emitting light; and a light-absorbing layer having a first portion surrounding the side wall and being configured to absorb 50% light toward the light-absorbing layer.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 24, 2015
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Tzu-Chieh Hsu, Fu-Chun Tsai, Yi-Wen Huang, Chih-Chiang Lu
  • Patent number: 9190840
    Abstract: An electrostatic discharge (ESD) protection circuit, suitable for an input stage circuit including a first N channel metal oxide semiconductor (NMOS) transistor, is provided. The ESD protection circuit includes an P channel metal oxide semiconductor (PMOS) transistor and an impedance device, in which the PMOS transistor has a source coupled to a gate of the first NMOS transistor, and a drain coupled to a source of the first NMOS transistor, and the impedance device is coupled between a gate of the PMOS transistor and a first power rail to perform a initial-on ESD protection circuit. The ESD protection circuit formed by the PMOS transistor and the resistor is capable of increasing the turn-on speed of the ESD protection circuit and preventing the input stage circuit from a CDM ESD event.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: November 17, 2015
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ming-Dou Ker, Chun-Yu Lin, Chang-Tzu Wang
  • Publication number: 20150325569
    Abstract: An ESD protection circuit is cooperated with a high-frequency circuit and includes a silicon-controlled rectifier element and an inductive element. The silicon-controlled rectifier element is formed by the sequential connection of a first P-type semiconductor material, a first N-type semiconductor material, a second P-type semiconductor material and a second N-type semiconductor material. The silicon-controlled rectifier element has a first end and a second end, and the first end is electrically coupled with the first P-type semiconductor material while the second end is electrically coupled with the second N-type semiconductor material. One end of the inductive element is electrically coupled with the first end and the other end thereof is electrically coupled with the first N-type semiconductor material, or one end of the inductive element is electrically coupled with the second end and the other end thereof is electrically coupled with the second P-type semiconductor material.
    Type: Application
    Filed: August 6, 2014
    Publication date: November 12, 2015
    Inventor: Chun-Yu LIN
  • Patent number: 9159577
    Abstract: According to an exemplary embodiment, a method of forming a substrate pattern having an isolated region and a dense region is provided. The method includes the following operations: forming a first photoresist layer over the substrate; exposing the first photoresist layer through a first mask corresponding to the isolated region; developing the first photoresist layer to form a first pattern; forming a second photoresist layer over the substrate and the first pattern; exposing the second photoresist layer through a second mask corresponding to the substrate pattern; developing the second photoresist layer to form a second pattern; and etching the first pattern and the substrate to form the substrate pattern in the isolated region and the dense region.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: October 13, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chun-Yu Lin, Feng-Yuan Chiu, Bing-Syun Yeh, Yi-Jie Chen, Ying-Chou Cheng, I-Chang Shih, Ru-Gun Liu, Shih-Ming Chang
  • Patent number: 9130008
    Abstract: Some embodiments relate to a silicon controlled rectifier (SCR) that includes a current path which couples an SCR anode to an SCR cathode. The current path includes a first vertical current path component coupled to the SCR anode, and a second vertical current path component coupled to the SCR cathode. A horizontal current path component includes a first well region and a second well region that meet at a junction lying along a first plane. The first and second well regions cooperatively span a distance between the first and second vertical current path components. The first and second vertical current path components mirror one another symmetrically about the first plane.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: September 8, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu Lin, Ming-Dou Ker, Ming Hsien Tsai, Li-Wei Chu, Ming-Hsiang Song
  • Publication number: 20150234433
    Abstract: An electronic device with a fold mode and an unfold mode includes a display module and an input module. The display module includes a first connecting component, a second connecting component and a flexible displaying panel. The second connecting component rotates relative to the first connecting component via a first direction to form as the fold mode or the unfold mode. The flexible displaying panel is disposed on the first connecting component and the second connecting component. The flexible displaying panel is bent to be U-shaped when the display module is formed as the fold mode. The flexible displaying panel is flat when the display module is formed as the unfold mode, and a planar normal vector points toward a second direction. The input module is rotatably connected to the display module via a third direction.
    Type: Application
    Filed: November 19, 2014
    Publication date: August 20, 2015
    Inventors: Hao-Chien Huang, Yi-Kai Wang, Chia-Han Chen, Chun-Yu Lin, Hsin-Yu Hsieh
  • Publication number: 20150235857
    Abstract: According to an exemplary embodiment, a method of forming a substrate pattern having an isolated region and a dense region is provided. The method includes the following operations: forming a first photoresist layer over the substrate; exposing the first photoresist layer through a first mask corresponding to the isolated region; developing the first photoresist layer to form a first pattern; forming a second photoresist layer over the substrate and the first pattern; exposing the second photoresist layer through a second mask corresponding to the substrate pattern; developing the second photoresist layer to form a second pattern; and etching the first pattern and the substrate to form the substrate pattern in the isolated region and the dense region.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: CHUN-YU LIN, FENG-YUAN CHIU, BING-SYUN YEH, YI-JIE CHEN, YING-CHOU CHENG, I-CHANG SHIH, RU-GUN LIU, SHIH-MING CHANG
  • Publication number: 20150144984
    Abstract: A semiconductor light-emitting device comprises a semiconductor stack comprising a side, a first surface and a second surface opposite to the first surface, wherein the semiconductor stack further comprises a conductive via extending from the first surface to the second surface; a transparent conductive layer formed on the second surface; a first pad portion and a second pad portion formed on the first surface and electrically connected to the semiconductor stack; and an insulating layer formed between the first pad portion and the semiconductor stack and between the second pad portion and the semiconductor stack.
    Type: Application
    Filed: November 26, 2014
    Publication date: May 28, 2015
    Inventors: Yi-Ming CHEN, Chun-Yu LIN, Tsung-Hsien YANG, Tzu-Chieh HSU, Kun-De LIN, Yao-Ning CHAN, Chih-Chiang LU
  • Patent number: 9041421
    Abstract: An IC, a circuitry, and an RF BIST system are provided. The RF BIST system includes a test equipment, a module circuitry, and an IC. The IC is arranged to communicate with the module circuitry by an RF signal in response to a command signal from the test equipment, determine a test result by the RF signal, and report the test result to the test equipment, wherein the module circuitry is external to the IC and the test equipment.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: May 26, 2015
    Assignee: MEDIATEK INC.
    Inventors: Chun-Hsien Peng, Pei-Wei Chen, Ping-Hsuan Tsu, ChiaYu Yang, Chun-Yu Lin
  • Publication number: 20150117032
    Abstract: An optical element includes a lens and a light diffusion layer formed on the lens. The lens includes a light incident face and a light emerging face. The light emerging face includes a concave face opposite to the light incident face and a convex face surrounding the concave face. The convex face is covered by the light diffusion layer. The concave face is exposed outside the light diffusion layer. A method for manufacturing the optical element is also disclosed.
    Type: Application
    Filed: November 21, 2013
    Publication date: April 30, 2015
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHAU-JIN HU, JIA-MING WANG, CHUN-YU LIN
  • Patent number: 8988362
    Abstract: For object detection, a two-step group scan to the traces of a capacitive touch sensor is performed, thereby dramatically shortening the overall scanning time and reducing noise effect. After all the traces are scanned by the pre-scan step to find out the trace of a touch point, the trace of the touch point and traces adjacent thereto are scanned by the re-scan step for more accurate positioning of the touch point.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: March 24, 2015
    Assignee: Elan Microelectronics Corporation
    Inventors: I-Hau Yeh, Chun-Yu Lin
  • Publication number: 20150077010
    Abstract: Provided is the pixel circuit for active matrix display apparatus and the driving method thereof, which is controlled by digital signal. The pre-charge pixel voltage is controlled and discharged by controlling the resistor and transistors, so that the desired grey scale is generated. The pixel circuit includes: a first switch, a second switch, a third switch, an energy storage device and resistor. By controlling the third switch, the first end of the energy storage device is charged to the voltage of the second source. The first switch and the second switch are controlled to switch on, so that the first end of the energy storage device discharging to the first source. The second switch switches off when the first end of the energy storage device reaches the desired pixel voltage.
    Type: Application
    Filed: April 30, 2014
    Publication date: March 19, 2015
    Applicant: National Chiao Tung University
    Inventors: Ya-Hsiang TAI, Lu-Sheng CHOU, Chun-Yu LIN, Chia-Hung CHANG
  • Patent number: 8952456
    Abstract: A representative electrostatic discharge (ESD) protection circuit includes a silicon-controlled rectifier comprising an alternating arrangement of a first P-type semiconductor material, a first N-type semiconductor material, a second P-type semiconductor material and a second N-type semiconductor material electrically coupled between an anode and a cathode. The anode is electrically coupled to the first P-type semiconductor material and the cathode is electrically coupled to the second N-type semiconductor material. The ESD protection circuit further includes an inductor electrically coupled between the anode and the second P-type semiconductor material or between the cathode and the first N-type semiconductor material.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Do Ker, Chun-Yu Lin