Patents by Inventor Chun-Yu Lin

Chun-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190206945
    Abstract: A display panel includes an active device disposed on a substrate, a first electrode electrically connected to the active device, a pixel definition layer, a light emitting layer, a second electrode, a shielding pattern layer, and first and second color filter pattern layers. The pixel definition layer has a first opening overlapped with the first electrode. At least a portion of the light emitting layer is disposed within the first opening and on the first electrode. The second electrode is disposed on the light emitting layer. The shielding pattern layer is disposed on the second electrode and has a second opening overlapped with the first opening. The first color filter pattern layer is disposed on the second electrode and overlapped with the first and second openings. The second color filter pattern layer is disposed on the second electrode. The first and second color filter pattern layers are stacked with each other right above the shielding pattern layer.
    Type: Application
    Filed: April 2, 2018
    Publication date: July 4, 2019
    Applicant: Au Optronics Corporation
    Inventors: Chun-Yu Lin, Meng-Ting Lee
  • Patent number: 10319877
    Abstract: The present disclosure provides a light-emitting device including a substrate, a first block of semiconductor stack on the substrate, a second block of semiconductor stack on the substrate and a third block of semiconductor stack on the substrate. The first block of semiconductor stack includes a first emitting wavelength and a first surface away from the substrate. The second block of semiconductor stack on the substrate includes a second emitting wavelength and a second surface away from the substrate. The third block of semiconductor stack includes s a third emitting wavelength and a third surface away from the substrate. The second surface and the first surface are non-coplanar and the third surface and the first surface are coplanar. The first emitting wavelength, the second emitting wavelength and the third emitting wavelength are different.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: June 11, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Fu Huang, Chih-Chiang Lu, Chun-Yu Lin, Hsin-Chih Chiu
  • Patent number: 10300104
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: May 28, 2019
    Assignee: IMMUNWORK INC.
    Inventors: Tse-Wen Chang, Hsing-Mao Chu, Chun-Yu Lin, Wei-Ting Tian
  • Patent number: 10305276
    Abstract: An electrostatic discharge (ESD) protection circuit for providing ESD paths between a signal pad and a first or second power rail includes a first ESD protection module and a second ESD protection module. The first ESD protection module is coupled between the signal pad and the first power rail, and includes at least two first diodes and a first resistor. The first diodes are stacked with each other, and one of the first diodes is electrically connected with the first resistor in parallel. The second ESD protection module is coupled between the signal pad and the second power rail, and includes at least two second diodes and a second resistor. The second diodes are stacked with each other, and one of the second diodes is electrically connected with the second resistor in parallel. The signal pad is coupled between the stacked first diodes and the stacked second diodes.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: May 28, 2019
    Assignee: NATIONAL TAIWAN NORMAL UNIVERSITY
    Inventors: Chun-Yu Lin, Chun-Yu Chen
  • Publication number: 20190148599
    Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 16, 2019
    Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU
  • Patent number: 10283669
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: May 7, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Publication number: 20190131496
    Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 2, 2019
    Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU
  • Publication number: 20190114381
    Abstract: A method for parasitic-aware capacitor sizing and layout generation is proposed, which is executed by a computer, the method comprising using the computer to perform the following: creating a capacitor sizing and parasitic matching sequence to represent a unit capacitor size, routing topology and routing patterns of a plural of nets in a capacitor network. Next, a shielding assignment is performed to create a number of shielding portions of each net in the plural of nets. Then, a fitness evaluation of configurations of the capacitor sizing and parasitic matching sequence is performed. A shielding net routing is performed to compensate unmatched parasitic capacitance of the configurations of the capacitor sizing and parasitic matching sequence.
    Type: Application
    Filed: October 18, 2017
    Publication date: April 18, 2019
    Inventors: Po-Hung LIN, Vincent Weihao HSIAO, Chun-Yu LIN, Nai-Chen CHEN, Yu-Tsang HSIEH
  • Publication number: 20190107538
    Abstract: The present invention discloses a method to determine whether a warning sign will occur in a subject with the Flavivirus infectious illness, and a pharmaceutical composition. The method includes steps of measuring the level of serum hyaluronan of the subject, and determining that the warning sign will occur in his/her illness course when the level is higher than or equal to 70 ng/mL. It is identified in the invention that the level of the serum hyaluronan is an excellent predicator for the severity of the Flavivirus infectious illness.
    Type: Application
    Filed: January 26, 2018
    Publication date: April 11, 2019
    Applicant: Kaohsiung Medical University
    Inventors: Yen-Hsu Chen, Chun-Yu Lin, Paraskevi Heldin
  • Patent number: 10205059
    Abstract: The present disclosure is related to an optoelectronic device comprising a semiconductor stack comprising a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface, wherein the second contact layer is not overlapped with the first contact layer in a vertical direction; wherein the second contact layer comprises a plurality of dots separating from each other and formed of semiconductor material.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: February 12, 2019
    Assignee: Epistar Corporation
    Inventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
  • Publication number: 20190019920
    Abstract: The present disclosure provides a light-emitting device, comprising: a light-emitting stack; a first semiconductor layer on the light-emitting stack; a first electrode formed on the first semiconductor layer and comprising an inner segment, an outer segment, and a plurality of extending segments electrically connecting the inner segment with the outer segment.
    Type: Application
    Filed: September 19, 2018
    Publication date: January 17, 2019
    Inventors: Yao-Ru CHANG, Wen-Luh LIAO, Chun-Yu LIN, Hsin-Chan CHUNG, Hung-Ta CHENG
  • Patent number: 10156335
    Abstract: A light-emitting device comprises a semiconductor structure comprising a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, a first intermediate layer, a second intermediate layer, and an active region capable of emitting radiation, wherein the active region is between the first intermediate layer and the second intermediate layer, the first intermediate layer is in direct contact with the first conductivity-type semiconductor layer, the second intermediate layer is in direct contact with the second conductivity-type semiconductor layer, and the active region comprises alternated well layers and barrier layers, wherein each barrier layer has a thickness; wherein a first difference between a refractive index of the first intermediate layer and a refractive index of the first conductivity-type semiconductor layer is less than a second difference between a refractive index of the second intermediate layer and a refractive index of the second conductivity-type semiconduct
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: December 18, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Jun-Yi Li, Chun-Yu Lin, Shih-Chang Lee, Yi-Ming Chen
  • Publication number: 20180352646
    Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 6, 2018
    Inventors: Ho-Chieh Yu, Cheng-Lung Liao, Chun-Yu Lin, Jason An-Cheng Huang
  • Patent number: 10121777
    Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: November 6, 2018
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chun-Yu Lin, Jie-Ting Chen, Ming-Dou Ker, Tzu-Chien Tzeng, Keko-Chun Liang, Ju-Lin Huang
  • Patent number: 10109771
    Abstract: The present disclosure provides a light-emitting device, comprising: a light-emitting stack; a first semiconductor layer on the light-emitting stack; a first electrode formed on the first semiconductor layer and comprising an inner segment, an outer segment, and a plurality of extending segments electrically connecting the inner segment with the outer segment.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: October 23, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Yao-Ru Chang, Wen-Luh Liao, Chun-Yu Lin, Hsin-Chan Chung, Hung-Ta Cheng
  • Patent number: 10084115
    Abstract: The present disclosure provides an optoelectronic device comprising a semiconductor stack comprising a first side having a first length; a first contact layer on the semiconductor stack; and a second contact layer on the semiconductor stack opposite to the first contact layer, wherein the second contact layer is not overlapped with the first contact layer in a vertical direction; and wherein the second contact layer comprises multiple contact regions separated from each other and arranged in a two-dimensional array, wherein a first distance between the two adjacent contact regions is between 0.8% and 8% of the first length.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 25, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Yu Lin, Yi-Ming Chen, Shih-Chang Lee, Yao-Ning Chan, Tzu-Chieh Hsu
  • Publication number: 20180264129
    Abstract: The present disclosure provides various core constructs. According to embodiments of the present disclosure, the core construct can be used to configure pharmaceutical molecules. In particular, the core construct may be conjugated with a functional element via the click chemistry.
    Type: Application
    Filed: May 23, 2018
    Publication date: September 20, 2018
    Applicant: Academia Sinica
    Inventors: Tse-Wen CHANG, Hsing-Mao CHU, Chun-Yu LIN
  • Publication number: 20180226537
    Abstract: The present disclosure provides a light-emitting device including a substrate, a first block of semiconductor stack on the substrate, a second block of semiconductor stack on the substrate and a third block of semiconductor stack on the substrate. The first block of semiconductor stack includes a first emitting wavelength and a first surface away from the substrate. The second block of semiconductor stack on the substrate includes a second emitting wavelength and a second surface away from the substrate. The third block of semiconductor stack includes s a third emitting wavelength and a third surface away from the substrate. The second surface and the first surface are non-coplanar and the third surface and the first surface are coplanar. The first emitting wavelength, the second emitting wavelength and the third emitting wavelength are different.
    Type: Application
    Filed: April 3, 2018
    Publication date: August 9, 2018
    Inventors: Chien-Fu Huang, Chih-Chiang Lu, Chun-Yu Lin, Hsin-Chih Chiu
  • Patent number: 10010626
    Abstract: The present disclosure provides various molecular constructs having a targeting element and an effector element. Methods for treating various diseases using such molecular constructs are also disclosed.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: July 3, 2018
    Inventors: Tse-Wen Chang, Hsing-Mao Chu, Chun-Yu Lin
  • Patent number: 10002991
    Abstract: A light-emitting element, comprises a light-emitting stack comprising an active layer; a window layer on the light-emitting stack, wherein the window layer has a surface opposite to the light-emitting stack; and an insulative layer on the surface, wherein the surface comprises a cavity and the insulative layer substantially conformally covering the cavity, and wherein the insulative layer has a first refractive index equal to or smaller than 1.4.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: June 19, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Wen-Luh Liao, Chun-Yu Lin, Kun-De Lin