Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.

Abstract: Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.

Abstract: Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.

Abstract: A server system comprises a base, a front panel (13) arranged on the base and defining a collecting space; two doors (16) arranged on opposite sides of the base, and being perpendicular to the front panel; two storage cases (171) arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two first corridors are each defined between one of the doors and one of the storage case facing the one door; two circuit boards (18) arranged between the two storage cases, wherein the two circuit boards comprise a plurality of slits, wherein a second corridor is defined between the two circuit boards; a storage cover (121) disposed above the base over the two first corridors, the second corridor, the two storage cases, and the two circuit boards.

Abstract: A speech synthesis system includes an operating interface, a storage unit and a processor. The operating interface provides a plurality of language options for a user to select one output language option therefrom. The storage unit stores a plurality of acoustic models. Each acoustic model corresponds to one of the language options and includes a plurality of phoneme labels corresponding to a specific vocal. The processor receives a text file and generates output speech data corresponding to the specific vocal according to the text file, a speech synthesizer, and one of the acoustic models which corresponds to the output language option.

Abstract: A computing device may include a lid, a base, and a hinge switch. The hinge switch includes a first electrical contact coupled to the lid, and a second electrical contact coupled to the base. The second electrical contact is axially alignable with the first electrical contact to form a physical connection.

Abstract: A server system comprises a deck, a front panel arranged on the deck and defining a collecting space; two doors arranged on opposite sides of the deck, and being perpendicular to the front panel; two receiving frame structures arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two periphery corridors are each defined between one of the doors and one of the receiving frame structure facing the one door; two circuit boards arranged between the two receiving frame structures, wherein the two circuit boards comprise a plurality of slits, wherein a central corridor is defined between the two circuit boards; a storage cover disposed above the deck over the two periphery corridors, the central corridor, the two receiving frame structures, and the two circuit boards.

Abstract: A server system comprises a deck, a front panel arranged on the deck and defining a collecting space; two doors arranged on opposite sides of the deck, and being perpendicular to the front panel; two receiving frame structures arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two periphery corridors are each defined between one of the doors and one of the receiving frame structure facing the one door; two circuit boards arranged between the two receiving frame structures, wherein the two circuit boards comprise a plurality of slits, wherein a central corridor is defined between the two circuit boards; a storage cover disposed above the deck over the two periphery corridors, the central corridor, the two receiving frame structures, and the two circuit boards.

Abstract: In one example, an electronic device may include a power source to supply power to a peripheral device, a sensor circuit to monitor a power consumption of the peripheral device, and a controller coupled to the sensor circuit to detect that the power consumption of the peripheral device is greater than a threshold and generate a popup message on a user interface of the electronic device based on the detection. The popup message may include an option. Further, the controller may direct the power source to continue to provide the power to the peripheral device in response to a determination that the option is selected prior to an expiration of a timer.

Abstract: A speech synthesis system includes an operating interface, a storage unit and a processor. The operating interface provides a plurality of language options for a user to select one output language option therefrom. The storage unit stores a plurality of acoustic models. Each acoustic model corresponds to one of the language options and includes a plurality of phoneme labels corresponding to a specific vocal. The processor receives a text file and generates output speech data corresponding to the specific vocal according to the text file, a speech synthesizer, and one of the acoustic models which corresponds to the output language option.

Abstract: A server system comprises a base, a front panel (13) arranged on the base and defining a collecting space; two doors (16) arranged on opposite sides of the base, and being perpendicular to the front panel; two storage cases (171) arranged between the doors in a back to back arrangement, and configured to receive multiple rows and columns of a plurality of storage drives horizontally, wherein two first corridors are each defined between one of the doors and one of the storage case facing the one door; two circuit boards (18) arranged between the two storage cases, wherein the two circuit boards comprise a plurality of slits, wherein a second corridor is defined between the two circuit boards; a storage cover (121) disposed above the base over the two first corridors, the second corridor, the two storage cases, and the two circuit boards.

Abstract: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.

Abstract: A fan structure includes a fan impeller, a fan seat and a hollow shaft rod. The fan impeller has a circumferential section and a top section. The circumferential section has multiple fan blades. The fan seat has a bearing cup. A light-emitting unit and a photoconductive component are received in the bearing cup. The hollow shaft rod has a first end, a second end and a through hole. The through hole axially passes through the hollow shaft rod between the first and second ends. A first end of the hollow shaft rod is inserted in the top section of the fan impeller. A second end of the hollow shaft rod is inserted in the bearing cup of the fan seat and assembled with the photoconductive component. The fan structure improves the shortcoming of the conventional light-emitting fan that the light can be hardly fully projected.

Abstract: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.

Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.

Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.

Abstract: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.

Abstract: A fan structure includes a fan impeller, a fan seat and a hollow shaft rod. The fan impeller has a circumferential section and a top section. The circumferential section has multiple fan blades. The fan seat has a bearing cup. A light-emitting unit and a photoconductive component are received in the bearing cup. The hollow shaft rod has a first end, a second end and a through hole. The through hole axially passes through the hollow shaft rod between the first and second ends. A first end of the hollow shaft rod is inserted in the top section of the fan impeller. A second end of the hollow shaft rod is inserted in the bearing cup of the fan seat and assembled with the photoconductive component. The fan structure improves the shortcoming of the conventional light-emitting fan that the light can be hardly fully projected.

Abstract: An apparatus comprises an optical detector configured to receive scattered light signals from a surface of a wafer including a plurality of sensor arrays, each of which has a boundary smaller than a boundary of a laser beam, a light source optically coupled to the surface of the wafer, wherein light from the light source hits the surface with a small incident angle and a processor configured to measure a distance between a sensor array boundary and a laser beam boundary, wherein a laser annealing process is recalibrated if the distance is less than a predetermined value.

Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.