Patents by Inventor Chung An Wang

Chung An Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240321891
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate isolation structure vertically disposed above the dielectric fin. The semiconductor device includes a gate structure extending along a second direction perpendicular to the first direction. The gate structure includes a first portion and a second portion separated by the gate isolation structure and the dielectric fin. The first portion of the gate structure presents a first beak profile and the second portion of the gate structure presents a second beak profile. The first and second beak profiles point toward each other.
    Type: Application
    Filed: May 30, 2024
    Publication date: September 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chih-Han Lin, Ming-Ching Chang, Shu-Yuan Ku, Tzu-Chung Wang
  • Publication number: 20240316079
    Abstract: Provided are the use of the compound 1-(3-(3-N,N-dimethylaminocarbonyl)phenoxyl-4-mtrophenyl)-1-ethyl-N,N?-bis(ethylene)phosphoramidate, or a pharmaceutically acceptable salt, isotopic variant or solvate thereof in the manufacture of a medicament for treating cancer, and a composition which comprises the above compound and at least one anti-cancer drug.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 26, 2024
    Inventors: Jianxin Duan, Fanying Meng, Tianyang Qi, Chun-Chung Wang, Lu-Tzu Chen, Wan-Fen Li, Ming-Tain Lai
  • Publication number: 20240322994
    Abstract: A system and method of clock and data recovery. In some embodiments, the method includes: setting a bias signal source to a first bias value, the bias signal source being connected to an input of a voltage-controlled oscillator of a clock and data recovery circuit; determining that a locked signal of a frequency feedback signal source equals a first feedback value; setting the bias signal source to a second bias value, different from the first bias value; determining that a locked signal of the frequency feedback signal source equals a second feedback value; determining that the second feedback value meets a termination criterion; and setting an operating value of the bias signal source to the second bias value.
    Type: Application
    Filed: October 4, 2023
    Publication date: September 26, 2024
    Inventors: Michael Chung WANG, Neal HAYS, Amir AMIRKHANY
  • Patent number: 12099366
    Abstract: A system for obstacle detection adapted to a self-guiding machine is provided. The system includes a controller, a linear light source and a light sensor. The linear light source and the light sensor are set apart at a distance. When the linear light source emits an indicator light being a vertical linear light projected onto a path the self-guiding machine travels toward, the light sensor senses the indicator light. The vertical linear light is segmented into a first segment projected to a ground and a second segment projected to a floating obstacle when the self-guiding machine approaches the floating obstacle with a height from the ground and the indicator light is projected to the floating obstacle, in which the second segment of the light sensed by the light sensor is determined as the floating obstacle in front of the self-guiding machine.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: September 24, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Kai-Shun Chen, Wei-Chung Wang
  • Patent number: 12095175
    Abstract: An antenna structure includes a substrate, a radiator mounted at an upper portion of a front surface of the substrate, and a grounding element mounted at a lower portion of the front surface of the substrate. The radiator has a first radiating portion. A lower edge of the first radiating portion extends downward to form a second radiating portion. Two portions of a middle of the lower edge of the first radiating portion extend downward to form a third radiating portion and a feeding portion. A free end of the feeding portion is a feeding end. One side edge of the first radiating portion is recessed inward to form a recess. The grounding element has a first grounding portion and a second grounding portion. The first grounding portion and the second grounding portion are located to two sides of the feeding portion, respectively.
    Type: Grant
    Filed: September 11, 2022
    Date of Patent: September 17, 2024
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Chih-Chung Wang, Lan-Yung Hsiao, Ming-Ju Lin, Shao-Kai Sun
  • Publication number: 20240280551
    Abstract: The inventions provide methods for monitoring column performance and operating chromatography column by applying generalized linear model to system suitability parameters (SSPs) to assess how fast the column is aging and whether the column stationary phase needs to be replaced. The methods will lead to faster identification of column failures and help maintain high separation quality and consistent analytical results for analytical and preparative chromatography methods. Columns evaluated and/or monitored by the methods and products resulting from use of the columns and methods also are provided.
    Type: Application
    Filed: February 22, 2024
    Publication date: August 22, 2024
    Inventors: Shao-Chung Wang, Tse-Hong Chen, Kenneth S. Graham
  • Patent number: 12067717
    Abstract: A medical image analyzing system and a medical image analyzing method are provided and include inputting at least one patient image into a first model of a first neural network module to obtain a result having determined positions and ranges of an organ and a tumor of the patient image; inputting the result into a plurality of second models of a second neural network module, respectively, to obtain a plurality of prediction values corresponding to each of the plurality of second models and a model number predicting having cancer in the plurality of prediction values; and outputting a determined result based on the model number predicting having cancer and a number threshold value. Further, processes between the first model and the second models can be automated, thereby improving identification rate of pancreatic cancer.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: August 20, 2024
    Assignee: National Taiwan University
    Inventors: Wei-Chung Wang, Wei-Chih Liao, Kao-Lang Liu, Po-Ting Chen, Po-Chuan Wang, Ting-Hui Wu
  • Publication number: 20240274695
    Abstract: A semiconductor device and method of fabricating a semiconductor device involves formation of a trench above a fin (e.g. a fin of a FinFET device) of the semiconductor device and formation of a multi-layer dielectric structure within the trench. The profile of the multi-layer dielectric structure can be controlled depending on the application to reduce shadowing effects and reduce cut failure risk, among other possible benefits. The multi-layer dielectric structure can include two layers, three layers, or any number of layers and can have a stepped profile, a linear profile, or any other type of profile.
    Type: Application
    Filed: April 24, 2024
    Publication date: August 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Yi Tsai, Chi-Hsiang Chang, Shih-Yao Lin, Tzu-Chung Wang, Shu-Yuan Ku
  • Publication number: 20240264596
    Abstract: There is provided a moving robot including a first light source module and a second light source module respectively project a first light section and a second light section, which are vertical light sections, in front of a moving direction, wherein the first light section and the second light section cross with each other at a predetermined distance in front of the moving robot so as to eliminate a detection dead zone between the first light source module and the second light source module in front of the moving robot to avoid collision with an object during operation.
    Type: Application
    Filed: April 17, 2024
    Publication date: August 8, 2024
    Inventors: Shih-Chin Lin, Wei-Chung Wang, Guo-Zhen Wang
  • Publication number: 20240258467
    Abstract: A light emitting diode (LED) package includes a substrate, at least one micro LED chip, a black material layer, and a transparent material layer. The substrate has a width ranging from 100 micrometers to 1000 micrometers. The at least one micro LED chip is electrically mounted on a top surface of the substrate and has a width ranging from 1 micrometer to 100 micrometers. The black material layer covers the top surface of the substrate to expose the at least one micro LED chip. The transparent material layer covers the at least one micro LED chip and the black material layer.
    Type: Application
    Filed: April 9, 2024
    Publication date: August 1, 2024
    Inventors: Te-Chung WANG, Shiou-Yi KUO
  • Publication number: 20240258220
    Abstract: An integrated circuit package structure includes a circuit board, an integrated circuit die and a conductive stair structure. The circuit has an upper surface. The integrated circuit die is located on the upper surface of the circuit board. The conductive stair structure is located on the upper surface of the circuit board. The conductive stair structure includes steps along a first direction substantially perpendicular to the upper surface of the circuit board. The steps have different heights relative to the upper surface of the circuit board.
    Type: Application
    Filed: April 10, 2024
    Publication date: August 1, 2024
    Inventors: Chien-Chung WANG, Hsih-Yang CHIU
  • Patent number: 12046663
    Abstract: A method includes forming a first fin and a second fin over a substrate. The method includes forming a first dummy gate structure that straddles the first fin and the second fin. The first dummy gate structure includes a first dummy gate dielectric and a first dummy gate disposed over the first dummy gate dielectric. The method includes replacing a portion of the first dummy gate with a gate isolation structure. The portion of the first dummy gate is disposed over the second fin. The method includes removing the first dummy gate. The method includes removing a first portion of the first dummy gate dielectric around the first fin, while leaving a second portion of the first dummy gate dielectric around the second fin intact. The method includes forming a gate feature straddling the first fin and the second fin, wherein the gate isolation structure intersects the gate feature.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Shih-Yao Lin, Chih-Han Lin, Shu-Uei Jang, Ya-Yi Tsai, Chi-Hsiang Chang, Tzu-Chung Wang, Shu-Yuan Ku
  • Patent number: 12040219
    Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chung Huang, Chiung-Wen Hsu, Mei-Ju Kuo, Yu-Ting Weng, Yu-Chi Lin, Ting-Chung Wang, Chao-Cheng Chen
  • Publication number: 20240216401
    Abstract: A pharmaceutical composition, including a compound 1-(3-(3-N,N-dimethylaminocarbonyl)phenoxyl-4-mtrophenyl)-1-N ethyl-N,N?-bis(ethylene)phosphoramidate and at least one therapeutic agent including a chemotherapeutic agent or biological agent, and its medical use are provided.
    Type: Application
    Filed: April 28, 2021
    Publication date: July 4, 2024
    Inventors: Ming-Tain LAI, Wan-Fen LI, Chun-Chung Wang, Lu-Tzu Chen
  • Publication number: 20240222950
    Abstract: A retractable cable device includes a shell, a cable disposed in the shell, a pulley disposed in the shell, a spring assembly disposed in the shell, and a cover covered to the shell. The shell has a bottom board. Two sides of an inner surface of the bottom board extend upward to form two first slide rails. The cable is mounted around the pulley. Two sides of a top surface and two sides of a bottom surface of the pulley are recessed inward to form a plurality of locating grooves. The locating grooves of the bottom surface of the pulley guide the first slide rails of the shell. Two sides of a bottom surface of the cover extend downward to form two second slide rails. The locating grooves of the top surface of the pulley guide the second slide rails of the cover.
    Type: Application
    Filed: October 4, 2023
    Publication date: July 4, 2024
    Inventors: KUANG-MO CHIEN, CHIEN-CHUNG WANG
  • Patent number: 12025653
    Abstract: An artificial intelligence (AI)-based constrained random verification (CRV) method for a design under test (DUT) includes: receiving a series of constraints; obtaining a limited constraint range according to the series of constraints; generating a series of stimuli according to the limited constraint range; and verifying the DUT by the series of stimuli; wherein at least one of the step of obtaining the limited constraint range according to the series of constraints and the step of generating the series of stimuli according to the limited constraint range employs an AI algorithm.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: July 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chung-An Wang, Chiao-Hua Tseng, Chia-Cheng Tsai, Tung-Yu Lee, Yen-Her Chen, Chien-Hsin Yeh, Chia-Shun Yeh, Chin-Tang Lai
  • Patent number: 12026142
    Abstract: A method for processing data, applied in an electronic device, obtains dimensions of a target data set by dimensionality reduction processing, and creates a search index based on the target data set. A denominator d of a noise ratio is set. An unlabeled data point P is selected from the target data set, and neighbors of the data point P are searched for according to the search index to obtain a neighbor data set. A number of data in the neighbor data set of a type which is different from type of the data point P is calculated, the calculated number is set to be a numerator c of the noise ratio. The noise ratio A=c/d is calculated, and if greater than a preset noise ratio, the data point P is labeled as noise data. The present disclosure shortens the time of processing training data.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: July 2, 2024
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Po-Chung Wang
  • Patent number: 12021084
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate isolation structure vertically disposed above the dielectric fin. The semiconductor device includes a gate structure extending along a second direction perpendicular to the first direction. The gate structure includes a first portion and a second portion separated by the gate isolation structure and the dielectric fin. The first portion of the gate structure presents a first beak profile and the second portion of the gate structure presents a second beak profile. The first and second beak profiles point toward each other.
    Type: Grant
    Filed: June 29, 2023
    Date of Patent: June 25, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chih-Han Lin, Ming-Ching Chang, Shu-Yuan Ku, Tzu-Chung Wang
  • Patent number: 12015199
    Abstract: An antenna structure includes a substrate, a radiator mounted at one end of a front surface of the substrate, and a grounding element mounted at the other end of the front surface of the substrate. The radiator has a first radiating portion. Two portions of a middle of one end edge of the first radiating portion extend horizontally to form a second radiating portion and a feeding portion. The feeding portion is located above the second radiating portion. A free end of the feeding portion is a feeding end. An upper portion of the other end edge of the first radiating portion extends opposite to the one end edge of the first radiating portion and extends along a rectangular spiral path to form a rectangular spiral third radiating portion.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: June 18, 2024
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Ming-Ju Lin, Chih-Chung Wang, Shao-Kai Sun, Lan-Yung Hsiao
  • Patent number: 12013798
    Abstract: A method of data synchronization is to be implemented by a redundant server system including an active input/output module (IOM) and a passive IOM. The method includes: allocating a primary transfer buffer in the active IOM; allocating a secondary transfer buffer in the passive IOM; collecting pieces of secondary dedicated-sensor data, and storing the pieces of secondary dedicated-sensor data in the primary transfer buffer at once; collecting pieces of primary dedicated-sensor data; after the pieces of primary dedicated-sensor data have been collected, updating the primary state data based on the pieces of primary dedicated-sensor data thus collected and the pieces of secondary dedicated-sensor data stored in the primary transfer buffer at once, and storing the primary state data thus updated in the secondary transfer buffer; and updating the secondary state data based on the primary state data that have been updated and that are stored in the secondary transfer buffer.
    Type: Grant
    Filed: November 3, 2022
    Date of Patent: June 18, 2024
    Assignee: Mitac Computing Technology Corporation
    Inventors: Chin-Hung Tan, Heng-Chia Hsu, Chien-Chung Wang, Yu-Shu Yeh, Chen-Yin Lin