Patents by Inventor Chung Song
Chung Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9632702Abstract: In at least one embodiment, a data storage system has a plurality of non-volatile storage devices, a higher level controller and one or more lower level controllers. In response to one or more inputs, the higher level controller of the data storage system issues an initialization command specifying initialization of a storage extent. In response to the initialization command, one or more lower level controllers issue dataless initialization commands to the plurality of non-volatile storage devices. In response to the dataless initialization commands, multiple first non-volatile storage devices among the plurality of non-volatile storage devices each initialize a respective data portion of the storage extent and a second non-volatile storage device among the plurality of non-volatile storage devices initializes a data protection portion of the storage extent.Type: GrantFiled: October 15, 2014Date of Patent: April 25, 2017Assignee: International Business Machines CorporationInventors: Cheng-Chung Song, Andrew D. Walls
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Patent number: 9634192Abstract: Disclosed are a light emitting device, a method of fabricating the same, a light emitting device package, and a lighting system. The light emitting device may include a substrate, a first conductive semiconductor layer on the substrate, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, an ohmic layer on the second conductive semiconductor layer, an insulating layer on the ohmic layer, a first branch electrode electrically connected with the first conductive semiconductor layer, a first pad electrode connected with the first branch electrode for electrical connection with the first conductive semiconductor layer, a second pad electrode in contact with the ohmic layer through the insulating layer, a second branch electrode connected with the second pad electrode on the insulating layer, and a second through electrode passing through the insulating layer to connect the second branch electrode with the ohmic layer.Type: GrantFiled: March 18, 2015Date of Patent: April 25, 2017Assignee: LG INNOTEK CO., LTD.Inventors: Ji Hyung Moon, Myeong Soo Kim, Chung Song Kim
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Patent number: 9626121Abstract: A mechanism is provided for performing de-duplication process on a set of non-volatile memories as part of another process routinely performed on the set of non-volatile memories. A hash value of data stored at a first physical location in a non-volatile memory in the set of non-volatile memories is received from a non-volatile memory controller associated with the non-volatile memory. Responsive to the hash value matching one or more existing hash values for data stored at one or more other physical locations in the set of non-volatile memories, an optimal physical location is identified from the first physical location and the one or more other physical locations. Responsive to identifying the optimal physical location, a set of logical addresses associated with the hash values is updated to point to the optimal physical location. The non-optimal physical locations are further invalidated in order that the non-optimal physical locations are erased.Type: GrantFiled: December 19, 2014Date of Patent: April 18, 2017Assignee: International Business Machines CorporationInventors: Charles J. Camp, Timothy J. Fisher, Cheng-Chung Song, Robert W. Tillerson, Andrew D. Walls
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Patent number: 9471506Abstract: For data processing in a computing storage environment by a processor device, the environment incorporating at least high-speed and lower-speed caches, and managed tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that clumped uniformly hot ones of the groups of data segments are migrated to use a Solid State Drive (SSD) portion of the tiered levels of storage; uniformly hot groups of data segments are determined using a first, largest granulated, heat map for a selected one of the group of the data segments; a second heat map, which is smaller than the first and having the largest granularity of the first heat map, is used to determine the clumped hot groups; and sparsely hot groups are determined when neither the first heat map nor the second heat map are hotter than the first and second predetermined thresholds, respectively.Type: GrantFiled: April 22, 2015Date of Patent: October 18, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Patent number: 9465554Abstract: For data processing in a distributed computing storage environment by a processor device, the distributed computing environment incorporating at least high-speed and lower-speed caches, and managed tiered levels of storage, groups of data segments and clumped hot ones of the data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to use a Solid State Drive (SSD) portion of the tiered levels of storage; uniformly hot groups of data segments are determined using a first, heat map for a selected one of the group of the data segments; and a second heat map is used to determine the clumped hot groups.Type: GrantFiled: January 18, 2016Date of Patent: October 11, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Patent number: 9411742Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that if a selected group is cached in the lower-speed cache and is determined to become uniformly hot, migrating the selected group from the lower-speed cache to the SSD portion while refraining from processing data retained in the lower-speed cache until the selected group is fully migrated to the SSD portion.Type: GrantFiled: October 5, 2015Date of Patent: August 9, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Publication number: 20160188211Abstract: A data storage system includes a pre-cache and a plurality of storage devices across which a data storage array is distributed. In response to receipt of a write request specifying a logical address and write data, the data storage system buffers the write request among a plurality of write requests in the pre-cache without provisioning in the data storage array a physical extent corresponding to the logical address. A management node analyzes the plurality of write requests buffered in the pre-cache. In response to the analyzing identifying a first pattern of write requests, the management node provisions, in the data storage array, a first physical extent having a smaller grain size and destages the write data to the first physical extent. In response to the analyzing identifying a second pattern of write requests, the management node provisions a second physical extent having a larger grain size and destages the write data from the pre-cache to the second physical extent.Type: ApplicationFiled: December 30, 2014Publication date: June 30, 2016Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: CHENG-CHUNG SONG, ANDREW D. WALLS
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Publication number: 20160179433Abstract: A mechanism is provided for performing de-duplication process on a set of non-volatile memories as part of another process routinely performed on the set of non-volatile memories. A hash value of data stored at a first physical location in a non-volatile memory in the set of non-volatile memories is received from a non-volatile memory controller associated with the non-volatile memory. Responsive to the hash value matching one or more existing hash values for data stored at one or more other physical locations in the set of non-volatile memories, an optimal physical location is identified from the first physical location and the one or more other physical locations. Responsive to identifying the optimal physical location, a set of logical addresses associated with the hash values is updated to point to the optimal physical location. The non-optimal physical locations are further invalidated in order that the non-optimal physical locations are erased.Type: ApplicationFiled: December 19, 2014Publication date: June 23, 2016Inventors: Charles J. Camp, Timothy J. Fisher, Cheng-Chung Song, Robert W. Tillerson, Andrew D. Walls
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Patent number: 9361207Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: GrantFiled: December 27, 2013Date of Patent: June 7, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cheng-Chung Song
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Publication number: 20160132273Abstract: For data processing in a distributed computing storage environment by a processor device, the distributed computing environment incorporating at least high-speed and lower-speed caches, and managed tiered levels of storage, groups of data segments and clumped hot ones of the data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to use a Solid State Drive (SSD) portion of the tiered levels of storage; uniformly hot groups of data segments are determined using a first, heat map for a selected one of the group of the data segments; and a second heat map is used to determine the clumped hot groups.Type: ApplicationFiled: January 18, 2016Publication date: May 12, 2016Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Patent number: 9329977Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: GrantFiled: December 27, 2013Date of Patent: May 3, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cheng-Chung Song
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Patent number: 9323687Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to utilize a Solid State Drive (SSD) portion of the tiered levels of storage, while sparsely hot ones of the groups of data segments are migrated to utilize the lower-speed cache.Type: GrantFiled: November 7, 2013Date of Patent: April 26, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Publication number: 20160110111Abstract: In at least one embodiment, a data storage system has a plurality of non-volatile storage devices, a higher level controller and one or more lower level controllers. In response to one or more inputs, the higher level controller of the data storage system issues an initialization command specifying initialization of a storage extent. In response to the initialization command, one or more lower level controllers issue dataless initialization commands to the plurality of non-volatile storage devices. In response to the dataless initialization commands, multiple first non-volatile storage devices among the plurality of non-volatile storage devices each initialize a respective data portion of the storage extent and a second non-volatile storage device among the plurality of non-volatile storage devices initializes a data protection portion of the storage extent.Type: ApplicationFiled: October 15, 2014Publication date: April 21, 2016Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Cheng-Chung SONG, Andrew D. WALLS
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Patent number: 9285998Abstract: For data processing in a distributed computing storage environment by a processor device, the distributed computing environment incorporating at least high-speed and lower-speed caches, and managed tiered levels of storage, groups of data segments and clumped hot ones of the data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to use a Solid State Drive (SSD) portion of the tiered levels of storage; uniformly hot groups of data segments are determined using a first, largest granulated, heat map for a selected one of the group of the data segments; and a second heat map, which is smaller than the first and having the largest granularity of the first heat map, is used to determine the clumped hot groups.Type: GrantFiled: June 22, 2015Date of Patent: March 15, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Publication number: 20160043280Abstract: Disclosed are a light emitting device, a method of fabricating the same, a light emitting device package, and a lighting system. The light emitting device may include a substrate, a first conductive semiconductor layer on the substrate, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, an ohmic layer on the second conductive semiconductor layer, an insulating layer on the ohmic layer, a first branch electrode electrically connected with the first conductive semiconductor layer, a first pad electrode connected with the first branch electrode for electrical connection with the first conductive semiconductor layer, a second pad electrode in contact with the ohmic layer through the insulating layer, a second branch electrode connected with the second pad electrode on the insulating layer, and a second through electrode passing through the insulating layer to connect the second branch electrode with the ohmic layer.Type: ApplicationFiled: March 18, 2015Publication date: February 11, 2016Inventors: Ji Hyung MOON, Myeong Soo KIM, Chung Song KIM
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Publication number: 20160026578Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that if a selected group is cached in the lower-speed cache and is determined to become uniformly hot, migrating the selected group from the lower-speed cache to the SSD portion while refraining from processing data retained in the lower-speed cache until the selected group is fully migrated to the SSD portion.Type: ApplicationFiled: October 5, 2015Publication date: January 28, 2016Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. BENHASE, Lokesh M. GUPTA, Cheng-Chung SONG
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Publication number: 20150349220Abstract: Disclosed is a light emitting device including a light emitting structure including a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer, a first electrode electrically connected with the first conductive semiconductor layer, a mirror layer under the light emitting structure, a window semiconductor layer between the mirror layer and the light emitting structure, a reflective layer under the mirror layer, a conductive contact layer between the reflective layer and the window semiconductor layer and in contact with the second conductive semiconductor layer, and a conductive support substrate under the reflective layer. The window semiconductor layer includes a C-doped P-based semiconductor doped with a higher dopant concentration. The conductive contact layer includes material different from that of the mirror layer with a thickness thinner than that of the window semiconductor layer.Type: ApplicationFiled: May 29, 2015Publication date: December 3, 2015Applicant: LG INNOTEK CO., LTD.Inventors: Ji Hyung MOON, Sang Youl LEE, Bum Doo PARK, Chung Song KIM, Sang Rock PARK, Byung Hak JEONG, Tae Yong LEE
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Publication number: 20150319816Abstract: A single-wire dimming method is provided in the present invention. The method is adapted for a lamp with a first color light source and a second color light source. The method includes: providing a dimming control interface, wherein the power voltage is chopped when the dimming control interface is operated; dividing a period of the power voltage into a first phase period, a second phase period and a third phase period; chopping the power voltage at the first phase period when a user adjust the dimming control interface to turn on a first color light; chopping the power voltage at the second phase period when a user adjust the dimming control interface to turn on a second color light; chopping the power voltage at the third phase period when a user adjust the dimming control interface to turn on a mix color light, wherein the mix color light is to combine the first color light and the second color light.Type: ApplicationFiled: April 29, 2015Publication date: November 5, 2015Inventors: Yu-Kai CHEN, Chau-Chung SONG, Yung-Chun WU, Chin-Hsiung CHANG
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Patent number: 9176713Abstract: A method, apparatus and program storage device that provides a user mode device interface for enabling software reuse. The user mode device interface allows device interface requests to be sent and received, including commands and data structures, via socket communication. A device state machine on the client side is implemented in a set of shared functions that can be incorporated by all applications that want to communicate to a particular service provider. The service provider offers the software functions over a user mode device interface via socket communication. The device state machine on the service provider side is embedded in the socket server implementation. The interaction between the state machines on both client and server sides ensures a device interface request is properly handled.Type: GrantFiled: November 30, 2005Date of Patent: November 3, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chiahong Chen, Radha K. Ramachandran, Cheng-Chung Song
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Patent number: 9158673Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to utilize a Solid State Drive (SSD) portion of the tiered levels of storage, while sparsely hot ones of the groups of data segments are migrated to utilize the lower-speed cache.Type: GrantFiled: January 22, 2013Date of Patent: October 13, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song