Patents by Inventor Chung Song
Chung Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9041028Abstract: Provided are a light emitting device, a method for fabricating the light emitting device, and a light emitting device package. The light emitting device includes a light emitting structure including a first conductive type semiconductor layer, an active layer under the first conductive type semiconductor layer, and a second conductive type semiconductor layer under the active layer, a conductive support member, and a protection member on the light emitting structure. The light emitting structure has a first width and a second width. A difference between the first width and the second width defines a stepped structure or an inclined structure. The protection member is disposed on the stepped or the inclined structure defined by the difference between the first and second widths of the light emitting structure.Type: GrantFiled: February 23, 2011Date of Patent: May 26, 2015Assignee: LG INNOTEK CO., LTD.Inventors: Jung Hyeok Bae, Byung Hak Jeong, Kyung Wook Park, Chung Song Kim
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Patent number: 9037791Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and managed tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to use a Solid State Drive (SSD) portion of the tiered levels of storage, clumped hot ones of the groups of data segments are migrated to use the SSD portion while using the lower-speed cache for a remaining portion of the clumped hot ones, and sparsely hot ones of the groups of data segments are migrated to use the lower-speed cache while using a lower one of the tiered levels of storage for a remaining portion of the sparsely hot ones.Type: GrantFiled: January 22, 2013Date of Patent: May 19, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
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Patent number: 8997062Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: GrantFiled: May 7, 2012Date of Patent: March 31, 2015Assignee: International Business Machines CorporationInventor: Cheng-Chung Song
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Publication number: 20150046649Abstract: Provided are a computer program product, system, and method for managing caching of extents of tracks in a first cache, second cache and storage device. A determination is made of an eligible track in a first cache eligible for demotion to a second cache, wherein the tracks are stored in extents configured in a storage device, wherein each extent is comprised of a plurality of tracks. A determination is made of an extent including the eligible track and whether second cache caching for the determined extent is enabled or disabled. The eligible track is demoted from the first cache to the second cache in response to determining that the second cache caching for the determined extent is enabled. Selection is made not to demote the eligible track in response to determining that the second cache caching for the determined extent is disabled.Type: ApplicationFiled: October 24, 2014Publication date: February 12, 2015Inventors: Michael T. Benhase, Lokesh M. Gupta, Paul H. Muench, Cheng-Chung Song
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Patent number: 8935476Abstract: Provided are a computer program product, system, and method for managing caching of extents of tracks in a first cache, second cache and storage device. A determination is made of an eligible track in a first cache eligible for demotion to a second cache, wherein the tracks are stored in extents configured in a storage device, wherein each extent is comprised of a plurality of tracks. A determination is made of an extent including the eligible track and whether second cache caching for the determined extent is enabled or disabled. The eligible track is demoted from the first cache to the second cache in response to determining that the second cache caching for the determined extent is enabled. Selection is made not to demote the eligible track in response to determining that the second cache caching for the determined extent is disabled.Type: GrantFiled: January 17, 2012Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Lokesh M. Gupta, Paul H. Muench, Cheng-Chung Song
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Patent number: 8935477Abstract: Provided are a computer program product, system, and method for managing caching of extents of tracks in a first cache, second cache and storage device. A determination is made of an eligible track in a first cache eligible for demotion to a second cache, wherein the tracks are stored in extents configured in a storage device, wherein each extent is comprised of a plurality of tracks. A determination is made of an extent including the eligible track and whether second cache caching for the determined extent is enabled or disabled. The eligible track is demoted from the first cache to the second cache in response to determining that the second cache caching for the determined extent is enabled. Selection is made not to demote the eligible track in response to determining that the second cache caching for the determined extent is disabled.Type: GrantFiled: February 26, 2013Date of Patent: January 13, 2015Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Lokesh M. Gupta, Paul H. Muench, Cheng-Chung Song
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Patent number: 8863094Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: GrantFiled: May 18, 2010Date of Patent: October 14, 2014Assignee: International Business Machines CorporationInventor: Cheng-Chung Song
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Publication number: 20140208018Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and managed tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to use a Solid State Drive (SSD) portion of the tiered levels of storage, clumped hot ones of the groups of data segments are migrated to use the SSD portion while using the lower-speed cache for a remaining portion of the clumped hot ones, and sparsely hot ones of the groups of data segments are migrated to use the lower-speed cache while using a lower one of the tiered levels of storage for a remaining portion of the sparsely hot ones.Type: ApplicationFiled: January 22, 2013Publication date: July 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. BENHASE, Lokesh M. GUPTA, Cheng-Chung SONG
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Publication number: 20140208020Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to utilize a Solid State Drive (SSD) portion of the tiered levels of storage, while sparsely hot ones of the groups of data segments are migrated to utilize the lower-speed cache.Type: ApplicationFiled: November 7, 2013Publication date: July 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. BENHASE, Lokesh M. GUPTA, Cheng-Chung SONG
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Publication number: 20140195857Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: ApplicationFiled: December 27, 2013Publication date: July 10, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cheng-Chung Song
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Patent number: 8766287Abstract: The present invention relates to a light emitting device, a light emitting device package, and a lighting device with the same. The light emitting device includes a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, a second electrode layer formed on an underside of the light emitting structure connected to the second conductive type semiconductor layer electrically, a first electrode layer in contact with the first conductive type semiconductor layer passed through the second conductive type semiconductor layer and the active layer, and an insulating layer formed between the second electrode layer and the first electrode layer, between the second conductive type semiconductor layer and the first electrode layer, and between the active layer and the first electrode layer.Type: GrantFiled: September 23, 2011Date of Patent: July 1, 2014Assignee: LG Innotek Co., Ltd.Inventors: Ji Hyung Moon, Sang Youl Lee, Chung Song Kim, Kwang Ki Choi, June O Song
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Publication number: 20140145233Abstract: A light emitting device includes a light emitting structure including a second conduction type semiconductor layer, an active layer, and a first conduction type semiconductor layer, a second electrode layer arranged under the light emitting structure, a first electrode layer having at least portion extending to contact the first conduction type semiconductor layer passing the second conduction type semiconductor layer and the active layer, and an insulating layer arranged between the second electrode layer and the first electrode layer, between the second conduction type semiconductor layer and the first electrode layer, and between the active layer and the first electrode layer, wherein said at least one portion of the first electrode layer contacting the first conduction type semiconductor layer has a roughness.Type: ApplicationFiled: January 31, 2014Publication date: May 29, 2014Inventors: Sang Youl LEE, Ji Hyung MOON, June O SONG, Kwang Ki CHOI, Chung Song KIM, Hwan Hee JEONG
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Patent number: 8719619Abstract: A method for improving the performance of a RAID under rebuild is disclosed. In one embodiment, such a method includes identifying a RAID requiring rebuild, such as by identifying a RAID having one or more failed storage-drive components. The method then automatically performs the following in response to identifying the RAID: the method identifies hot extents (i.e., extents most heavily accessed) in the RAID; the method migrates the hot extents from the identified failed RAID to a normal RAID not requiring rebuild, such as to an underused RAID; and the method rebuilds the failed RAID. The migration of the hot extents will ideally occur while the RAID is being rebuilt but may also be performed prior to the rebuild process. A corresponding apparatus and computer program product are also disclosed.Type: GrantFiled: September 20, 2011Date of Patent: May 6, 2014Assignee: International Business Machines CorporationInventors: Chao Guang Li, Yao Peng, Cheng-Chung Song, Zhi Qiang Wang, Hui Zhang
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Publication number: 20140115567Abstract: Provided are techniques for receiving an error inject script that describes one or more error inject scenarios that define under which conditions at least one error inject is to be executed and compiling the error inject script to output an error inject data structure. While executing code that includes the error inject, an indication that an event has been triggered is received, conditions defined in the one or more error inject scenarios are evaluated using the error inject data structure, and, for each of the conditions that evaluates to true, one or more actions defined in the error inject script for the condition are performed.Type: ApplicationFiled: December 27, 2013Publication date: April 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Cheng-Chung Song
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Patent number: 8643040Abstract: A light emitting device includes a light emitting structure including a second conduction type semiconductor layer, an active layer, and a first conduction type semiconductor layer, a second electrode layer arranged under the light emitting structure, a first electrode layer having at least portion extending to contact the first conduction type semiconductor layer passing the second conduction type semiconductor layer and the active layer, and an insulating layer arranged between the second electrode layer and the first electrode layer, between the second conduction type semiconductor layer and the first electrode layer, and between the active layer and the first electrode layer, wherein said at least one portion of the first electrode layer contacting the first conduction type semiconductor layer has a roughness.Type: GrantFiled: May 6, 2011Date of Patent: February 4, 2014Assignee: LG Innotek Co., Ltd.Inventors: Sang Youl Lee, Ji Hyung Moon, June O Song, Kwang Ki Choi, Chung Song Kim, Hwan Hee Jeong
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Publication number: 20130275694Abstract: A method for migrating volumes in a storage system includes identifying an extent of data (belonging to a volume) requiring migration from a source extent to a target extent. The method allocates a selected number of copiers to the extent of data to migrate the extent of data from the source extent to the target extent. Each copier is configured to copy a unit of data, which is a smaller division of the extent of data. The method monitors destages (i.e., writes) that occur to the source extent as the copiers migrate the extent of data from the source extent to the target extent. In the event the destages occur faster than the copiers can copy units to the target extent, the method allocates additional copiers to the extent of data to assist in migrating the extent of data. A corresponding apparatus and computer program product are also disclosed.Type: ApplicationFiled: April 13, 2012Publication date: October 17, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Xue Dong Gao, Kurt A. Lovrien, Richard A. Ripberger, Cheng-Chung Song
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Patent number: 8552452Abstract: Disclosed is a light emitting device including, a second electrode layer, a light emitting structure that includes a second conductive semiconductor layer, an active layer and a first conductive semiconductor layer and that is provided on the second electrode layer, a first electrode layer that includes a pad part and an electrode part connected to the pad part and that is provided on the light emitting structure, and a current blocking layer arranged between the second electrode layer and the light emitting structure in such a way that a part of the current block layer overlaps to correspond to the first electrode layer, wherein a width of the current blocking layer corresponding to the electrode part is different depending upon a clearance with the pad part.Type: GrantFiled: August 19, 2011Date of Patent: October 8, 2013Assignee: LG Innotek Co., Ltd.Inventors: Hwan Hee Jeong, Sang Youl Lee, Young kyu Jeong, Chung song Kim, June O Song, Kwang Ki Choi, Eun Joo Kim
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Patent number: 8549225Abstract: A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed herein.Type: GrantFiled: March 26, 2012Date of Patent: October 1, 2013Assignee: Internatioal Business Machines CorporationInventors: Stephen LaRoux Blinick, Cheng-Chung Song, Lokesh Mohan Gupta, Yu-Cheng Hsu
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Publication number: 20130185493Abstract: Provided are a computer program product, system, and method for managing caching of extents of tracks in a first cache, second cache and storage device. A determination is made of an eligible track in a first cache eligible for demotion to a second cache, wherein the tracks are stored in extents configured in a storage device, wherein each extent is comprised of a plurality of tracks. A determination is made of an extent including the eligible track and whether second cache caching for the determined extent is enabled or disabled. The eligible track is demoted from the first cache to the second cache in response to determining that the second cache caching for the determined extent is enabled. Selection is made not to demote the eligible track in response to determining that the second cache caching for the determined extent is disabled.Type: ApplicationFiled: January 17, 2012Publication date: July 18, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael T. Benhase, Lokesh M. Gupta, Paul H. Muench, Cheng-Chung Song
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Publication number: 20130134784Abstract: Disclosed is an Ping-Pong Type Battery Management system. The Ping-Pong Type Battery Management system includes first and second battery packs, first and second battery switches, a sensing and controlling module, a supply power regulation module and a load power regulation module. The first battery switch is formed on the first battery pack. The second battery switch is formed on the second battery pack. The sensing and controlling module is connected to the first and second battery packs and the first and second battery switches. The supply power regulation module is connected to the first and second battery switches. The load power regulation module is connected to the first and second battery switches.Type: ApplicationFiled: November 28, 2011Publication date: May 30, 2013Applicant: Chung-Shan Institute of Science and Technology, Armaments, Bureau, Ministry of National DefenseInventors: Lan-Rong Dung, Chau-Chung Song, Fa-Hwa Shieh, Shiang-Fu Yuan, Chan-Chia Yeh, Chee-Chang Chen