Abstract: A method for preparing a semiconductor device includes providing an integrated circuit die having a bond pad. The bond pad includes aluminum (Al). The method also includes etching a top portion of the bond pad to form a recess, and bonding a wire bond to the recess in the bond pad. The wire bond includes copper (Cu).

Abstract: An optical detection device includes a substrate, a housing, an optical modulating component, an optical sensor and a cover. The housing is disposed on the substrate and includes a first aperture. The housing is unvaried due to inspection standard or design requirement of the optical detection device. The optical modulating component is disposed on the housing and aligning with the first aperture. The optical sensor is disposed on the substrate and adapted to receive an optical signal passing through the optical modulating component and the first aperture. The cover is disposed on the housing to cover the first aperture. The cover is replaceable for attaching the cover varied for the inspection standard or the design requirement to the unvaried housing in response to a surface of the cover opposite to the housing matched and engaged with a light penetrating area on the optical navigation apparatus.

Abstract: Provided are a system and a method for cardiovascular risk prediction, where artificial intelligence is utilized to perform segmentation on non-contrast or contrast medical images to identify precise regions of the heart, pericardium, and aorta of a subject, such that the adipose tissue volume and calcium score can be derived from the medical images to assist in cardiovascular risk prediction. Also provided is a computer readable medium for storing a computer executable code to implement the method.

Abstract: The present system combines, on a host server, clinician software for accessing a case history database of past results/feedback from users seeking stimulation therapy, other users within a member network and other users outside the member network and pharmacy software for generating, in the form of a database, an expert system/artificial intelligence program and signal processing software, stimulation waveforms required by the users according to prescriptions from clinicians (completed by clinical experts/server knowledge software) and/or pain points indicated by the users, wherein an innovative open terminal data format and file format and an innovative high-efficiency frequency band waveform compression technique are used.

Abstract: A boot method for an embedded system is provided. The embedded system includes two mainboards each provided with a baseboard management controller (BMC), a non-volatile memory unit and a network adapter. When the embedded system is turned on, each of the BMCs performs a boot procedure, and then loads an operating system (OS) image file from a corresponding non-volatile memory unit to execute an operating system. When one BMC fails to load the OS image file or to execute the operating system, the BMC causes the corresponding network adapter to communicate with the other network adapter to acquire the OS image file from the non-volatile memory unit on the other mainboard, so as to replace the OS image file in the corresponding non-volatile memory unit, and directly loads the OS image thus acquired to execute the operating system.

Abstract: A MEMS microphone package is provided. The MEMS microphone package includes a substrate and a circuit device, the substrate has a conductive structure, and the circuit device has through silicon via structures that are electrically connected to the conductive structure. The MEMS microphone package also includes a sensor disposed on the substrate and having a connecting structure disposed on the bottom of the sensor. The connecting structure is electrically connected to the substrate and the circuit device. The MEMS microphone package further includes a cap covering the circuit device and the sensor and separated from the circuit device and the sensor.

Abstract: The current disclosure describes techniques for forming a low resistance junction between a source/drain region and a nanowire channel region in a gate-all-around FET device. A semiconductor structure includes a substrate, multiple separate semiconductor nanowire strips vertically stacked over the substrate, a semiconductor epitaxy region adjacent to and laterally contacting each of the multiple separate semiconductor nanowire strips, a gate structure at least partially over the multiple separate semiconductor nanowire strips, and a dielectric structure laterally positioned between the semiconductor epitaxy region and the gate structure. The first dielectric structure has a hat-shaped profile.

Abstract: A fastening assembly includes a panel defining an aperture, a fastener having a head, a shaft portion extending from the head, and a recess formed in the head, and a sacrificial primary anode insert disposed in the recess. The sacrificial primary anode insert is configured to corrode at a rate faster than a corrosion rate of the fastener.

Abstract: A pressure detection device of detecting a forced state of a deformable object includes a body, an image sensor and a processor. The body is a deformable hollow structure. The body has an inner surface and an outer surface, and an identifiable vision feature is disposed on the inner surface. The image sensor is disposed inside the body and faces the inner surface of the body, and is adapted to capture a frame containing the identifiable vision feature on the inner surface. The processor is electrically connected with the image sensor, and adapted to analyze position variation of the identifiable vision feature within the captured frame for identifying a motion type of a gesture applied to the outer surface of the body.

Abstract: A semiconductor device includes a plurality of fins on a substrate, a fin end spacer plug on an end surface of each of the plurality of fins and a fin liner layer, an insulating layer on the plurality of fins, and a source/drain epitaxial layer in a source/drain recess in each of the plurality of fins.

Abstract: In some embodiments, a method for forming an integrated chip (IC) is provided. The method incudes forming an interlayer dielectric (ILD) layer over a substrate. A first opening is formed in the ILD layer and in a first region of the IC. A second opening is formed in the ILD layer and in a second region of the IC. A first high-k dielectric layer is formed lining both the first and second openings. A second dielectric layer is formed on the first high-k dielectric layer and lining the first high-k dielectric layer in both the first and second regions. The second high-k dielectric layer is removed from the first region. A conductive layer is formed over both the first and second high-k dielectric layers, where the conductive layer contacts the first high-k dielectric layer in the first region and contacts the second high-k dielectric in the second region.

Abstract: A multi-band antenna includes a lower grounding portion, a feed-in portion, a feeding point, an upper grounding portion, a first extending portion, a second extending portion, a third extending portion, a fourth extending portion, a fifth extending portion, a first branch, a second branch, a third branch and a loop portion. The feed-in portion, the first extending portion, the second extending portion, the third extending portion, the fourth extending portion and the first branch form a first radiation portion. The feed-in portion, the first extending portion, the second extending portion, the third extending portion, the fifth extending portion and the second branch form a second radiation portion. The feed-in portion, the first extending portion, the second extending portion and the third branch form a third radiation portion.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate isolation structure vertically disposed above the dielectric fin. The semiconductor device includes a gate structure extending along a second direction perpendicular to the first direction. The gate structure includes a first portion and a second portion separated by the gate isolation structure and the dielectric fin. The first portion of the gate structure presents a first beak profile and the second portion of the gate structure presents a second beak profile. The first and second beak profiles point toward each other.

Abstract: A micro-electro-mechanical system (MEMS) microphone package is provided. The MEMS microphone package includes a first micro-electro-mechanical system (MEMS) sensor die, an integrated circuit (IC) die and a first conductive lid. The first micro-electro-mechanical system (MEMS) sensor die has a first surface and a second surface opposite to the first surface. The IC die is stacked on the first surface of the first MEMS sensor die. The first conductive lid is disposed on the second surface of the first MEMS sensor die.

Abstract: A semiconductor device includes a plurality of fins on a substrate, a fin end spacer plug on an end surface of each of the plurality of fins and a fin liner layer, an insulating layer on the plurality of fins, and a source/drain epitaxial layer in a source/drain recess in each of the plurality of fins.

Abstract: A semiconductor device includes a plurality of semiconductor layers arranged one above another, and source/drain epitaxial regions on opposite sides of the plurality of semiconductor layers. The semiconductor device further includes a gate structure surrounding each of the plurality of semiconductor layers. The gate structure includes interfacial layers respectively over the plurality of semiconductor layers, a high-k dielectric layer over the interfacial layers, and a gate metal over the high-k dielectric layer. The gate structure further includes gate spacers spacing apart the gate structure from the source/drain epitaxial regions. A top position of the high-k dielectric layer is lower than top positions of the gate spacers.

Abstract: An embodiment semiconductor device may include a semiconductor die; one or more redistribution layers formed on a surface of the semiconductor die and electrically coupled to the semiconductor die; and an active or passive electrical device electrically coupled to the one or more redistribution layers. The active or passive electrical device may include a silicon substrate and a through-silicon-via formed in the silicon substrate. The active or passive electrical device may be configured as an integrated passive device including a deep trench capacitor or as a local silicon interconnect. The semiconductor device may further include a molding material matrix formed on a surface of the one or more redistribution layers such that the molding material matrix partially or completely surrounds the active or passive electrical device.

Abstract: A light-emitting diode device including a pixel structure including first, second and third light-emitting diode chips, a passivation layer, and first, second, third and fourth circuit layers is provided. The first and second light-emitting diode chips are positioned on a top surface opposite to a light-emitting surface of the third light-emitting diode chip. First and second vertical projections of the first and second light-emitting diode chips on the top surface do not overlap each other. First and second bonding surfaces of the first and second circuit layers corresponding to openings in the passivation layer are positioned to overlap the first vertical projection and are separated from the second vertical projection. Third and fourth bonding surfaces of the third and fourth circuit layers that correspond to openings in the passivation layer are positioned to overlap the second vertical projection and are separated from the first vertical projection.