Patents by Inventor Chung Wang

Chung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230187542
    Abstract: A semiconductor device and method of fabricating a semiconductor device involves formation of a trench above a fin (e.g. a fin of a FinFET device) of the semiconductor device and formation of a multi-layer dielectric structure within the trench. The profile of the multi-layer dielectric structure can be controlled depending on the application to reduce shadowing effects and reduce cut failure risk, among other possible benefits. The multi-layer dielectric structure can include two layers, three layers, or any number of layers and can have a stepped profile, a linear profile, or any other type of profile.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 15, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ya-Yi Tsai, Chi-Hsiang Chang, Shih-Yao LIN, Tzu-Chung Wang, Shu-Yuan Ku
  • Patent number: 11676886
    Abstract: An integrated circuit package structure includes a circuit board, an integrated circuit die and a conductive stair structure. The circuit has an upper surface. The integrated circuit die is located on the upper surface of the circuit board. The conductive stair structure is located on the upper surface of the circuit board. The conductive stair structure includes steps along a first direction substantially perpendicular to the upper surface of the circuit board. The steps have different heights relative to the upper surface of the circuit board.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: June 13, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chien-Chung Wang, Hsih-Yang Chiu
  • Patent number: 11677149
    Abstract: A multi-band antenna includes a grounding portion, a feed-in portion, a feeding point, a first radiation portion, a second radiation portion, a third radiation portion and a fourth radiation portion. The feed-in portion has a first end edge, a second end edge, a first side edge and a second side edge. The feeding point is disposed at the feed-in portion. The first radiation portion is extended from the grounding portion. The second radiation portion is extended from the second end edge. The third radiation portion is extended from the first end edge. The fourth radiation portion is extended from an upper portion of the first end edge and an upper portion of the second end edge.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: June 13, 2023
    Assignee: CHENG UEI PRECISION INDUSTRY CO., LTD.
    Inventors: Ming-Ju Lin, Lan-Yung Hsiao, Chih-Chung Wang, Shao-Kai Sun
  • Patent number: 11675365
    Abstract: There is provided a moving robot including a first light source module and a second light source module respectively project a first light section and a second light section, which are vertical light sections, in front of a moving direction, wherein the first light section and the second light section cross with each other at a predetermined distance in front of the moving robot so as to eliminate a detection dead zone between the first light source module and the second light source module in front of the moving robot to avoid collision with an object during operation.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: June 13, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Shih-Chin Lin, Wei-Chung Wang, Guo-Zhen Wang
  • Publication number: 20230176330
    Abstract: An optical lens assembly includes a stop and includes, in order from an object side to an image side: a first lens, a second lens, a third lens, a fourth lens, a fifth lens, a sixth lens, and a seventh lens. A half of a maximum field of view of the optical lens assembly is HFOV, a distance from an image-side surface of the seventh lens to an image plane on an optical axis is BFL, a radius of curvature of an object-side surface of the fourth lens is R7, a radius of curvature of an image-side surface of the fourth lens is R8, and the following conditions are satisfied: 45<HFOV*BFL, and ?1032.81<R7*R8<?298.89.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 8, 2023
    Inventors: Chi-Chung WANG, Ya-Hsin HUANG
  • Patent number: 11669103
    Abstract: The disclosure is related to a system for obstacle detection adapted to a self-guiding machine. The system includes a controller for driving the system, a light emitter, and a light sensor. The light emitter and the light sensor are set apart at a distance. When the light emitter emits an indicator light being a vertical linear light projected onto a path the self-guiding machine travels toward, the light sensor senses the indicator light. The vertical linear light is segmented into a first segment projected to a ground and a second segment projected to a floating obstacle when the self-guiding machine approaches the floating obstacle with a height from the ground and the indicator light is projected to the floating obstacle, in which the second segment of the light sensed by the light sensor is determined as the floating obstacle in front of the self-guiding machine.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: June 6, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Kai-Shun Chen, Wei-Chung Wang
  • Patent number: 11654636
    Abstract: Methods for ultrasonic welding of thermoplastic polymer workpieces and assemblies made therefrom are provided. The method may comprise disposing a first region of a first thermoplastic polymer workpiece and a second region of a second thermoplastic polymer workpiece between an ultrasonic horn and an anvil of an ultrasonic welding device. The first workpiece has a preformed deformation and at least one of the first and/or second workpieces has an adhesive precursor applied thereto. The ultrasonic horn or anvil seats within the preformed deformation. Ultrasonic energy is applied from the ultrasonic horn to create a weld nugget between the first and second workpieces. The assembly thus formed has a green strength sufficient to be further processed immediately. The methods provide a robust weld joint with controlled adhesive bondline thickness.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: May 23, 2023
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Pei-chung Wang, Bradley J. Blaski
  • Publication number: 20230153255
    Abstract: A method of data synchronization is to be implemented by a redundant server system including an active input/output module (IOM) and a passive IOM. The method includes: allocating a primary transfer buffer in the active IOM; allocating a secondary transfer buffer in the passive IOM; collecting pieces of secondary dedicated-sensor data, and storing the pieces of secondary dedicated-sensor data in the primary transfer buffer at once; collecting pieces of primary dedicated-sensor data; after the pieces of primary dedicated-sensor data have been collected, updating the primary state data based on the pieces of primary dedicated-sensor data thus collected and the pieces of secondary dedicated-sensor data stored in the primary transfer buffer at once, and storing the primary state data thus updated in the secondary transfer buffer; and updating the secondary state data based on the primary state data that have been updated and that are stored in the secondary transfer buffer.
    Type: Application
    Filed: November 3, 2022
    Publication date: May 18, 2023
    Applicant: Mitac Computing Technology Corporation
    Inventors: Chin-Hung TAN, Heng-Chia HSU, Chien-Chung WANG, Yu-Shu YEH, Chen-Yin LIN
  • Patent number: 11651896
    Abstract: A capacitor structure is provided, which includes a contact layer, an insulating layer, a bottom conductive plate, a dielectric layer and a top conductive plate. The contact layer has first, second, third, fourth and fifth portions arranged from periphery to center. The insulating layer is disposed over the contact layer and has an opening exposing the contact layer. The bottom conductive plate is disposed in the opening and including first, second and third portions extending along a depth direction of the opening and separated from each other and in contact with the first, third and fifth portions of the contact layer, respectively. The dielectric layer is conformally disposed on the bottom conductive plate and in contact with the second and fourth portions of the contact layer. The top conductive plate is disposed on the dielectric layer. A method of manufacturing the capacitor is also provided.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: May 16, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chien-Chung Wang, Hsih-Yang Chiu
  • Publication number: 20230144389
    Abstract: An artificial intelligence (AI)-based constrained random verification (CRV) method for a design under test (DUT) includes: receiving a series of constraints; obtaining a limited constraint range according to the series of constraints; generating a series of stimuli according to the limited constraint range; and verifying the DUT by the series of stimuli; wherein at least one of the step of obtaining the limited constraint range according to the series of constraints and the step of generating the series of stimuli according to the limited constraint range employs an AI algorithm.
    Type: Application
    Filed: October 19, 2022
    Publication date: May 11, 2023
    Applicant: MEDIATEK INC.
    Inventors: Chung-An Wang, Chiao-Hua Tseng, Chia-Cheng Tsai, Tung-Yu Lee, Yen-Her Chen, Chien-Hsin Yeh, Chia-Shun Yeh, Chin-Tang Lai
  • Patent number: 11645148
    Abstract: A system and method for caching memory request verification data comprising a memory request generator configured to generate a memory request designating requested data and memory request verification data. A bus is configured to carry the memory request from the memory request generator to a cache memory that stores verification data, and upon receiving the memory request is configured to: retrieve stored verification data from the cache memory, compare the stored verification data to the memory request verification data, and responsive to a match between the stored verification data to the memory request verification data, designate a memory request validation. Also part of the system is a memory controller configured to, responsive to a memory request validation, retrieve data specified in the memory request from a main memory and provide the data to the memory request generator over the bus. A main memory configured to store the requested data.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: May 9, 2023
    Assignee: FLC Technology Group, Inc.
    Inventors: Xiaojue Zeng, Cheng Chung Wang, Fan Yang, Rong Xu, Bo Hu, Hunglin Hsu, Sehat Sutardja
  • Patent number: 11633813
    Abstract: A weld system includes: a robot control module configured to actuate a robot and move a welder along a joint of metal workpieces during welding, the welder being attached to the robot; a weld control module configured to, during the welding, apply power to the welder, supply a shield gas, and supply electrode material; a vision sensor configured to, during the welding, optically measure distances between the vision sensor and locations, respectively, on an outer surface of a weld bead created along the joint by the welder; and a weld module configured to: determine a strength of the weld bead at a location based on: the distances at the location along the joint; and at least one parameter from at least one of the robot control module during the welding, the weld control module during the welding, and a sensor configured to capture data of the welding during the welding.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: April 25, 2023
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Pei-chung Wang, Spyros P. Mellas, Debejyo Chakraborty, James Michael Ward, Diana M. Wegner
  • Publication number: 20230113919
    Abstract: Provided by the present invention is a current overload protection apparatus. The apparatus comprises a current measuring device and a control module; the current measuring device is used to measure a current value on a current path; the control module is electrically connected to the current measuring device, and stores current threshold data; the current threshold data comprises a plurality of time intervals respectively corresponding to disconnection threshold values; the earlier the time corresponding to a plurality of time intervals, the larger the disconnection threshold value corresponding thereto; and the control module is used to receive and collect current signals within a specified time length so as to calculate the current value of the current path, and determine whether the current value is greater than or equal to the disconnection threshold values, and if so, then an overload protection step is performed to protect the load from current overload.
    Type: Application
    Filed: March 4, 2021
    Publication date: April 13, 2023
    Applicant: TEAM YOUNG TECHNOLOGY CO., LTD.
    Inventors: I-Tung Kuo, Ching-Peng Hsiao, Cheng-Chung Wang
  • Patent number: 11626510
    Abstract: A method includes forming a first fin and a second fin over a substrate. The method includes forming a first dummy gate structure that straddles the first fin and the second fin. The first dummy gate structure includes a first dummy gate dielectric and a first dummy gate disposed over the first dummy gate dielectric. The method includes replacing a portion of the first dummy gate with a gate isolation structure. The portion of the first dummy gate is disposed over the second fin. The method includes removing the first dummy gate. The method includes removing a first portion of the first dummy gate dielectric around the first fin, while leaving a second portion of the first dummy gate dielectric around the second fin intact. The method includes forming a gate feature straddling the first fin and the second fin, wherein the gate isolation structure intersects the gate feature.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: April 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Shu-Uei Jang, Ya-Yi Tsai, Chi-Hsiang Chang, Tzu-Chung Wang, Shu-Yuan Ku
  • Patent number: 11616173
    Abstract: A light emitting diode (LED) package includes a substrate, at least one micro LED chip, a black material layer, and a transparent material layer. The substrate has a width ranging from 100 micrometers to 1000 micrometers. The at least one micro LED chip is electrically mounted on a top surface of the substrate and has a width ranging from 1 micrometer to 100 micrometers. The black material layer covers the top surface of the substrate to expose the at least one micro LED chip. The transparent material layer covers the at least one micro LED chip and the black material layer.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 28, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Te-Chung Wang, Shiou-Yi Kuo
  • Patent number: 11605562
    Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes a plurality of fins on a substrate. A fin end spacer is formed on an end surface of each of the plurality of fins. An insulating layer is formed on the plurality of fins. A source/drain epitaxial layer is formed in a source/drain space in each of the plurality of fins. A gate electrode layer is formed on the insulating layer and wrapping around the each channel region. Sidewall spacers are formed on the gate electrode layer.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tung Ying Lee, Tzu-Chung Wang, Kai-Tai Chang, Wei-Sheng Yun
  • Patent number: 11600718
    Abstract: A semiconductor device and method of fabricating a semiconductor device involves formation of a trench above a fin (e.g. a fin of a FinFET device) of the semiconductor device and formation of a multi-layer dielectric structure within the trench. The profile of the multi-layer dielectric structure can be controlled depending on the application to reduce shadowing effects and reduce cut failure risk, among other possible benefits. The multi-layer dielectric structure can include two layers, three layers, or any number of layers and can have a stepped profile, a linear profile, or any other type of profile.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Ya-Yi Tsai, Chi-Hsiang Chang, Shih-Yao Lin, Tzu-Chung Wang, Shu-Yuan Ku
  • Publication number: 20230069582
    Abstract: The present application provides a temperature control method, an apparatus, an electronic device and a storage medium for an etching workbench. A real-time temperature of an etching workbench and a real-time temperature of a temperature control fluid are acquired firstly; then, a temperature control instruction is determined according to the real-time temperature of the etching workbench, the real-time temperature of the temperature control fluid and a limit temperature; and finally, in response to the temperature control instruction, a target operating temperature of the etching workbench is stabilized within a preset range by a circulating temperature control fluid loop.
    Type: Application
    Filed: June 7, 2021
    Publication date: March 2, 2023
    Inventors: Yong FANG, Chien Chung WANG
  • Publication number: 20230061312
    Abstract: A method for preparing a semiconductor device includes providing an integrated circuit die having a bond pad. The bond pad includes aluminum (Al). The method also includes etching a top portion of the bond pad to form a recess, and bonding a wire bond to the recess in the bond pad. The wire bond includes copper (Cu).
    Type: Application
    Filed: September 2, 2021
    Publication date: March 2, 2023
    Inventors: WEI-ZHONG LI, YI-TING SHIH, CHIEN-CHUNG WANG, HSIH-YANG CHIU
  • Patent number: D987634
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: May 30, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: James Siminoff, Mark D. Siminoff, Wen-Yo Lu, Christopher Loew, Jia Li, Wei-Chung Wang, Gregory Berlin, Andrew Louis Russell, Curtis Rowe