Abstract: A method includes forming a first conductive feature on a substrate, forming a via that contacts the first conductive feature, the via comprising a conductive material, performing a Chemical Mechanical Polishing (CMP) process to a top surface of the via, depositing an Interlayer Dielectric (ILD) layer on the via, forming a trench within the ILD layer to expose the via, and filling the trench with a second conductive feature that contacts the via, the second conductive feature comprising a same material as the conductive material.

Abstract: A structure with a capacitor and a fin transistor includes a substrate. The substrate includes a capacitor region and a fin transistor region. A mesa is disposed within the capacitor region of the substrate. The mesa protrudes from a surface of the substrate. The mesa includes a top surface and two sloping surfaces. Each of the sloping surfaces connects to the top surface of the mesa and the surface of the substrate. A doping region is disposed within the mesa. A capacitor electrode is only disposed on the top surface. A capacitor dielectric layer is disposed between the capacitor electrode and the doping region.

Abstract: An optical beam splitter includes a multi-stage nested network of waveguide bifurcation branches, which includes: first-stage waveguide bifurcation branches each including a pair of first-stage waveguide segments, and second-stage waveguide bifurcation branches each including a pair of second-stage waveguide segments. Each pair of first-stage waveguide segments includes a first common end and a pair of first split ends and a pair of first interconnection portions. Each first common end points toward a first widthwise direction. Each pair of second-stage waveguide segments includes a second common end and a pair of second split ends and a pair of second interconnection portions. Each second common end and each second split end of the optical beam splitter point toward a second widthwise direction which is an opposite direction of the first widthwise direction.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing forming a first metal-insulator-metal (MIM) capacitor over a substrate and forming a second MIM capacitor over the first MIM capacitor. The forming of the first MIM capacitor includes forming a first conductor plate over a substrate, the first conductor plate comprising a first metal element, conformally depositing a first dielectric layer on the first conductor plate, the first dielectric layer comprising the first metal element, forming a first high-K dielectric layer on the first dielectric layer, conformally depositing a second dielectric layer on the first high-K dielectric layer, the second dielectric layer comprising a second metal element, and forming a second conductor plate over the second dielectric layer, the second conductor plate comprises the second metal element.

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.

Abstract: In one example in accordance with the present disclosure, an example computing device is disclosed. The example computing device includes a housing. The example computing device also includes a rotatable antenna disposed within the housing. The rotatable antenna is to rotate such that a direction of radiation is maintained in a single direction as the housing is to rotate.

Abstract: A power management integrated circuit (PMIC) soldered onto a printed circuit board, includes: a first output stage circuit and a second output stage circuit. In a separate power supply configuration, first and second current inflow pins of the first and second output stage circuits are soldered to first and second current inflow printed lines, respectively, wherein the first and second current inflow printed lines are not directly electrically connected to each other; and, first and second current outflow pins of the first and second output stage circuits are soldered to first and second current outflow printed lines respectively, wherein the first and second current outflow printed lines are not directly electrically connected to each other. In a cooperation power supply configuration, the first and second current inflow pins are both soldered to a common current inflow printed line of the PCB, to be electrically connected with each other.

Abstract: A neutron capture therapy system and a target material for a particle beam generation apparatus, the heat dissipation performance of a target material might be improved. A neutron capture therapy system includes a neutron generation apparatus and a beam shaping body, the neutron generation apparatus includes an accelerator and a target material, and a charged particle beam generated by means of acceleration of the accelerator acts with the target material to generate a neutron beam. The target material includes an active layer, an anti-foaming layer, a heat dissipation layer and a heat conduction layer, the active layer acts with a charged particle beam to generate a neutron beam; the anti-foaming layer suppresses foaming caused by the charged particle beam; the heat dissipation layer directly and rapidly conducts to the heat conduction layer, heat deposited on the active layer, and discharges by means of a cooling medium.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, and a first electrically conductive structure. The semiconductor substrate has a planar device region and a fin device region. The semiconductor substrate includes a mesa structure disposed in the planar device region and fin-shaped structures disposed in the fin device region. The isolation structure is disposed on the semiconductor substrate and includes a first portion which is disposed on the planar device region and covers a sidewall of the mesa structure, and the isolation structure further includes a second portion which is disposed on the fin device region and located between the fin-shaped structures. The first electrically conductive structure is disposed on the planar device region. The first electrically conductive structure is partly disposed above the mesa structure in a vertical direction and partly disposed above the first portion of the isolation structure in the vertical direction.

Abstract: A semiconductor device according to the present disclosure includes a semiconductor layer, a plurality of metal isolation features disposed in the semiconductor layer, wherein certain of the metal isolation features extend through the substrate to provide for full isolation between adjacent photodetectors and certain of the metal isolation features extend partially through the semiconductor layer to provide partially isolation between adjacent photodetectors.

Abstract: An optical biometer includes a light-source module, a light-splitting module, a reference-arm, a sensing-arm and a sensing module. The light-source module emits incident-light. The light-splitting module, disposed corresponding to light-source module, divides the incident-light into reference light and sensing light. The reference-arm, disposed corresponding to light-splitting module, generates a first reflected-light according to the reference light. The sensing-arm, disposed corresponding to the light-splitting module, emits the sensing light to the eye and receives a second reflected-light from the eye. The sensing module generates a sensing result according to the first reflected-light and second reflected-light. In a first mode, the sensing light is emitted to a first position of the eye. In a second mode, the sensing light is emitted to a second position of the eye.

Abstract: A semiconductor structure has a frontside and a backside. The semiconductor structure includes an isolation structure at the backside; one or more transistors at the frontside, wherein the one or more transistors have source/drain epitaxial features; two metal plugs through the isolation structure and contacting two of the source/drain electrodes from the backside; and a dielectric liner filling a space between the two metal plugs, wherein the dielectric liner partially or fully surrounds an air gap between the two metal plugs.

Abstract: A laser slicing apparatus, in which a laser module provides a laser beam, and a light splitting element of a focusing lens set splits the laser beam into a plurality of focused laser beams to form a plurality of induce lines having first laser modified cracks in a modified layer at a predetermined depth inside a substrate. A rotating module rotates the light splitting element with an angle, and the light splitting element converts the focused laser beams according to this angle to form a plurality of modified groups between the induce lines. Each modified group includes a plurality of modified lines having second laser modified cracks, and the first laser modified cracks and the second laser modified cracks are connected to each other to form a continuous laser modified crack in the modified layer at the predetermined depth inside the substrate, thereby speeding up the laser slicing production.

Abstract: A device includes an active region, a gate structure, a source/drain epitaxial structure, an epitaxial layer, a metal alloy layer, a contact, and a contact etch stop layer. The gate structure is across the active region. The source/drain epitaxial structure is over the active region and adjacent the gate structure. The epitaxial layer is over the source/drain epitaxial structure. The metal alloy layer is over the epitaxial layer. The contact is over the metal alloy layer. The contact etch stop layer lines sidewalls of the source/drain epitaxial structure. The metal alloy layer is spaced apart from the contact etch stop layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a plurality of channel layers stacked over a semiconductor substrate and spaced apart from one another, a source/drain structure adjoining the plurality of channel layers, a gate structure wrapping around the plurality of channel layers, and a first inner spacer between the gate structure and the source/drain structure and between the plurality of channel layers. The first inner spacer is made of an oxide of a semiconductor material.

Abstract: A semiconductor structure includes a source/drain feature in the semiconductor layer. The semiconductor structure includes a dielectric layer over the source/drain feature. The semiconductor structure includes a silicide layer over the source/drain feature. The semiconductor structure includes a barrier layer over the silicide layer. The semiconductor structure includes a seed layer over the barrier layer. The semiconductor structure includes a metal layer between a sidewall of the seed layer and a sidewall of the dielectric layer, a sidewall of each of the silicide layer, the barrier layer, and the metal layer directly contacting the sidewall of the dielectric layer. The semiconductor structure includes a source/drain contact over the seed layer.

Abstract: A method of manufacturing a transistor structure includes forming a plurality of trenches in a substrate, lining the plurality of trenches with a dielectric material, forming first and second substrate regions at opposite sides of the plurality of trenches, and filling the plurality of trenches with a conductive material. The plurality of trenches includes first and second trenches aligned between the first and second substrate regions, and filling the plurality of trenches with the conductive material includes the conductive material extending continuously between the first and second trenches.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate and a backplate, the substrate has an opening portion, and the backplate is disposed on one side of the substrate and has acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate, and the diaphragm extends across the opening portion of the substrate and includes outer ventilation holes and inner ventilation holes arranged in a concentric manner. The outer ventilation holes and the inner ventilation holes are relatively arranged in a ring shape and surround the center of the diaphragm. The MEMS structure further includes a pillar disposed between the backplate and the diaphragm. The pillar prevents the diaphragm from being electrically connected to the backplate.

Abstract: A MEMS structure is provided. The MEMS structure includes a substrate having an opening portion and a backplate disposed on one side of the substrate. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate. The opening portion of the substrate is under the diaphragm, and an air gap is formed between the diaphragm and the backplate. The MEMS structure further includes a pillar structure connected with the backplate and the diaphragm and a protection post structure extending from the backplate into the air gap. From a top view of the backplate, the protection post structure surrounds the pillar structure.