Abstract: Disclosed herein are devices, systems, and methods for selectively configuring an optical coupling network between a modem and optical head to calibrate the timing delay of the entire receive path and entire transmit path. The device includes a modem with a transmit and receive path and an optical head with an optical transmit path, an optical receive path, and a calibration path. The device includes an optical coupling network for selectively routing signals (i) through a first loopback path comprising the transmit path and the receive path; (ii) through a second loopback path comprising the transmit path, the optical transmit path, the optical receive path, and the receive path; (iii) through a third loopback path comprising the transmit path, twice the calibration path, and the receive path; and (iv) through a fourth loopback path comprising the transmit path, the calibration path, the optical receive path, and the receive path.

Abstract: Embodiments disclosed herein include photonics systems with a dual polarization module. In an embodiment, a photonics patch comprises a patch substrate, and a photonics die over a first surface of the patch substrate. In an embodiment, a multiplexer is over a second surface of the patch substrate. In an embodiment, a first optical path from the photonics die to the multiplexer is provided for propagating a first optical signal, and a second optical path from the photonics die to the multiplexer is provided for propagating a second optical signal. In an embodiment, a Faraday rotator is provided along the second optical path to convert the second optical signal from a first mode to a second mode before reaching the multiplexer.

Abstract: An adaptive equalization and phase recovery circuit includes a weight adaptation circuit and a filtering circuit. The weight adaptation circuit is to decode phase estimation information generated during a carrier phase recovery for an input digital signal, generate a plurality of weights based on the phase estimation information, and perform weight adaptation to modify at least one of the plurality of weights based on a polarization of the input digital signal to obtain a modified plurality of weights. The filtering circuit is to apply the modified plurality of weights to the input digital signal to generate an equalized digital signal. The weight adaptation circuit and the filter circuit are reconfigurable for a plurality of communication standards and waveforms.

Abstract: Systems, methods, and circuitry for determining a delay through a modem of a transceiver are provided. An integrated circuit system may include a transmit signal path, delay calibration circuitry, and a phase detector. The delay calibration circuitry may allow determination of a delay through a transmit signal path between a calibration sequence signal source and an output of the transmit signal path. The transmit signal path may include a number of processing stages having a possible delay variation under different conditions.

Abstract: Embodiments disclosed herein include photonics systems with a dual polarization module. In an embodiment, a photonics patch comprises a patch substrate, and a photonics die over a first surface of the patch substrate. In an embodiment, a multiplexer is over a second surface of the patch substrate. In an embodiment, a first optical path from the photonics die to the multiplexer is provided for propagating a first optical signal, and a second optical path from the photonics die to the multiplexer is provided for propagating a second optical signal. In an embodiment, a Faraday rotator is provided along the second optical path to convert the second optical signal from a first mode to a second mode before reaching the multiplexer.

Abstract: An optical receiver implements a method to provide a digital output of a received on-off keyed optical signal. The method includes receiving an on-off keyed optical signal via a coherent optical front-end receiver utilizing a locally mixed laser LO for a reference signal to perform quadrature detection of the optical signal to generate an electrical signal, performing symbol/slot timing recovery on the electrical signal using a timing error detector, performing carrier frequency and phase recovery on a symbol/slot signal to generate a frequency and phase recovered signal, and demodulating the frequency and phase recovered signal via a demodulation circuit to provide a digital output representative of the received on-off keyed optical signal.

Abstract: A system includes a first chiplet that includes at least one demodulator for demodulating at least one received signal from a receiver to generate hard bits and soft information from the received signal and a second chiplet coupled to exchange information with the first chiplet. The second chiplet includes at least one correlator to detect a symbol pattern indicating frame boundaries of frames having a known frame symbol period length in an acquisition state and transitioning the first and second chiplets to a connected state in response to a threshold number of successful frame boundary detections. The at least one correlator uses soft bit representations to correlate and deduce the frame boundaries in a windowed mode using the known frame length and previous frame boundary information while in the connected state and transitions the first and second chiplets out of the connected state and back to the acquisition state in response to at least one unsuccessful frame boundary detection.

Abstract: A self-calibrating transceiver includes a set of digital to analog converters configured to process a comb calibration waveform, at least one IQ modulator configured to generate at least one optical signal comprising I and Q components operably coupled from the set of digital to analog converters. A receiver photonics circuit is configured to convert the coupled optical signals to electrical signals. The receiver photonics circuit includes a set of analog to digital converters coupled to convert the electrical signals to digital signals representative of the comb calibration waveform in cartesian IQ format. Processing circuitry is coupled to determine at least magnitude and/or phase of the digital signals and generate filter coefficients based on a comparison of at least magnitude and/or phase to the comb calibration waveform.

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a dual polarization chiplet that may be used by an optical receiver to split multi-polarized light traveling on a single fiber and carrying two or more light signals into two or more fibers each carrying the particular light signal. The dual polarization chiplet may also be used by an optical transmitter to combine multiple light signals to be transmitted onto a single fiber, where each of the multiple light signals are represented by a different polarization of a wavelength on the single fiber. Other embodiments may be described and/or claimed.

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a bidirectional optical grating coupler that may be used for testing. A photonic apparatus includes a first layer with electro-optical circuitry that is optically coupled with a bidirectional optical grating coupler. A second layer is physically coupled with a first side of the first layer and includes a first light path to optically coupled with the bidirectional optical grating coupler. A third layer is physically coupled with a second side of the first layer opposite the first side of the first layer, and includes a second light path that optically couples with the bidirectional grating coupler. Operational testing of the electro-optical circuitry is based in part on light received or transmitted through the second light path. Other embodiments may be described and/or claimed.

Abstract: An apparatus can include transceiver circuitry to receive an input signal from a target apparatus. The apparatus can further include a processing circuitry to determine position information of a source object and a target object. Based on the position information, the processing circuitry can calculate a relative velocity and determine a Doppler shift or carrier frequency offset in the input signal based on the relative velocity. The processing circuitry can adjust a local oscillator frequency based on a Doppler measured using the position information in an initial link acquisition phase. The processing circuitry can track the Doppler continuously over a range of tens of gigahertz accounting for Doppler phase ambiguities, and correct for a tracked Doppler shift by partially adjusting a local oscillator frequency and by correcting a residual Doppler shift digitally.

Abstract: A clock data recovery (CDR) apparatus can include an interpolator circuitry to interpolate an input received signal and to generate an output signal removing the sampling clock offsets. The apparatus can include timing error detector (TED) circuitry coupled to process the output signal and to provide a timing error as feedback to the interpolator circuitry, the timing error being adjusted by gain factors used in at least one of an automatic gain control (AGC) circuitry and an orthogonalization circuitry. The apparatus can include loop filter (LF) circuitry to filter the timing error to remove noise effects. The apparatus can include numerically controlled oscillator (NCO) circuitry to adjust for a basepoint and fractional interval used to adjust resampling coefficients within the interpolator circuitry.

Abstract: A method for calibrating an optical transceiver. The method can include configuring optical switches to enable routing at least one output signal of modulator circuitry operably coupled to a first receive path of a coherent optical transceiver. The method can include configuring the input to at least one modulator to generate at least one first stimulus signal. The method can include configuring a path from the first receiver analog-to-digital converter to an adaptive algorithm circuitry. The method can include adapting at least one bias setting of a photodiode associated with the first receiver in response to at least one first stimulus detected at the first receiver analog-to-digital converter to an adaptive algorithm circuitry. The method can include determining an optimum value of a photodiode associated with the first receiver.

Abstract: An apparatus can include transceiver circuitry to receive an input signal from a target apparatus. The apparatus can further include a processing circuitry to determine position information of a source object and a target object. Based on the position information, the processing circuitry can calculate a relative velocity and determine a Doppler shift or carrier frequency offset in the input signal based on the relative velocity. The processing circuitry can adjust a local oscillator frequency based on a Doppler measured using the position information in an initial link acquisition phase. The processing circuitry can track the Doppler continuously over a range of tens of gigahertz accounting for Doppler phase ambiguities, and correct for a tracked Doppler shift by partially adjusting a local oscillator frequency and by correcting a residual Doppler shift digitally.

Abstract: An apparatus can include at least two circuit portions having separate power sequencer circuitry. The apparatus can further include processing circuitry configured to control at least one portion of the at least two circuit portions to operate at an initial low power level and subsequent higher power levels to full operation.

Abstract: An integrated circuit (IC) package comprising an optical die comprising a configurable optical switch. The configurable optical switch comprises an optical switch operably coupled to one or more optical transceivers. An optical connector comprises at least one exo-package optical port. The at least one exo-package optical port is operably coupled to the configurable optical switch. The configurable optical switch is to pass an optical signal on the at least one of the one or more exo-package ports to at least one of the one or more optical transceivers, and an IC die comprising electronic circuitry is operably coupled to the one or more optical transceivers.

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a dual polarization chiplet that may be used by an optical receiver to split multi-polarized light traveling on a single fiber and carrying two or more light signals into two or more fibers each carrying the particular light signal. The dual polarization chiplet may also be used by an optical transmitter to combine multiple light signals to be transmitted onto a single fiber, where each of the multiple light signals are represented by a different polarization of a wavelength on the single fiber. Other embodiments may be described and/or claimed.

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to a bidirectional optical grating coupler that may be used for testing. A photonic apparatus includes a first layer with electro-optical circuitry that is optically coupled with a bidirectional optical grating coupler. A second layer is physically coupled with a first side of the first layer and includes a first light path to optically coupled with the bidirectional optical grating coupler. A third layer is physically coupled with a second side of the first layer opposite the first side of the first layer, and includes a second light path that optically couples with the bidirectional grating coupler. Operational testing of the electro-optical circuitry is based in part on light received or transmitted through the second light path. Other embodiments may be described and/or claimed.

Abstract: Embodiments disclosed herein include photonics systems with a dual polarization module. In an embodiment, a photonics patch comprises a patch substrate, and a photonics die over a first surface of the patch substrate. In an embodiment, a multiplexer is over a second surface of the patch substrate. In an embodiment, a first optical path from the photonics die to the multiplexer is provided for propagating a first optical signal, and a second optical path from the photonics die to the multiplexer is provided for propagating a second optical signal. In an embodiment, a Faraday rotator is provided along the second optical path to convert the second optical signal from a first mode to a second mode before reaching the multiplexer.

Abstract: Embodiments herein relate to systems, apparatuses, or techniques for using an optical physical layer die within a system-on-a-chip to optically couple with an optical physical layer die on another package to provide high-bandwidth memory access between the system-on-a-chip and the other package. In embodiments, the other package may be a large optically connected memory device that includes a memory controller coupled with an optical physical layer die, where the memory controller is coupled with memory. Other embodiments may be described and/or claimed.