Patents by Inventor Cyril Guyot

Cyril Guyot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9652199
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: May 16, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dejan Vucinic, Zvonimir Z. Bandic, Qingbo Wang, Cyril Guyot, Robert Mateescu, Frank R. Chu
  • Publication number: 20170093425
    Abstract: Techniques for generating parities and repairing data erasures using repair-optimal parities are disclosed. The system includes an encoding module, which receives a request to recreate data for a subset of a plurality of content stores. The encoding module generates a new first parity and a new second parity using a subset of remaining content from the plurality of content stores. The encoding module generates a first portion of the requested data using the new first parity and a first subset of an original first parity for the plurality of content stores and a second portion of the requested data using the new second parity and a second subset of an original second parity for the plurality of content stores. The encoding module may recreate the data for the content store using the first portion of the requested data and the second portion of requested data.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Robert Mateescu, Lluis Pamies-Juarez, Cyril Guyot
  • Publication number: 20170093426
    Abstract: Techniques for generating parities and repairing data erasures using a cache oblivious encoding algorithm are disclosed. The system includes an encoding module which receives a request to recreate data for a subset of a plurality of content stores from a storage manager. The encoding module generates a new first parity and a new second parity using the remaining content in the plurality of content stores. The encoding module generates a first portion of the requested data using the new first parity and a first parity for the plurality of content stores and a second portion of the requested data using the new second parity and a second parity for the plurality of content stores. The encoding module may recreate the data for the plurality of content stores using the first portion of the requested data and the second portion of the requested data.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Cyril Guyot, Robert Mateescu, Lluis Pamies-Juarez, Filip Blagojevic
  • Patent number: 9563367
    Abstract: The present disclosure relates to methods, apparatuses, systems, and computer program products for processing commands for accessing solid state drives. Example methods can include receiving, from a host, a loaded command availability message. The loaded command availability message can indicate that a command associated with the loaded command availability message uses a low latency mode. The methods can further include executing the associated command.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: February 7, 2017
    Assignee: HGST Netherlands B.V.
    Inventors: Frank Chu, Zvonimir Z. Bandic, Dejan Vucinic, Cyril Guyot, Qingbo Wang
  • Publication number: 20170017405
    Abstract: Techniques for improving flash-oriented file system garbage collection are disclosed. In some embodiments, the techniques may be realized as a method for improving garbage collection of a flash-oriented file system comprising classifying data according to a first data type area of a plurality of data type areas, creating, using a host device subsystem, a log for a physical erase block of the flash memory, creating, using the host device subsystem, the plurality of data type areas for the log, and writing the data to the first data type area of the plurality of data type areas based on the classification of the data.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 19, 2017
    Applicant: HGST Netherlands B.V.
    Inventors: Vyacheslav Anatolyevich DUBEYKO, Cyril GUYOT
  • Publication number: 20170017406
    Abstract: Techniques for improving flash-oriented file system garbage collection are disclosed. In some embodiments, the techniques may be realized as a method for improving garbage collection of a flash-oriented file system comprising classifying data according to a first data type area of a plurality of data type areas, creating, using a host device subsystem, a log for a physical erase block of the flash memory, creating, using the host device subsystem, the plurality of data type areas for the log, and writing the data to the first data type area of the plurality of data type areas based on the classification of the data.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 19, 2017
    Applicant: HGST Netherlands B.V.
    Inventors: Vyacheslav Anatolyevich DUBEYKO, Cyril GUYOT
  • Patent number: 9547472
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: January 17, 2017
    Assignee: HGST Netherlands B.V.
    Inventors: Dejan Vucinic, Cyril Guyot, Robert Mateescu, Qingbo Wang, Zvonimir Z. Bandic, Frank R. Chu
  • Patent number: 9535870
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: January 3, 2017
    Assignee: HGST Netherlands B.V.
    Inventors: Dejan Vucinic, Cyril Guyot, Robert Mateescu
  • Patent number: 9513869
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: December 6, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Dejan Vucinic, Zvonimir Z. Bandic, Qingbo Wang, Cyril Guyot, Robert Mateescu, Frank R. Chu
  • Patent number: 9471227
    Abstract: A method, apparatus, and storage device are provided for implementing enhanced performance with read before write to phase-change-memory (PCM). Each write to PCM is preceded by a read to avoid write cancellations with urgent reads from nearby locations. For every write, a large block of data is read from PCM, such as an entire partition, prior to the write in PCM. The cache copy of the large block of data is kept in a controller for the duration of write. A read request from the pre-fetched region is provided from the cached copy thereby preventing read interrupt during write operation.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: October 18, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Cyril Guyot, Robert Eugeniu Mateescu, Dejan Vucinic
  • Publication number: 20160246712
    Abstract: Methods and systems for implementing indirection data structures as reconfigurable hardware are provided. The controller can configure a logic circuit to execute a first function, receive a first command from a host comprising a request for data from a logical address, and execute the first command by accessing the memory at a first physical address. The controller can also re-configure the logic circuit to execute a second function, receive a second command comprising a request for data from the logical address, and execute the second command by accessing the memory at the second physical address. The logic circuit can also generate the first physical address corresponding to the logical address, in response to the first command, by executing the first function and generate the second physical address corresponding to the logical address, in response to the second command, by executing the second function.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: Dejan VUCINIC, Zvonimir Z. BANDIC, Filip BLAGOJEVIC, Cyril GUYOT, Robert MATEESCU, Qingbo WANG
  • Publication number: 20160224610
    Abstract: An approach for fingerprinting large data objects at the wire speed has been disclosed. The techniques include Fresh/Shift pipelining, split Fresh, optimization, online channel sampling, and pipelined selection. The architecture can also be replicated to work in parallel for higher system throughput. Fingerprinting may provide an efficient mechanism for identifying duplication in a data stream, and deduplication based on the identified fingerprints may provide reduced storage costs, reduced network bandwidth consumption, reduced processing time and other benefits. In some embodiments, fingerprinting may be used to ensure or verify data integrity and may facilitate detection of corruption or tampering. An efficient manner of generating fingerprints (either via hardware, software, or a combination) may reduce a computation load and/or time required to generate fingerprints.
    Type: Application
    Filed: August 25, 2015
    Publication date: August 4, 2016
    Inventors: Cyril Guyot, Dongyang Li, Qingbo Wang, Ken Yang
  • Publication number: 20160224595
    Abstract: An approach for fingerprinting large data objects at the wire speed has been disclosed. The techniques include Fresh/Shift pipelining, split Fresh, optimization, online channel sampling, and pipelined selection. The architecture can also be replicated to work in parallel for higher system throughput. Fingerprinting may provide an efficient mechanism for identifying duplication in a data stream, and deduplication based on the identified fingerprints may provide reduced storage costs, reduced network bandwidth consumption, reduced processing time and other benefits. In some embodiments, fingerprinting may be used to ensure or verify data integrity and may facilitate detection of corruption or tampering. An efficient manner of generating fingerprints (either via hardware, software, or a combination) may reduce a computation load and/or time required to generate fingerprints.
    Type: Application
    Filed: August 25, 2015
    Publication date: August 4, 2016
    Inventors: Zvonimir Bandic, Cyril Guyot, Dongyang Li, Ashwin Narasimha, Qingbo Wang, Ken Yang
  • Publication number: 20160224260
    Abstract: A method may include writing data to a hard drive. In some examples, the method may include receiving, by an extent allocator module, a command to write data. The command may include data and a logical block address (LBA) specified by the host. The method may also include mapping, by the extent allocator module, the LBA specified by the host to a drive LBA. The method may further include sending, from the extent allocator module, a command to write the data at the drive LBA.
    Type: Application
    Filed: October 6, 2015
    Publication date: August 4, 2016
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Adam C. Manzanares, Noah Watkins
  • Patent number: 9367483
    Abstract: Systems, methods, and firmware for operating data storage devices and storage processors are provided herein. In one example, a data storage device is provided. The data storage device includes phase change media on which to write data, and a processing system configured to identify a write process to at least obfuscate an acoustic signature associated with writing the data on the phase change media and write the data to the phase change media in accordance with the write process.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: June 14, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Cyril Guyot, Dejan Vucinic, Luiz Franca-Neto
  • Patent number: 9323630
    Abstract: Systems, methods, and firmware for recovery of data from storage devices are provided herein. In one example, a data storage device is provided. The data storage device includes a storage portion and a cache portion which caches data intended for storage in the storage portion. Responsive to a recovery read command identifying requested data, the data storage device retrieves stored data corresponding to the requested data from the storage portion without retrieving cached data corresponding to the requested data from the cache portion that supersedes at least a portion of the stored data. Responsive to a cache block list command, the data storage device transfers a list identifying one or more cached blocks of the cached data. Responsive to a read command that identifies at least one cached block, the data storage device retrieves the at least one cached block.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: April 26, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Cyril Guyot, Zvonimir Bandic
  • Publication number: 20160098211
    Abstract: A method, apparatus, and storage device are provided for implementing enhanced performance with enhanced phase-change-memory (PCM) read latency through coding. A coding algorithm is used to write data to the PCM including a redundancy chip enabling recovery of inaccessible partition data by reading other partitions. A read operation is served by reading parity lines and computing data for the read operation from a blocked written-to partition.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Zvonimir Z. Bandic, Cyril Guyot, Eun Jee Lee, Robert Eugeniu Mateescu, Dejan Vucinic
  • Publication number: 20160062669
    Abstract: The present disclosure relates to methods, apparatuses, systems, and computer program products for processing commands for accessing solid state drives. Example methods can include receiving, from a host, a loaded command availability message. The loaded command availability message can indicate that a command associated with the loaded command availability message uses a low latency mode. The methods can further include executing the associated command.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 3, 2016
    Inventors: Frank CHU, Zvonimir Z. BANDIC, Dejan VUCINIC, Cyril GUYOT, Qingbo WANG
  • Patent number: 9274884
    Abstract: A data storage system includes a memory circuit that has memory cells and a control circuit that is operable to receive data bits provided for storage in the memory cells. The control circuit is operable to receive a first matrix. Each row of the first matrix corresponds to a unique one of the data bits. The control circuit is operable to generate a second matrix having only the rows of the first matrix that correspond to the data bits provided for storage in a subset of the memory cells having stuck-at faults. The control circuit is operable to generate a third matrix having linearly independent columns of the second matrix. The control circuit is operable to encode the data bits to generate encoded data bits and redundant bits using the third matrix.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: March 1, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Robert Eugeniu Mateescu, Luiz Franca-Neto, Cyril Guyot, Hessam Mahdavifar, Zvonimir Bandic, Qingbo Wang
  • Publication number: 20160018988
    Abstract: A method, apparatus, and storage device are provided for implementing enhanced performance with read before write to phase-change-memory (PCM). Each write to PCM is preceded by a read to avoid write cancellations with urgent reads from nearby locations. For every write, a large block of data is read from PCM, such as an entire partition, prior to the write in PCM. The cache copy of the large block of data is kept in a controller for the duration of write. A read request from the pre-fetched region is provided from the cached copy thereby preventing read interrupt during write operation.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 21, 2016
    Inventors: Cyril Guyot, Robert Eugeniu Mateescu, Dejan Vucinic