Patents by Inventor Daisuke Ikeno
Daisuke Ikeno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240098981Abstract: According to one embodiment, a semiconductor device includes a pillar of an oxide semiconductor material and a gate insulating layer that surrounds a side surface of the pillar. The gate insulating layer includes a lower portion, an upper portion, and an intermediate portion. A gate electrode surrounds the intermediate portion of the gate insulating layer. A lower electrode is provided that includes a first oxide conductor portion that is connected to a lower surface of the pillar. An upper electrode is provided connected to an upper surface of the pillar. The gate electrode includes a metal portion containing a metallic element and a first nitrogen-containing portion between the metal portion and the gate insulating layer. The first oxide conductor portion includes a second nitrogen-containing at an interface between the first oxide conductor portion and the gate insulating layer.Type: ApplicationFiled: August 29, 2023Publication date: March 21, 2024Inventors: Daichi NISHIKAWA, Daisuke IKENO, Atsuko SAKATA
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Publication number: 20240098997Abstract: A semiconductor device includes: a stacked film alternately including a plurality of electrode layers and a plurality of first insulating films; a charge storage layer provided on the side surfaces of the electrode layers via a second insulating film; and a semiconductor layer provided on the side surface of the charge storage layer via a third insulating film. At least one electrode layer of the plurality of electrode layers includes a first electrode layer which is an amorphous layer comprising a metal element and silicon.Type: ApplicationFiled: August 15, 2023Publication date: March 21, 2024Applicant: Kioxia CorporationInventors: Ryosuke UMINO, Daisuke IKENO
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Patent number: 11932770Abstract: A method for producing a resin sintered body 1 by applying an ink 3 to thermoplastic resin powder 2 and sintering the powder, the method including the step of immersing an intermediate resin sintered body 1m, which has an unevenly colored region on the surface thereof and the whole of which has been already sintered, in a surface treatment liquid containing sulfuric acid and chromic anhydride, in which the concentration of chromic anhydride is 300 g/L or more, for 5 minutes or longer. When producing a resin sintered body by sintering thermoplastic resin powder, the surface of the resin sintered body can be evenly and sufficiently colored to an extent required without an unevenly colored region on the surface thereof, and also the surface of the resin sintered body can have a good appearance and smoothness.Type: GrantFiled: March 14, 2022Date of Patent: March 19, 2024Assignees: SANKEI GIKEN KOGYO CO., LTD., HONDA MOTOR CO., LTD., SOLIZE CORPORATIONInventors: Daisuke Sato, Kazuo Igarashi, Hiroyuki Ikeno, Satoru Nishimoto, Takashi Inomata, Ryota Masuda, Kohei Mutai
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Publication number: 20240081073Abstract: A semiconductor device according to the present disclosure includes a first insulating film, a second insulating film, and a tungsten film provided between the first insulating film and the second insulating film, the tungsten film having a crystal particle, wherein a thickness T of the tungsten film in a first direction from the first insulating film toward the second insulating film and an average particle size APS of the crystal particle satisfy APS/T?2 is satisfied.Type: ApplicationFiled: September 1, 2023Publication date: March 7, 2024Applicant: Kioxia CorporationInventors: Ryosuke UMINO, Daisuke IKENO, Masayuki KITAMURA, Akihiro KAJITA
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Publication number: 20230413555Abstract: According to one embodiment, a semiconductor storage device includes a memory pillar extending in a first direction. The memory pillar includes a tunnel insulation film, a charge storage layer on the tunnel insulation film, and a first block insulation film on the charge storage layer. A conductor layer extends in a second direction intersecting the first direction to meet a portion of the memory pillar. The conductor layer includes a first layer comprising molybdenum and a second layer comprising tungsten. The first layer is between the memory pillar and the second layer in the second direction.Type: ApplicationFiled: March 2, 2023Publication date: December 21, 2023Inventors: Hiroki KITAYAMA, Tomotaka ARIGA, Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
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Publication number: 20230092843Abstract: According to one embodiment, a semiconductor device includes a tunnel insulating film, a charge trap film on the tunnel insulating film, and a block insulating film on the charge trap film. The charge trap film is between the tunnel insulating film and the block insulating film. A conductive film is on the block insulating film. The block insulating film is between the charge trap film and the conductive film. The conductive film includes a first metal film adjacent to the block insulating film and a second metal film on the first metal film. The first metal film is between the block insulating film and the second metal film. The first metal film has an interfacial roughness on a side facing the second metal film that is greater than an interfacial roughness on a side facing the block insulating film.Type: ApplicationFiled: February 25, 2022Publication date: March 23, 2023Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
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Patent number: 11605643Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate, a first insulating layer, a second insulating layer, the first insulating layer between the semiconductor substrate and the second insulating layer, a semiconductor layer between the first insulating layer and the second insulating layer, the semiconductor layer extending in a first direction parallel to a surface of the semiconductor substrate, a gate electrode layer extending in a direction perpendicular to the surface; a first insulating film between the semiconductor layer and the gate electrode layer, a second insulating film between the first insulating film and the gate electrode layer the second insulating film in contact with the first insulating layer and the second insulating layer, a polycrystalline silicon region between the first insulating film and the second insulating film; and a metal film between the polycrystalline silicon region and the second insulating film containing titanium and silicon.Type: GrantFiled: March 10, 2021Date of Patent: March 14, 2023Assignee: Kioxia CorporationInventors: Daisuke Ikeno, Akihiro Kajita
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Publication number: 20230046783Abstract: A semiconductor memory device includes a first insulating layer, a first conductive layer, a first pillar, a second pillar, and a second insulating layer. The first conductive layer contains tungsten. The first conductive layer includes a first sub conductive layer and a second sub conductive layer. The first pillar and the second pillar pass through the first insulating layer and the first conductive layer. The second insulating layer divides the first insulating layer and the first conductive layer. The first sub conductive layer is in contact with the second sub conductive layer and is provided between the second sub conductive layer and the first insulating layer. A fluorine concentration in the first sub conductive layer is lower than that in the second sub conductive layer.Type: ApplicationFiled: December 14, 2021Publication date: February 16, 2023Applicant: Kioxia CorporationInventors: Hiroki KITAYAMA, Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
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Publication number: 20220406710Abstract: A semiconductor device includes a conductive layer extending in a first direction, including a first surface, a second surface facing the first surface in a second direction intersecting the first direction, a third surface, and a fourth surface facing the third surface in a third direction intersecting the first direction and the second direction, and containing a first element which is at least one element of tungsten (W) or molybdenum (Mo); a first region disposed on a first surface side of the conductive layer, containing a second element which is at least one element of tungsten (W) or molybdenum (Mo), and a third element which is at least one element of sulfur (S), selenium (Se), or tellurium (Te), and including a first crystal; and a second region disposed on a second surface side of the conductive layer, containing the second element and the third element, and including a second crystal.Type: ApplicationFiled: February 28, 2022Publication date: December 22, 2022Applicant: Kioxia CorporationInventors: Tatsuya NOMURA, Daichi NISHIKAWA, Daisuke IKENO, Akihiro KAJITA
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Patent number: 11527478Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a conductor including tungsten (W) or molybdenum (Mo); a first film provided between the conductor and the semiconductor substrate and including titanium (Ti) and silicon (Si); an insulating layer surrounding the conductor; and a second film provided between the conductor and the insulating layer, surrounding the conductor, and including titanium (Ti) and nitrogen (N). A first distance between the semiconductor substrate and an end portion of the second film on a side opposite to the semiconductor substrate is smaller than a second distance between the semiconductor substrate and an end portion of the conductor on a side opposite to the semiconductor substrate.Type: GrantFiled: December 15, 2020Date of Patent: December 13, 2022Assignee: Kioxia CorporationInventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
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Publication number: 20220085051Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate, a first insulating layer, a second insulating layer, the first insulating layer between the semiconductor substrate and the second insulating layer, a semiconductor layer between the first insulating layer and the second insulating layer, the semiconductor layer extending in a first direction parallel to a surface of the semiconductor substrate, a gate electrode layer extending in a direction perpendicular to the surface; a first insulating film between the semiconductor layer and the gate electrode layer, a second insulating film between the first insulating film and the gate electrode layer the second insulating film in contact with the first insulating layer and the second insulating layer, a polycrystalline silicon region between the first insulating film and the second insulating film; and a metal film between the polycrystalline silicon region and the second insulating film containing titanium and silicon.Type: ApplicationFiled: March 10, 2021Publication date: March 17, 2022Applicant: Kioxia CorporationInventors: Daisuke IKENO, Akihiro KAJITA
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Patent number: 11227934Abstract: According to one embodiment, a semiconductor device includes a substrate, a plurality of insulating films and a plurality of electrode films provided alternately on the substrate. The semiconductor device further includes a first insulating film, a first charge storage film, a third insulating film, a second charge storage film, a second insulating film, and a first semiconductor film that are sequentially provided along at least one side surface of each of the electrode films. The first charge storage film includes either (i) molybdenum, or (ii) titanium and nitrogen, and the second charge storage film includes a semiconductor film.Type: GrantFiled: March 2, 2020Date of Patent: January 18, 2022Assignee: KIOXIA CORPORATIONInventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
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Publication number: 20210296238Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a conductor including tungsten (W) or molybdenum (Mo); a first film provided between the conductor and the semiconductor substrate and including titanium (Ti) and silicon (Si); an insulating layer surrounding the conductor; and a second film provided between the conductor and the insulating layer, surrounding the conductor, and including titanium (Ti) and nitrogen (N). A first distance between the semiconductor substrate and an end portion of the second film on a side opposite to the semiconductor substrate is smaller than a second distance between the semiconductor substrate and an end portion of the conductor on a side opposite to the semiconductor substrate.Type: ApplicationFiled: December 15, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
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Publication number: 20210083069Abstract: According to one embodiment, a semiconductor device includes a substrate, a plurality of insulating films and a plurality of electrode films provided alternately on the substrate. The semiconductor device further includes a first insulating film, a first charge storage film, a third insulating film, a second charge storage film, a second insulating film, and a first semiconductor film that are sequentially provided along at least one side surface of each of the electrode films. The first charge storage film includes either (i) molybdenum, or (ii) titanium and nitrogen, and the second charge storage film includes a semiconductor film.Type: ApplicationFiled: March 2, 2020Publication date: March 18, 2021Applicant: KIOXIA CORPORATIONInventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
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Patent number: 10833265Abstract: According to one embodiment, a storage device includes a first conductive layer, a second conductive layer, a resistance-variable layer, between the first conductive layer and the second conductive layer, that includes germanium, antimony, and tellurium, a first layer, between the resistance-variable layer and the first conductive layer, that includes carbon, a second layer, between the resistance-variable layer and the second conductive layer, that includes carbon, a third layer, between the resistance-variable layer and the first layer, that includes at least one of tungsten nitride or tungsten carbide, and a fourth layer, between the resistance-variable layer and the second layer, that includes at least one of tungsten nitride or tungsten carbide.Type: GrantFiled: August 29, 2019Date of Patent: November 10, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Daisuke Ikeno, Akihiro Kajita, Atsuko Sakata
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Publication number: 20200303641Abstract: According to one embodiment, a storage device includes a first conductive layer, a second conductive layer, a resistance-variable layer, between the first conductive layer and the second conductive layer, that includes germanium, antimony, and tellurium, a first layer, between the resistance-variable layer and the first conductive layer, that includes carbon, a second layer, between the resistance-variable layer and the second conductive layer, that includes carbon, a third layer, between the resistance-variable layer and the first layer, that includes at least one of tungsten nitride or tungsten carbide, and a fourth layer, between the resistance-variable layer and the second layer, that includes at least one of tungsten nitride or tungsten carbide.Type: ApplicationFiled: August 29, 2019Publication date: September 24, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Daisuke IKENO, Akihiro KAJITA, Atsuko SAKATA
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Publication number: 20200093915Abstract: The present invention provides a vaccine containing virus-like particles derived from virus particles having an envelope, in which a lipid-component content of the virus-like particles is reduced relative to a lipid-component content of the virus particles.Type: ApplicationFiled: November 18, 2019Publication date: March 26, 2020Applicant: KM Biologics Co., Ltd.Inventors: Kazuhiko Kimachi, Motoharu Abe, Kazuyuki Ikeda, Hiroto Onuma, Yukari Tsurudome, Daisuke Ikeno, Kiyoto Nishiyama, Tatsufumi Onchi, Yusuke Ooyama, Issay Asano, Ryoichi Kitano
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Patent number: 10566280Abstract: In one embodiment, a semiconductor device includes a first insulator. The device further includes a metal layer that includes a first metal layer provided on a surface of the first insulator, and a second metal layer provided on a surface of the first metal layer and containing a first metallic element and oxygen or containing aluminum and nitrogen, or includes a third metal layer provided on the surface of the first insulator and containing a second metallic element, aluminum and nitrogen. The device further includes an interconnect material layer provided on a surface of the metal layer.Type: GrantFiled: August 14, 2018Date of Patent: February 18, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Wakatsuki, Masayuki Kitamura, Takeshi Ishizaki, Hiroshi Itokawa, Daisuke Ikeno, Kei Watanabe, Atsuko Sakata
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Patent number: 10525122Abstract: The present invention provides a vaccine containing virus-like particles derived from virus particles having an envelope, in which a lipid-component content of the virus-like particles is reduced relative to a lipid-component content of the virus particles.Type: GrantFiled: July 15, 2015Date of Patent: January 7, 2020Assignee: KM Biologics Co., Ltd.Inventors: Kazuhiko Kimachi, Motoharu Abe, Kazuyuki Ikeda, Hiroto Onuma, Yukari Tsurudome, Daisuke Ikeno, Kiyoto Nishiyama, Tatsufumi Onchi, Yusuke Ooyama, Issay Asano, Ryoichi Kitano
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Publication number: 20190279932Abstract: In one embodiment, a semiconductor device includes a first insulator. The device further includes a metal layer that includes a first metal layer provided on a surface of the first insulator, and a second metal layer provided on a surface of the first metal layer and containing a first metallic element and oxygen or containing aluminum and nitrogen, or includes a third metal layer provided on the surface of the first insulator and containing a second metallic element, aluminum and nitrogen. The device further includes an interconnect material layer provided on a surface of the metal layer.Type: ApplicationFiled: August 14, 2018Publication date: September 12, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Satoshi WAKATSUKI, Masayuki KITAMURA, Takeshi ISHIZAKI, Hiroshi ITOKAWA, Daisuke IKENO, Kei WATANABE, Atsuko SAKATA