Patents by Inventor Daisuke Ikeno

Daisuke Ikeno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260165113
    Abstract: In one embodiment, a semiconductor device includes a substrate, and a stacked film provided on the substrate, and including plural insulators separated from each other in a first direction orthogonal to a surface of the substrate. The device further includes a first semiconductor layer provided between first and second insulators of the plural insulators, extending in a second direction orthogonal to the first direction, and being a channel semiconductor layer, and a second semiconductor layer provided on a side face of the first semiconductor layer between the first and second insulators, and having a different composition from the first semiconductor layer. The device further includes a metal layer on a side face of the second semiconductor layer, a first interconnect provided on a side face of the metal layer, and a second interconnect extending in the second direction, electrically connected to the first interconnect, and being a bit line.
    Type: Application
    Filed: July 31, 2025
    Publication date: June 11, 2026
    Applicant: Kioxia Corporation
    Inventors: Mitsuo IKEDA, Daisuke IKENO
  • Publication number: 20260068159
    Abstract: A first insulator and the second insulator are arranged with a distance therebetween in a first direction. A memory pillar extends in the first direction and penetrates the first and second insulators. A third insulator extends over a surface of the first insulator, a surface of the second insulator, and a first portion of a surface of the memory pillar. The first portion is located between the first and second insulators. Dot structures are on a surface of the third insulator. Each of the dot structures includes a metallic element or a carbon element. A first conductor extends over a surface of the third insulator and surfaces of the dot structures. A second conductor is on a surface of the first conductor, and includes molybdenum.
    Type: Application
    Filed: February 18, 2025
    Publication date: March 5, 2026
    Applicant: Kioxia Corporation
    Inventors: Mitsuo IKEDA, Daisuke IKENO
  • Patent number: 12446223
    Abstract: According to one embodiment, a semiconductor storage device includes a memory pillar extending in a first direction. The memory pillar includes a tunnel insulation film, a charge storage layer on the tunnel insulation film, and a first block insulation film on the charge storage layer. A conductor layer extends in a second direction intersecting the first direction to meet a portion of the memory pillar. The conductor layer includes a first layer comprising molybdenum and a second layer comprising tungsten. The first layer is between the memory pillar and the second layer in the second direction.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: October 14, 2025
    Assignee: Kioxia Corporation
    Inventors: Hiroki Kitayama, Tomotaka Ariga, Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Patent number: 12408340
    Abstract: According to one embodiment, a semiconductor device includes a tunnel insulating film, a charge trap film on the tunnel insulating film, and a block insulating film on the charge trap film. The charge trap film is between the tunnel insulating film and the block insulating film. A conductive film is on the block insulating film. The block insulating film is between the charge trap film and the conductive film. The conductive film includes a first metal film adjacent to the block insulating film and a second metal film on the first metal film. The first metal film is between the block insulating film and the second metal film. The first metal film has an interfacial roughness on a side facing the second metal film that is greater than an interfacial roughness on a side facing the block insulating film.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: September 2, 2025
    Assignee: Kioxia Corporation
    Inventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20250089342
    Abstract: A semiconductor device of an embodiment includes: first and second regions that are provided in a substrate, the first and second regions containing impurities of a first conductivity type; a gate electrode disposed above the substrate between the first and second regions; first and second metal silicide layers disposed in the first and second regions, respectively; and first and second contacts connected to the first and second regions via the first and second metal silicide layers, respectively, in which the first and second contacts include: first and second oxidized silicide layers that are disposed at lower end portions of the first and second contacts and contain a predetermined metal different from metals included in the first and second metal silicide layers, respective; and metal layers that are in contact with the first and second oxidized silicide layers and extend in a second direction that intersects the first direction, respectively.
    Type: Application
    Filed: September 3, 2024
    Publication date: March 13, 2025
    Applicant: Kioxia Corporation
    Inventors: Daichi NISHIKAWA, Daisuke IKENO, Junichi HAMAGUCHI, Yoshiki SAITO, Akihiro KAJITA
  • Publication number: 20240268117
    Abstract: A semiconductor device includes: a film stack including a plurality of electrode layers and a plurality of first insulating films alternately stacked on top of one another; a charge storage layer provided between a side face of the electrode layers through a second insulating film; and a semiconductor layer provided between a side face of the charge storage layer through a third insulating film. At least one of the plurality of electrode layers includes a first layer and a second layer. The first layer is a polycrystalline layer including tungsten and nitrogen. The second layer is an amorphous layer including tungsten.
    Type: Application
    Filed: February 2, 2024
    Publication date: August 8, 2024
    Applicant: Kioxia Corporation
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Ryosuke UMINO
  • Patent number: 11990417
    Abstract: A semiconductor memory device includes a first insulating layer, a first conductive layer, a first pillar, a second pillar, and a second insulating layer. The first conductive layer contains tungsten. The first conductive layer includes a first sub conductive layer and a second sub conductive layer. The first pillar and the second pillar pass through the first insulating layer and the first conductive layer. The second insulating layer divides the first insulating layer and the first conductive layer. The first sub conductive layer is in contact with the second sub conductive layer and is provided between the second sub conductive layer and the first insulating layer. A fluorine concentration in the first sub conductive layer is lower than that in the second sub conductive layer.
    Type: Grant
    Filed: December 14, 2021
    Date of Patent: May 21, 2024
    Assignee: Kioxia Corporation
    Inventors: Hiroki Kitayama, Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20240098981
    Abstract: According to one embodiment, a semiconductor device includes a pillar of an oxide semiconductor material and a gate insulating layer that surrounds a side surface of the pillar. The gate insulating layer includes a lower portion, an upper portion, and an intermediate portion. A gate electrode surrounds the intermediate portion of the gate insulating layer. A lower electrode is provided that includes a first oxide conductor portion that is connected to a lower surface of the pillar. An upper electrode is provided connected to an upper surface of the pillar. The gate electrode includes a metal portion containing a metallic element and a first nitrogen-containing portion between the metal portion and the gate insulating layer. The first oxide conductor portion includes a second nitrogen-containing at an interface between the first oxide conductor portion and the gate insulating layer.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 21, 2024
    Inventors: Daichi NISHIKAWA, Daisuke IKENO, Atsuko SAKATA
  • Publication number: 20240098997
    Abstract: A semiconductor device includes: a stacked film alternately including a plurality of electrode layers and a plurality of first insulating films; a charge storage layer provided on the side surfaces of the electrode layers via a second insulating film; and a semiconductor layer provided on the side surface of the charge storage layer via a third insulating film. At least one electrode layer of the plurality of electrode layers includes a first electrode layer which is an amorphous layer comprising a metal element and silicon.
    Type: Application
    Filed: August 15, 2023
    Publication date: March 21, 2024
    Applicant: Kioxia Corporation
    Inventors: Ryosuke UMINO, Daisuke IKENO
  • Publication number: 20240081073
    Abstract: A semiconductor device according to the present disclosure includes a first insulating film, a second insulating film, and a tungsten film provided between the first insulating film and the second insulating film, the tungsten film having a crystal particle, wherein a thickness T of the tungsten film in a first direction from the first insulating film toward the second insulating film and an average particle size APS of the crystal particle satisfy APS/T?2 is satisfied.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: Kioxia Corporation
    Inventors: Ryosuke UMINO, Daisuke IKENO, Masayuki KITAMURA, Akihiro KAJITA
  • Publication number: 20230413555
    Abstract: According to one embodiment, a semiconductor storage device includes a memory pillar extending in a first direction. The memory pillar includes a tunnel insulation film, a charge storage layer on the tunnel insulation film, and a first block insulation film on the charge storage layer. A conductor layer extends in a second direction intersecting the first direction to meet a portion of the memory pillar. The conductor layer includes a first layer comprising molybdenum and a second layer comprising tungsten. The first layer is between the memory pillar and the second layer in the second direction.
    Type: Application
    Filed: March 2, 2023
    Publication date: December 21, 2023
    Inventors: Hiroki KITAYAMA, Tomotaka ARIGA, Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Publication number: 20230092843
    Abstract: According to one embodiment, a semiconductor device includes a tunnel insulating film, a charge trap film on the tunnel insulating film, and a block insulating film on the charge trap film. The charge trap film is between the tunnel insulating film and the block insulating film. A conductive film is on the block insulating film. The block insulating film is between the charge trap film and the conductive film. The conductive film includes a first metal film adjacent to the block insulating film and a second metal film on the first metal film. The first metal film is between the block insulating film and the second metal film. The first metal film has an interfacial roughness on a side facing the second metal film that is greater than an interfacial roughness on a side facing the block insulating film.
    Type: Application
    Filed: February 25, 2022
    Publication date: March 23, 2023
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Patent number: 11605643
    Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate, a first insulating layer, a second insulating layer, the first insulating layer between the semiconductor substrate and the second insulating layer, a semiconductor layer between the first insulating layer and the second insulating layer, the semiconductor layer extending in a first direction parallel to a surface of the semiconductor substrate, a gate electrode layer extending in a direction perpendicular to the surface; a first insulating film between the semiconductor layer and the gate electrode layer, a second insulating film between the first insulating film and the gate electrode layer the second insulating film in contact with the first insulating layer and the second insulating layer, a polycrystalline silicon region between the first insulating film and the second insulating film; and a metal film between the polycrystalline silicon region and the second insulating film containing titanium and silicon.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: March 14, 2023
    Assignee: Kioxia Corporation
    Inventors: Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20230046783
    Abstract: A semiconductor memory device includes a first insulating layer, a first conductive layer, a first pillar, a second pillar, and a second insulating layer. The first conductive layer contains tungsten. The first conductive layer includes a first sub conductive layer and a second sub conductive layer. The first pillar and the second pillar pass through the first insulating layer and the first conductive layer. The second insulating layer divides the first insulating layer and the first conductive layer. The first sub conductive layer is in contact with the second sub conductive layer and is provided between the second sub conductive layer and the first insulating layer. A fluorine concentration in the first sub conductive layer is lower than that in the second sub conductive layer.
    Type: Application
    Filed: December 14, 2021
    Publication date: February 16, 2023
    Applicant: Kioxia Corporation
    Inventors: Hiroki KITAYAMA, Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Publication number: 20220406710
    Abstract: A semiconductor device includes a conductive layer extending in a first direction, including a first surface, a second surface facing the first surface in a second direction intersecting the first direction, a third surface, and a fourth surface facing the third surface in a third direction intersecting the first direction and the second direction, and containing a first element which is at least one element of tungsten (W) or molybdenum (Mo); a first region disposed on a first surface side of the conductive layer, containing a second element which is at least one element of tungsten (W) or molybdenum (Mo), and a third element which is at least one element of sulfur (S), selenium (Se), or tellurium (Te), and including a first crystal; and a second region disposed on a second surface side of the conductive layer, containing the second element and the third element, and including a second crystal.
    Type: Application
    Filed: February 28, 2022
    Publication date: December 22, 2022
    Applicant: Kioxia Corporation
    Inventors: Tatsuya NOMURA, Daichi NISHIKAWA, Daisuke IKENO, Akihiro KAJITA
  • Patent number: 11527478
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a conductor including tungsten (W) or molybdenum (Mo); a first film provided between the conductor and the semiconductor substrate and including titanium (Ti) and silicon (Si); an insulating layer surrounding the conductor; and a second film provided between the conductor and the insulating layer, surrounding the conductor, and including titanium (Ti) and nitrogen (N). A first distance between the semiconductor substrate and an end portion of the second film on a side opposite to the semiconductor substrate is smaller than a second distance between the semiconductor substrate and an end portion of the conductor on a side opposite to the semiconductor substrate.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: December 13, 2022
    Assignee: Kioxia Corporation
    Inventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20220085051
    Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate, a first insulating layer, a second insulating layer, the first insulating layer between the semiconductor substrate and the second insulating layer, a semiconductor layer between the first insulating layer and the second insulating layer, the semiconductor layer extending in a first direction parallel to a surface of the semiconductor substrate, a gate electrode layer extending in a direction perpendicular to the surface; a first insulating film between the semiconductor layer and the gate electrode layer, a second insulating film between the first insulating film and the gate electrode layer the second insulating film in contact with the first insulating layer and the second insulating layer, a polycrystalline silicon region between the first insulating film and the second insulating film; and a metal film between the polycrystalline silicon region and the second insulating film containing titanium and silicon.
    Type: Application
    Filed: March 10, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventors: Daisuke IKENO, Akihiro KAJITA
  • Patent number: 11227934
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a plurality of insulating films and a plurality of electrode films provided alternately on the substrate. The semiconductor device further includes a first insulating film, a first charge storage film, a third insulating film, a second charge storage film, a second insulating film, and a first semiconductor film that are sequentially provided along at least one side surface of each of the electrode films. The first charge storage film includes either (i) molybdenum, or (ii) titanium and nitrogen, and the second charge storage film includes a semiconductor film.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: January 18, 2022
    Assignee: KIOXIA CORPORATION
    Inventors: Mitsuo Ikeda, Daisuke Ikeno, Akihiro Kajita
  • Publication number: 20210296238
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a conductor including tungsten (W) or molybdenum (Mo); a first film provided between the conductor and the semiconductor substrate and including titanium (Ti) and silicon (Si); an insulating layer surrounding the conductor; and a second film provided between the conductor and the insulating layer, surrounding the conductor, and including titanium (Ti) and nitrogen (N). A first distance between the semiconductor substrate and an end portion of the second film on a side opposite to the semiconductor substrate is smaller than a second distance between the semiconductor substrate and an end portion of the conductor on a side opposite to the semiconductor substrate.
    Type: Application
    Filed: December 15, 2020
    Publication date: September 23, 2021
    Applicant: Kioxia Corporation
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA
  • Publication number: 20210083069
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a plurality of insulating films and a plurality of electrode films provided alternately on the substrate. The semiconductor device further includes a first insulating film, a first charge storage film, a third insulating film, a second charge storage film, a second insulating film, and a first semiconductor film that are sequentially provided along at least one side surface of each of the electrode films. The first charge storage film includes either (i) molybdenum, or (ii) titanium and nitrogen, and the second charge storage film includes a semiconductor film.
    Type: Application
    Filed: March 2, 2020
    Publication date: March 18, 2021
    Applicant: KIOXIA CORPORATION
    Inventors: Mitsuo IKEDA, Daisuke IKENO, Akihiro KAJITA