Abstract: According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film.

Abstract: A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate.

Abstract: A first adjusting metal, capable of varying the threshold voltage of a first-conductivity-type transistor of a complementary transistor, is added to the first-conductivity-type transistor and a second-conductivity-type transistor at the same time, and a diffusion suppressive element, capable of suppressing diffusion of the first adjusting metal, is added from above a metal gate electrode of the second-conductivity-type transistor.

Abstract: According to one embodiment, a magnetic random access memory including a magneto resistive element, including a free layer including first metal atoms, a first metal layer on the free layer and including a first metal, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer provided on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second metal layer on the second interfacial magnetic layer and including a second metal, and a pinned layer provided on the second metal layer and including the second metal atoms.

Abstract: According to one embodiment, a magnetoresistive random access memory includes a magnetoresistive element in a memory cell, the magnetoresistive element including a first metal magnetic layer, a second metal magnetic layer, and an insulation layer interposed between the first and second metal magnetic layers. An area of each of the first and second metal magnetic layers is smaller than an area of the insulation layer.

Abstract: According to one embodiment, a semiconductor device includes an N-type transistor and a P-type transistor. The N-type transistor has a first gate insulating film comprising a high dielectric film on a semiconductor substrate, and a first gate electrode comprising a TaxNy film comprising Ta3N5 on the first gate insulating film. The first gate insulating film comprises a first material decreasing an effective work function of the first gate electrode. The P-type transistor has a SiGe film on the semiconductor substrate, a second gate insulating film comprising the high dielectric film on the SiGe film, and a second gate electrode on the second gate insulating film, the second gate electrode being made of a material identical to a material of the first gate electrode. The second gate insulating film comprises a second material increasing an effective work function of the second gate electrode.

Abstract: A first adjusting metal, capable of varying the threshold voltage of a first-conductivity-type transistor of a complementary transistor, is added to the first-conductivity-type transistor and a second-conductivity-type transistor at the same time, and a diffusion suppressive element, capable of suppressing diffusion of the first adjusting metal, is added from above a metal gate electrode of the second-conductivity-type transistor.

Abstract: A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate.

Abstract: A semiconductor device includes a semiconductor substrate including a P-type semiconductor region, and an N channel MOSFET formed in the P-type semiconductor region, the N channel MOSFET including an insulating film of silicon oxide film or silicon oxynitride film formed on the semiconductor substrate, a gate insulating film including hafnium and formed on the insulating film, a lanthanum oxide film having a film thickness not larger than a predetermined value and formed between the gate insulating film and insulating film, and a gate electrode including a titanium nitride film having a N/Ti atomic ratio less than 1.

Abstract: A semiconductor device includes a semiconductor substrate containing a p-type diffusion layer and an n-type diffusion layer which are separated by an element separation film; a gate insulating film formed on or above the p-type diffusion layer and the n-type diffusion layer of the semiconductor substrate, respectively; a gate electrode containing a metallic film and formed on the gate insulating film; a Ge inclusion formed at an interface between the gate insulating film and the metallic film; and a silicon-containing layer formed on the metallic film.