Abstract: According to one embodiment, when shifting to a sleep mode, a processor of a memory device transmits a first command and saving data to a host and issues a power shut-off request. The first command is a command for writing data to a first memory of the host. The saving data includes register information. The register information includes register data stored in the control register and an address of the control register. A power supply circuit shuts off power supply to a second memory of the memory device, the control register, the processor, and a peripheral circuit in response to the issued power shut-off request.

Abstract: A system for augmenting the appearance of an object including a plurality of projectors. Each projector includes a light source and a lens in optical communication with the light source, where the lens focuses light emitted by the light source on the object. The system also includes a computer in communication with the plurality of projectors, the computer including a memory component and a processing element in communication with the memory component and the plurality of projectors. The processing element determines a plurality of images to create an augmented appearance of the object and provides the plurality of images to the plurality of projectors to project light corresponding to the plurality of images onto the object to create the augmented appearance of the object. After the images are projected onto the object, the augmented appearance of the objected is substantially the same regardless of a viewing angle for the object.

Abstract: The defect size of a photomask blank is evaluated. An inspection-target photomask blank is irradiated with inspection light and reflected light of the region of the inspection-target photomask blank irradiated with the inspection light is collected through an objective lens of an inspection optical system as a magnified image of the region. Then, an intensity change part in the light intensity distribution profile of the magnified image is identified. Next, a difference in the light intensity of the intensity change part is obtained and the width of the intensity change part is obtained as the apparent width of the defect. Then, the width of the defect is calculated on the basis of a predetermined conversion expression showing the relationship among the difference in the light intensity, the apparent width of the defect, and the actual width of the defect, and the width of the defect is estimated.

Abstract: According to embodiments, a second control unit creates parity from information loaded into a volatile second memory. When shifting from a normal mode to a sleep mode, the second control unit stores the created parity and the information loaded in the second memory into a buffer of a non-volatile first memory, and issues a power supply shutdown request. A power supply circuit shuts down power supply to the second memory and the second control unit in response to the issued power supply shutdown request.

Abstract: A system for augmenting the appearance of an object including a plurality of projectors. Each projector includes a light source and a lens in optical communication with the light source, where the lens focuses light emitted by the light source on the object. The system also includes a computer in communication with the plurality of projectors, the computer including a memory component and a processing element in communication with the memory component and the plurality of projectors. The processing element determines a plurality of images to create an augmented appearance of the object and provides the plurality of images to the plurality of projectors to project light corresponding to the plurality of images onto the object to create the augmented appearance of the object. After the images are projected onto the object, the augmented appearance of the objected is substantially the same regardless of a viewing angle for the object.

Abstract: According to one embodiment, a virtual block is constructed according to configuration conditions that, when a plurality of physical blocks included in the virtual block are selected, the sum of the number of physical block pairs and the number of single blocks allocated from the same memory chip to one virtual block is less than or equal to a first value.

Abstract: According to one embodiment, a storage device includes an encoder, a nonvolatile memory that stores user data and a parity, a magnetic disk, and a management unit that holds correspondence between a logical address and a first physical address as first conversion information, and holds correspondence between the first physical address and a second physical address as second conversion information, with the second physical address including media information indicating a medium of a storage destination and information indicating a storage position. When the user data stored in the nonvolatile memory is to be moved to the magnetic disk, the management unit updates the second physical address of the user date in the second conversion information, to a value indicating a storage destination after the movement.

Abstract: A system for augmenting the appearance of an object including a plurality of projectors. Each projector includes a light source and a lens in optical communication with the light source, where the lens focuses light emitted by the light source on the object. The system also includes a computer in communication with the plurality of projectors, the computer including a memory component and a processing element in communication with the memory component and the plurality of projectors. The processing element determines a plurality of images to create an augmented appearance of the object and provides the plurality of images to the plurality of projectors to project light corresponding to the plurality of images onto the object to create the augmented appearance of the object. After the images are projected onto the object, the augmented appearance of the objected is substantially the same regardless of a viewing angle for the object.

Abstract: A memory device according to an embodiment includes a non-volatile storage device, a volatile storage device that stores saved data which is saved in the host-side storage device when a first operation mode changing process is executed by the memory device, and a control unit. The control unit transmits, to the host device, a write command that is an instruction to write the saved data to the host-side storage device and the saved data, when the first operation mode changing process is executed by the memory device.

Abstract: A memory device of an embodiment includes a non-volatile storage device, and a volatile storage device that stores observation information indicating a state of the memory device. The memory device is provided with a controller that executes an observation information sending process that sends a write command, which is an instruction to write the observation information in the host-side storage device, and the observation information to the host device. Further, the controller repeats the observation information sending process plural times in response to one sending request from the host device.

Abstract: A storage device according to an embodiment includes first and second non-volatile semiconductor memories. In addition, the storage device includes first controller that controls the first non-volatile memory to cause the first non-volatile memory to perform processes. In addition, the storage device includes second controller that controls the second non-volatile memory to cause the second non-volatile memory to perform processes. The storage device further includes a signal line which is connected to the first controller and the second controller and through which a token is transmitted between the first controller and the second controller. The first controller is capable of controlling the first non-volatile memory while holding the token and the second controller is capable of controlling the second non-volatile memory while holding the token.

Abstract: According to one embodiment, a virtual block is constructed according to configuration conditions that, when a plurality of physical blocks included in the virtual block are selected, the sum of the number of physical block pairs and the number of single blocks allocated from the same memory chip to one virtual block is less than or equal to a first value.

Abstract: According to one embodiment, a memory system includes a plurality of non-volatile memory chips and a memory controller. The memory controller controls a read operation of the memory chips, and manages correspondence relation information between a logical address included in a read command and a physical address of the memory chip. The memory controller causes at least two memory chips to store the same correspondence relation information. Further, in the read operation, the memory controller reads the correspondence relation information from at least one memory chip among the plurality of memory chips storing the same correspondence relation information.

Abstract: A storage device according to an embodiment includes first and second non-volatile semiconductor memories. In addition, the storage device includes first controller that controls the first non-volatile memory to cause the first non-volatile memory to perform processes. In addition, the storage device includes second controller that controls the second non-volatile memory to cause the second non-volatile memory to perform processes. The storage device further includes a signal line which is connected to the first controller and the second controller and through which a token is transmitted between the first controller and the second controller. The first controller is capable of controlling the first non-volatile memory while holding the token and the second controller is capable of controlling the second non-volatile memory while holding the token.

Abstract: According to one embodiment, a memory controller includes a first interface, a second interface, a cache unit, a translation unit, an access unit and a lock unit. The first interface receives a lock request and an access request which includes a logical address. The second interface is connectable to a non-volatile memory. The cache unit comprises a plurality of cache line and caches correspondence information between the logical address and a physical address of the non-volatile memory. The translation unit translates the logical address included in the access request into the physical address with reference to the cache unit. The access unit performs access in accordance with the access request to a position indicated by the translated physical address. The lock unit sets the cache line lock state in accordance with the lock request. The lock state is the state where the cache line being prohibited to be refilled.

Abstract: According to one embodiment, there is provided a audio format converting apparatus including a audio data dividing unit, first to Nth audio format converting units, and a audio data connecting unit. The audio data dividing unit creates first to Nth divided audio streams from an input audio stream, and adds the same frames as a predetermined number of frames from the head of the (i+1)th divided audio stream to the end of an i-th divided audio stream (i=1,2, to N?1). The first to Nth audio format converting units subject the first to Nth divided audio streams to audio format converting processing in parallel, so as to produce first to Nth converted audio streams. The audio data connecting unit discards the predetermined number of frames from the head of each of the second to Nth converted audio streams, and sequentially connects the first to Nth converted audio streams.

Abstract: An audio playback device has an importance degree calculator configured to set an importance degree of a digital audio signal based on a playback sound volume of the digital audio signal, and a frequency converter configured to convert a sampling frequency of the digital audio signal to a predetermined frequency with sound quality and power consumption according to the importance degree.

Abstract: A method and an illumination device is provided for optical contrast enhancement of an object through a spatially and/or temporally modulated illumination of the object by way of at least one light projection unit, wherein the spatial and/or temporal modulation of the illumination of the object is determined using a set of image data associated with the object.

Abstract: A processor includes a first register, a control section and an arithmetical section. The processor has a first operation mode which allows the first area of a first register to be accessed and a second operation mode which allows a second area of the first register to be accessed. The first register includes the first area capable of holding data and the second area provided in the second operation mode and inhibited from holding data. The control section generates an address corresponding to the second area accessed in the second operation mode and is capable of reading data from an external memory device using the generated address. The arithmetical section, in the first operation mode, performs an arithmetical operation using the data held in the accessed first area and, in the second operation mode, performs an arithmetical operation using the data read at the control section.

Abstract: A processor includes a first register, a control section and an arithmetical section. The processor has a first operation mode which allows the first area of a first register to be accessed and a second operation mode which allows a second area of the first register to be accessed. The first register includes the first area capable of holding data and the second area provided in the second operation mode and inhibited from holding data. The control section generates an address corresponding to the second area accessed in the second operation mode and is capable of reading data from an external memory device using the generated address. The arithmetical section, in the first operation mode, performs an arithmetical operation using the data held in the accessed first area and, in the second operation mode, performs an arithmetical operation using the data read at the control section.