Patents by Inventor Daisuke Miura

Daisuke Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070178312
    Abstract: The present invention relates to a transfer medium carrying member that excels in flame retardancy and provides good electrophotographical images. The transfer medium carrying member includes i) a resin and ii) a conductive filler, wherein the resin comprises a polycarbonate resin (a) that has a structural unit including a siloxane structure and a structural unit including a fluorene structure.
    Type: Application
    Filed: April 9, 2007
    Publication date: August 2, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Daisuke Miura, Shunichiro Nishida, Yasuhiro Naito, Tomonari Nakayama, Naotoshi Miyamachi, Teigo Sakakibara
  • Patent number: 7211120
    Abstract: A method for forming a pattern of an organic semiconductor film comprises applying at least a bicyclo compound onto a base material, the bicyclo compound being converted to an organic semiconductor on the base material through retro-Diels-Alder reaction which removes a part of the bicyclo skeleton to allow extension of pi electron system.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: May 1, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takayuki Ishikawa, Teigo Sakakibara, Daisuke Miura, Hidemitsu Uno, Noboru Ono
  • Publication number: 20070012914
    Abstract: There is provided a field effect transistor having an organic semiconductor layer, including: an organic semiconductor layer containing at least porphyrin; and a layer composed of at least a polysiloxane compound, the layer being laminated on the organic semiconductor layer so as to be in intimate contact with the organic semiconductor layer. As a result, there can be provided a field effect transistor which enables an organic semiconductor layer having high crystallinity and high orientation to be formed and which exhibits a high mobility.
    Type: Application
    Filed: March 9, 2005
    Publication date: January 18, 2007
    Applicant: Canon Kabushiki Kaisha
    Inventors: Daisuke Miura, Tomonari Nakayama, Toshinobu Ohnishi, Makoto Kubota, Akane Masumoto, Hidetoshi Tsuzuki, Makiko Miyachi
  • Publication number: 20060269876
    Abstract: Provided is a solubility-controallable compound being soluble in a solvent due to a solvent-philic group thereof, of which solubility in the solvent is irreversibly lowered when the group is removed by retro-Diels-Alder reaction.
    Type: Application
    Filed: August 9, 2006
    Publication date: November 30, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Takayuki Ishikawa, Teigo Sakakibara, Daisuke Miura, Hidemitsu Uno, Noboru Ono
  • Patent number: 7141753
    Abstract: An arc stud welding device and method are provided, in which a stud is pulled up to an appropriate predetermined height, even after a portion of a flexible base material is dented by the stud and has returned to an original flat condition. A controller operates a linear motor to disengage the stud from the base material, operates a power source to generate a pilot arc and a main arc, and reverses the operation of the linear motor to press the stud against the base material for welding. When the stud is pulled up from the base material, the controller detects the position of disengagement of the stud from the base material, and the linear motor pulls up the stud to a predetermined position.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: November 28, 2006
    Assignee: Newfrey LLC
    Inventors: Yoshiteru Kondo, Daisuke Miura
  • Publication number: 20060214159
    Abstract: An organic semiconductor device is provided which includes an organic semiconductor layer and an insulating layer. The insulating layer is made of a cured material formed from a composition containing a resin and a crosslinking agent. The resin contains an organic resin having a hydroxyl group. The crosslinking agent contains a compound having at least two crosslinking groups. At least one of the crosslinking groups is a methylol group or an NH group. The composition contains the crosslinking agent in the range of 15 to 45 percent by weight relative to 100 parts by weight in total of the resin and the crosslinking agent.
    Type: Application
    Filed: March 14, 2006
    Publication date: September 28, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Tomonari Nakayama, Toshinobu Ohnishi, Daisuke Miura
  • Publication number: 20060211180
    Abstract: Provided is a field effect transistor having an organic semiconductor layer, in which crystal grains having a maximum diameter of 10 ?m or more account for 25% or more of the surface area of the organic semiconductor layer. The organic semiconductor layer preferably contains 7 to 200 crystal grains having a maximum diameter of 10 ?m or more per 0.01 mm2. The organic semiconductor layer preferably contains a porphyrin crystal.
    Type: Application
    Filed: August 26, 2004
    Publication date: September 21, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Tomonari Nakayama, Daisuke Miura
  • Publication number: 20060191440
    Abstract: Provided is a solubility-controallable compound being soluble in a solvent due to a solvent-philic group thereof, of which solubility in the solvent is irreversibly lowered when the group is removed by retro-Diels-Alder reaction.
    Type: Application
    Filed: May 8, 2006
    Publication date: August 31, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Takayuki Ishikawa, Teigo Sakakibara, Daisuke Miura, Hidemitsu Uno, Noboru Ono
  • Patent number: 7094625
    Abstract: A field effect transistor having a high field effect mobility is provided which can be obtained by a simple method. The field effect transistor includes an organic semiconductor layer composed of a crystallized film of a naphthoporphyrin compound represented by formula (2), which is obtained by the conversion by heating of the coating film of a porphyrin compound represented by formula (1), the organic semiconductor layer having crystal grains with a maximum diameter of 1 ?m or more, wherein R1 and R2 each independently denote at least one selected from the group consisting of hydrogen, halogen, hydroxyl, and alkyl having 1 to 12 carbon atoms; R3 denotes at least one selected from the group consisting of a hydrogen atom and an aryl group; and M denotes two hydrogen atoms, a metal atom or a metal oxide.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: August 22, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Daisuke Miura, Tomonari Nakayama
  • Patent number: 7090719
    Abstract: Provided is a solubility-controallable compound being soluble in a solvent due to a solvent-philic group thereof, of which solubility in the solvent is irreversibly lowered when the group is removed by retro-Diels-Alder reaction.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: August 15, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takayuki Ishikawa, Teigo Sakakibara, Daisuke Miura, Hidemitsu Uno, Noboru Ono
  • Publication number: 20060145141
    Abstract: Provided is a field effect transistor having an organic semiconductor layer, in which the organic semiconductor layer contains at least a tetrabenzo copper porphyrin crystal and has peaks at two or more of Bragg angles (2?) in CuK? X-ray diffraction of 8.4°±0.2°, 10.2°±0.2°, 11.80°±0.20°, and 16.90°±0.20°, and the tetrabenzo copper porphyrin crystal comprises a compound represented by the following general formula (1): (Wherein R2's each represent a hydrogen atom, a halogen atom, a hydroxyl group, or an alkyl group, oxyalkyl group, thioalkyl group, or alkylester group having 1 to 12 carbon atoms, and R3's each represent a hydrogen atom or an aryl group.
    Type: Application
    Filed: August 17, 2004
    Publication date: July 6, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Daisuke Miura, Tomonari Nakayama, Toshinobu Ohnishi, Makoto Kubota
  • Publication number: 20060132450
    Abstract: A touch panel (8) having a film/glass structure includes an upper electrode member (1) including a transparent insulation film (11) having upwardly-inclined end surfaces (11a) at the entire peripheral sides thereof. A touch panel (8A) having a film/film structure includes an upper electrode member (1) including a transparent insulation film (11) and a lower electrode member (2) including a transparent insulation film (22), wherein the transparent insulation film (11) and the transparent insulation film (22) have upwardly-inclined end surfaces (11a, 22a) at the entire peripheral sides thereof.
    Type: Application
    Filed: February 12, 2004
    Publication date: June 22, 2006
    Inventors: Shinya Yamada, Takao Hashimoto, Yasuji Kusuda, Daisuke Miura
  • Publication number: 20060099732
    Abstract: A field effect transistor having a high field effect mobility is provided which can be obtained by a simple method. The field effect transistor includes an organic semiconductor layer composed of a crystallized film of a naphthoporphyrin compound represented by formula (2), which is obtained by the conversion by heating of the coating film of a porphyrin compound represented by formula (1), the organic semiconductor layer having crystal grains with a maximum metediar of 1 ?m or more, wherein R1 and R2 each independently denote at least one selected from the group consisting of hydrogen, halogen, hydroxyl, and alkyl having 1 to 12 carbon atoms; R3 denotes at least one selected from the group consisting of a hydrogen atom and an aryl group; and M denotes two hydrogen atoms, a metal atom or a metal oxide.
    Type: Application
    Filed: March 26, 2004
    Publication date: May 11, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Daisuke Miura, Tomonari Nakayama
  • Publication number: 20060081880
    Abstract: There is provided a method for producing a field effect transistor with a high field-effect mobility using a simple method for forming an organic semiconductor layer. A method for producing an organic field effect transistor comprising an organic semiconductor layer, comprising a step of forming the organic semiconductor layer by the photodecomposition of a bicyclic compound containing in a molecule thereof at least one bicyclic ring represented by formula (1): wherein R1 and R3 each denotes a group for forming an aromatic ring or a heteroaromatic ring which may have a substituent, together with a group to be bonded to R1 or R3; R2 and R4 each denotes a hydrogen atom, an alkyl group, an alkoxy group, an ester group or a phenyl group; and X is a leaving group which denotes carbonyl group or —N?.
    Type: Application
    Filed: February 27, 2004
    Publication date: April 20, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hajime Miyazaki, Daisuke Miura, Tomonari Nakayama, Hidemitsu Uno, Noboru Ono
  • Publication number: 20060075584
    Abstract: Provided is a solubility-controallable compound being soluble in a solvent due to a solvent-philic group thereof, of which solubility in the solvent is irreversibly lowered when the group is removed by retro-Diels-Alder reaction.
    Type: Application
    Filed: November 28, 2005
    Publication date: April 13, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventors: Takayuki Ishikawa, Teigo Sakakibara, Daisuke Miura, Hidemitsu Uno, Noboru Ono
  • Publication number: 20050271879
    Abstract: The present invention relates to a transfer medium carrying member that excels in flame retardancy and provides good electrophotographical images. The transfer medium carrying member includes i) a resin and ii) a conductive filler, wherein the resin comprises a polycarbonate resin (a) that has a structural unit including a siloxane structure and a structural unit including a fluorene structure.
    Type: Application
    Filed: June 6, 2005
    Publication date: December 8, 2005
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Daisuke Miura, Shunichiro Nishida, Yasuhiro Naito, Tomonari Nakayama, Naotoshi Miyamachi, Teigo Sakakibara
  • Publication number: 20050218119
    Abstract: An arc stud welding device and method are provided, in which a stud is pulled up to an appropriate predetermined height, even after a portion of a flexible base material is dented by the stud and has returned to an original flat condition. A controller operates a linear motor to disengage the stud from the base material, operates a power source to generate a pilot arc and a main arc, and reverses the operation of the linear motor to press the stud against the base material for welding. When the stud is pulled up from the base material, the controller detects the position of disengagement of the stud from the base material, and the linear motor pulls up the stud to a predetermined position.
    Type: Application
    Filed: June 6, 2005
    Publication date: October 6, 2005
    Inventors: Yoshiteru Kondo, Daisuke Miura
  • Publication number: 20050202348
    Abstract: A substrate is provided which comprises an organic resin layer on a base material, wherein the base material has an average surface roughness of not less than 1.2 nm but no more than 5 nm and a maximum height of a surface unevenness of not less than 0.1 ?m but no more than 1.0 ?m; the organic resin layer has an average surface roughness of not more than 1 nm and a maximum peak height of a surface unevenness of not more than 30 nm; and at least a part of a surface of the organic resin layer comprises a hydrophilic region.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 15, 2005
    Applicant: Canon Kabushiki Kaisha
    Inventors: Tomonari Nakayama, Toshinobu Ohnishi, Makoto Kubota, Daisuke Miura
  • Patent number: 6857107
    Abstract: In a layout method for an LSI having a plurality of cells, automated arrangement of cells is performed on the basis of a netlist, which has cells and connection data therefor, and timing conditions, and, once a timing optimization processing is performed so that a plurality of cells are arranged on a chip, global wiring processing is implemented and the wiring congestion rate is analyzed. In addition, in small regions where a wiring congestion rate is so high that detailed wiring processing is judged to be difficult, cell rearrangement processing is implemented. Next, detailed wiring processing is performed with respect to the cells which have been rearranged. The rearrangement of cells is performed only in small regions with a high congestion rate, with the result that the overall cell arrangement in which timing is optimized is not changed markedly, whereby it is possible to reduce the probability of wiring being impossible in the course of the detailed wiring processing.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 15, 2005
    Assignee: Fujitsu Limited
    Inventors: Mitsuaki Nagasaka, Daisuke Miura, Masayuki Okamoto, Hiroyuki Honda, Toshio Arakawa, Shuji Yoshida, Kenji Yoshida, Kenji Kobayashi
  • Patent number: 6781412
    Abstract: Each binary carry logic circuit 20 of half adder circuits other than that for the least significant digit comprises a transfer gate 212 turned on when an input bit A2 is active and receiving a carry-in bit *C2 at its data input, and a transistor 23, turned on when the input bit A2 is inactive, connected between a power supply potential VDD and the data output of the transfer gate 212 a signal on which is a carry-out bit *C3. Transfer gates 212 to 214 of binary carry logic circuits other than that for the least significant digit are connected in chain, and are simultaneously on/off controlled by input bits A2 to A4, letting the carry-in bit *C2 from the least significant digit propagate through the transfer gate chain at a high speed.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Shuji Yoshida, Daisuke Miura, Toshio Arakawa, Mitsuaki Nagasaka, Kenji Yoshida, Hiroyuki Honda, Kenji Kobayashi, Masayuki Okamoto