Patents by Inventor Daisuke Sakurai

Daisuke Sakurai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8134081
    Abstract: A three-dimensional circuit board is formed by comprising a board, a first wiring-electrode group provided on a plurality of steps above the board, and a second wiring-electrode connected to the first wiring-electrode group at least in an altitude direction, in which at least a connecting portion between the first wiring-electrode group and the second wiring-electrode is integrated in a continuously identical shape.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: March 13, 2012
    Assignee: Panasonic Corporation
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Patent number: 8120188
    Abstract: An electronic component mounting structure includes an electronic component provided with a plurality of electrode terminals, and a mounting substrate provided with connector terminals in positions corresponding to the electrode terminals. An electrode terminal is connected to a connector terminal via a protrusion electrode disposed on the electrode terminal or the connector terminal, and the protrusion electrode includes a conductive filler and a photosensitive resin. The photosensitive resin varies in resin component crosslink density in the height direction of the protrusion electrode.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: February 21, 2012
    Assignee: Panasonic Corporation
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Patent number: 8119449
    Abstract: An electronic part mounting structure includes electronic part having a plurality of electrode terminals, a substrate provided with connection terminals in locations corresponding to these electrode terminals, and protruding electrode for connecting one of electrode terminals and one of connection terminals, where electrode terminal of electronic part and connection terminal of substrate are connected through protruding electrode and protruding electrode is formed of a conductive resin including a photosensitive resin and a conductive filler.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: February 21, 2012
    Assignee: Panasonic Corporation
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Patent number: 8083150
    Abstract: A non-contact information storage medium has IC chip having at least a function of storing information, and resin substrate having antenna pattern for communicating a signal to an external device. Antenna terminal disposed at one end of antenna pattern on resin substrate and electrode terminal of IC chip are mounted so that the antenna terminal faces the electrode terminal. Insulating layer for gap regulation of at least 5 ?m is disposed between antenna pattern and circuit forming surface of IC chip.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: December 27, 2011
    Assignee: Panasonic Corporation
    Inventors: Daisuke Sakurai, Michiro Yoshino
  • Publication number: 20110233767
    Abstract: The semiconductor device manufacturing method includes the steps of attaching two or more solder particles on at least one electrode among a plurality of electrodes of an electronic component, arranging the electrode of the electronic component and an electrode of a circuit board so as to oppose each other, abutting the solder particles attached on a surface of the electrode of the electronic component to the electrode of the circuit board and heating the solder particles, and connecting electrically the electrode of the electronic component and the electrode of the circuit board via two or more solder joint bodies made by melting the solder particles.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 29, 2011
    Applicant: Panasonic Corporation
    Inventor: Daisuke SAKURAI
  • Patent number: 8018731
    Abstract: Interconnect substrate (1) that connects at least the first circuit board and the second circuit board. Interconnect substrate (1) includes housing (1) and connecting terminal electrodes for connecting the top and bottom faces of housing (10). Housing (10) has protrusion (11) on its outer periphery and opening (13) in its inner periphery.
    Type: Grant
    Filed: June 19, 2007
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Daisuke Sakurai, Masato Mori, Yoshihiko Yagi
  • Patent number: 7928566
    Abstract: Conductive bump (17) formed on a surface of electrode terminal (11) of an electronic component. Conductive bump (17) is composed of at least a plurality of cured resin materials having different conductive filler densities. Thus, a short circuit and a connection failure due to crush of conductive bump (17) at the time of mounting can be prevented.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: April 19, 2011
    Assignee: Panasonic Corporation
    Inventors: Yoshihiko Yagi, Daisuke Sakurai
  • Patent number: 7908897
    Abstract: A spline rolling tool including a plurality of forming teeth that are to bite into a cylindrical workpiece so as to roll splines in the workpiece. Each of the forming teeth has an incomplete toothed region in which a crest of each forming tooth is removed such that an upper end of each forming tooth in the incomplete toothed region is defined by an incomplete-toothed region surface that includes a curved surface portion, a flat surface portion and a slant surface portion. The incomplete-toothed region surface is defined at its periphery by a chamfered edge that has a surface roughness of not larger than about 3.2 ?m. Also disclosed is a process of manufacturing the spline rolling tool, which includes a chamfering step of forming the chamfered edge by using a wire brush having abrasive grains that are fixed to bristles of the wire brush.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: March 22, 2011
    Assignees: Honda Motor Co., Ltd., OSG Corporation
    Inventors: Masahiko Igarashi, Hideo Watanabe, Nobuyoshi Asaga, Satoshi Komuro, Takeshi Mochizuki, Daisuke Sakurai, Manabu Igusa, Yoshihiro Umebayashi, Masahiro Oiwake
  • Patent number: 7775446
    Abstract: Card type information device includes wiring board having a wiring pattern with an electronic component mounted on a first face of wiring board and an antenna connecting electrode, antenna board having antenna pattern with antenna terminal electrode formed on a first face of antenna board, magnetic material placed between wiring board and antenna board confronting each other, flexible wiring board for coupling the antenna connecting electrode to antenna terminal electrode, and housing for accommodating wiring board, antenna board, magnetic material, and flexible wiring board. Wiring board and antenna board are made from one and the same insulating motherboard.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: August 17, 2010
    Assignee: Panasonic Corporation
    Inventors: Shozo Ochi, Osamu Uchida, Shigeaki Sakatani, Daisuke Sakurai, Masato Mori, Hiroshi Sakurai, Hidenobu Nishikawa
  • Patent number: 7768795
    Abstract: Electronic circuit device (100) is structured so that a substrate module unit that are formed by stacking substrate modules made of a first resin sheet with electronic component (190) embedded thereinto is inserted into housing (150) including connecting terminal (120), control circuit (130), and first wiring pattern (140), where the substrate modules are connected to each other electrically and mechanically. This electronic circuit device (100) dispenses with a mother substrate. Further, with slimming down of a substrate module, a substrate module unit with a large number of substrate modules stacked can be loaded in a limited packaging space, thus mounting greater storage capacity and higher functionality.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: August 3, 2010
    Assignee: Panasonic Corporation
    Inventors: Daisuke Sakurai, Masahiro Ono, Kazuhiro Nishikawa
  • Publication number: 20100190846
    Abstract: A method for suppressing the growth of microorganism comprises the steps of providing a microbicidal agent comprising 5,7,4?-trihydroxy-3?,5?-dimethoxyflavone, and contacting the agent with the microorganism, wherein said microorganism is selected from the group consisting of Salmonella sp., and Pseudomonas aeruginosa.
    Type: Application
    Filed: April 2, 2010
    Publication date: July 29, 2010
    Inventors: Yuuzou Tsuchida, Kotarou Tsuchida, Kunitomo Watanabe, Daisuke Sakurai, Mamoru Koketsu, Mitsuo Kawabe, Teruo Utsumi
  • Publication number: 20100148362
    Abstract: A semiconductor device includes an electronic part including an electrode, a substrate including a substrate electrode electrically connected to the first electrode on an upper surface thereof, the first substrate electrode and the first electrode being arranged, facing each other, a connecting member configured to connect the electrode with the substrate electrode, and a sealing material including a first resin portion which contains flux and contacts at least a connection portion between the connecting member and the substrate electrode, and a second resin portion which contains a lower concentration of flux than that of the first resin portion. A gap between the electronic part and the substrate is filled with the sealing film.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Applicant: Panasonic Corparation
    Inventor: Daisuke SAKURAI
  • Publication number: 20100121083
    Abstract: Provided is an antiviral agent with high antiviral activities and low side effects (cytotoxicity). Specifically provided is an antiviral agent comprising as an effective component at least one member selected from the group consisting of 5,7,4?-trihydroxy-3?,5?-dimethoxyflavone, 3-hydroxypyridine, p-hydroxybenzaldehyde and vanillin.
    Type: Application
    Filed: March 19, 2008
    Publication date: May 13, 2010
    Inventors: Yuuzou Tsuchida, Kunitomo Watanabe, Mamoru Koketsu, Tsugiya Murayama, Katarou Tsuchida, Daisuke Sakurai, Mitsuo Kawabe
  • Publication number: 20100052189
    Abstract: Electronic component mounting structure (1) comprising electronic component (10) provided with a plurality of electrode terminals (10a), mounting substrate (12) provided with connector terminals (12a) in positions corresponding to electrode terminals (10a), wherein electrode terminal (10a) is connected to connector terminal (12a) via protrusion electrode (13) disposed on electrode terminal (10a) or connector terminal (12a), and protrusion electrode (13) includes at least conductive filler (13a) and photosensitive resin (13b), and varies in resin component crosslink density of photosensitive resin (13b) in the height direction of protrusion electrode (13).
    Type: Application
    Filed: November 20, 2007
    Publication date: March 4, 2010
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Publication number: 20100029044
    Abstract: Conductive bump (17) formed on a surface of electrode terminal (11) of an electronic component. Conductive bump (17) is composed of at least a plurality of cured resin materials having different conductive filler densities. Thus, a short circuit and a connection failure due to crush of conductive bump (17) at the time of mounting can be prevented.
    Type: Application
    Filed: November 20, 2007
    Publication date: February 4, 2010
    Inventors: Yoshihiko Yagi, Daisuke Sakurai
  • Publication number: 20090315178
    Abstract: A conductive bump formed on an electrode surface of an electronic component. This conductive bump is composed of a plurality of photosensitive resin layers having different conductive filler contents. Consequently, this conductive bump is able to realize conflicting functions, namely, improvement in adhesion strength with the electrode and reduction of contact resistance.
    Type: Application
    Filed: March 4, 2008
    Publication date: December 24, 2009
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Publication number: 20090268423
    Abstract: Interconnect substrate (1) that connects at least the first circuit board and the second circuit board. Interconnect substrate (1) includes housing (1) and connecting terminal electrodes for connecting the top and bottom faces of housing (10). Housing (10) has protrusion (11) on its outer periphery and opening (13) in its inner periphery.
    Type: Application
    Filed: June 19, 2007
    Publication date: October 29, 2009
    Inventors: Daisuke Sakurai, Masato Mori, Yoshihiko Yagi
  • Publication number: 20090266582
    Abstract: A three-dimensional circuit board is formed by comprising a board, a first wiring-electrode group provided on a plurality of steps above the board, and a second wiring-electrode connected to the first wiring-electrode group at least in an altitude direction, in which at least a connecting portion between the first wiring-electrode group and the second wiring-electrode is integrated in a continuously identical shape.
    Type: Application
    Filed: January 12, 2007
    Publication date: October 29, 2009
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Publication number: 20090246474
    Abstract: An electronic component mounted structure is constituted by connecting together via a conductive adhesive 2 the electrode terminals 1a of a first electronic component such as a semiconductor element 1 and the electrode terminals 6a (here, projecting electrodes formed thereon) of a second electronic component such as a circuit substrate 6, and filling a molding resin 4 into a gap between the semiconductor element 1 and the circuit substrate 6. The molding resin 4 is composed of a low elasticity layer 3 and a high elasticity layer having higher elasticity than the low elasticity layer, and the low elasticity layer 3 lies adjacent to the whole of the outer surface of the conductive adhesive 2.
    Type: Application
    Filed: March 19, 2009
    Publication date: October 1, 2009
    Applicant: Panasonic Corporation
    Inventors: Daisuke Sakurai, Kazuya Usirokawa, Shozo Ochi
  • Publication number: 20090173795
    Abstract: Card type information device includes wiring board having a wiring pattern with an electronic component mounted on a first face of wiring board and an antenna connecting electrode, antenna board having antenna pattern with antenna terminal electrodes formed on a first face of antenna board, magnetic material placed between wiring board and antenna board confronting each other, flexible wiring board for coupling the antenna connecting electrode to antenna terminal electrode, and housing for accommodating wiring board, antenna board, magnetic material, and flexible wiring board. Wiring board and antenna board are made from one and the same insulating motherboard.
    Type: Application
    Filed: February 26, 2007
    Publication date: July 9, 2009
    Inventors: Shozo Ochi, Osamu Uchida, Shigeaki Sakatani, Daisuke Sakurai, Masato Mori, Hiroshi Sakurai, Hidenobu Nishikawa