Abstract: Mechanisms for communicating with an I/O device or endpoint using a queue data structure and pre-translated addresses associated with the queue data structure are provided. With the mechanisms, a device driver invokes device driver services for initializing address translation and protection table (ATPT) entries in a root complex for the queue data structure. The device driver services return untranslated addresses to the device driver which are in turn provided to the I/O device or endpoint. The I/O device or endpoint may then request a translation of these untranslated addresses and store them in the I/O device or endpoint prior to receiving an I/O operation targeting the queue data structure. The cached translation may be used to directly access the queue data structure from the I/O device or endpoint by bypassing the root complex's address translation facilities.

Abstract: Mechanisms for communicating with a memory registration enabled adapter, such as an InfiniBand™ host channel adapter, are provided. With the mechanisms, device driver services may be invoked by a device driver for initializing address translation entries in an address translation data structure of a root complex. An address of a device driver data buffer data structure and registration modifiers may be passed by the device driver to the device driver services. The device driver services may create address translation data structure entries in the address translation data structure associated with the root complex and memory registration (MR) address translation entries in a MR address translation data structure of the adapter. The MR address translation data structure may then be used with I/O operations to bypass the address translation data structure associated with the root complex.

Abstract: In a first aspect, a first method is provided for processing a request. The first method includes the steps of (1) receiving a request in first logic of a controller from a device master; (2) issuing a response to the device master to reissue the request at a later time; (3) notifying second logic of the controller of the request; (4) determining at least one of whether the request is valid and enough buffers are available to complete the request; (5) programming a filtering pipe; and (6) responding to the first logic based on at least one of whether the request is valid and enough buffers are available to complete the request such that the first logic may employ the filtering pipe to complete the request. The first logic operates in a first clock domain and second logic operates in a second clock domain. Numerous other aspects are provided.

Abstract: An apparatus and method for communicating with a network adapter using a queue data structure are provided. With the apparatus and method, a device driver invokes device driver services for initializing address translation and protection table (ATPT) entries in a root complex for the queue data structure. The device driver services return untranslated addresses to the device driver which are in turn provided to the network adapter. In response to retrieving a queue element from the queue data structure, the network adapter may request a translation of an untranslated address specified in the queue element and store the translated address in the network adapter prior to receiving a data packet targeting a buffer associated with the queue element.

Abstract: An apparatus and method for communicating with an I/O device or endpoint using a queue data structure and pre-translated addresses associated with the queue data structure are provided. With the apparatus and method, a device driver invokes device driver services for initializing address translation and protection table (ATPT) entries in a root complex for the queue data structure. The device driver services return untranslated addresses to the device driver which are in turn provided to the I/O device or endpoint. The I/O device or endpoint may then request a translation of these untranslated addresses and store them in the I/O device or endpoint prior to receiving an I/O operation targeting the queue data structure. The cached translation may be used to directly access the queue data structure from the I/O device or endpoint by bypassing the root complex's address translation facilities.

Abstract: In a first aspect, a first method is provided for processing a request. The first method includes the steps of (1) receiving a request in first logic of a controller from a device master; (2) issuing a response to the device master to reissue the request at a later time; (3) notifying second logic of the controller of the request; (4) determining at least one of whether the request is valid and enough buffers are available to complete the request; (5) programming a filtering pipe; and (6) responding to the first logic based on at least one of whether the request is valid and enough buffers are available to complete the request such that the first logic may employ the filtering pipe to complete the request. The first logic operates in a first clock domain and second logic operates in a second clock domain. Numerous other aspects are provided.

Abstract: An apparatus and method for communicating with an input/output (I/O) adapter configured to communicate with a locally attached I/O device are provided using cached address translations. With the apparatus and method, in response to receiving a storage transaction request, a queue element is created in a command queue specifying an untranslated buffer address. The queue element may be retrieved by the I/O adapter and a determination may be made as to whether the queue element contains a read operation command. If so, a translation request may be sent from the I/O adapter to a root complex at substantially a same time as the read operation command is sent to a locally attached external I/O device. The translated address corresponding to the untranslated address of the queue element may be returned and stored in the I/O adapter prior to receiving the data read from the external I/O device.

Abstract: An apparatus and method for splitting responsibilities for communicating with an endpoint between a device driver and device driver services are provided. With the apparatus and method, the device driver is responsible for managing queues for communicating requests between applications in a logical partition and the endpoint. The device driver further invokes memory management via device driver services. The device driver services are responsible for managing memory accessible by the endpoint, including the address translation and protection table (ATPT) or a root complex and the address translation caches (ATCs) of the endpoint. The device driver services may associate untranslated addresses for data structures used to communicate between a system image and the endpoint. The endpoint may request translations of the untranslated addresses and may cache the translations in the ATCs.

Abstract: An apparatus and method for communicating with a memory registration enabled adapter, such as an InfiniBand™ host channel adapter, are provided. With the apparatus and method, device driver services may be invoked by a device driver for initializing address translation entries in an address translation data structure of a root complex. An address of a device driver data buffer data structure and registration modifiers may be passed by the device driver to the device driver services. The device driver services may create address translation data structure entries in the address translation data structure associated with the root complex and memory registration (MR) address translation entries in a MR address translation data structure of the adapter. The MR address translation data structure may then be used with I/O operations to bypass the address translation data structure associated with the root complex.

Abstract: A method, apparatus, system, and signal-bearing medium are provided that in an embodiment receive a command at an adapter from an initiator that requests a transfer of data, transfer the data from the initiator to the adapter, and respond with a notification to the initiator that the command completed successfully after transferring the data to the adapter and prior to the adapter completing a process based on the command.

Abstract: A method, apparatus, system, and signal-bearing medium are provided that in an embodiment receive a command at an adapter from an initiator that requests a transfer of data, transfer the data from the initiator to the adapter, and respond with a notification to the initiator that the command completed successfully after transferring the data to the adapter and prior to the adapter completing a process based on the command.

Abstract: A write cache operation builder for use in building a write operation for writing data from a cache to a disk drive in a computer system is disclosed. The write cache operation builder is built from a CMS of a DASD. It converts the CMS entries of the CMS into a FIFO entry and scans the FIFO entry in order to calculate a write operation comprising the largest number of sectors of data. The write cache operation builder may be implemented via hardware or software.

Abstract: A data compression method and compression data structure are provided for a direct access storage device (DASD). The DASD is segmented into a plurality of compression groups. Each of the compression groups has a fixed logical size. A directory table is written within each of the compression groups. Each compression group has at least one compressed data region on which compressed data can be written and an exception region on which compressed data exceptions can be written. The compressed data exceptions include updated compressed data which exceeds an original storage space for corresponding original compressed data.

Abstract: A plurality of devices attached to a communications bus observe a burst transfer protocol which allows pausing only at pre-determined, fixed intervals of n data words, where a word is the width of the bus. In accordance with this protocol, once burst transfer is initialized the sending device transmits an uninterrupted stream of n data words over the communications bus, after which either the sender or receiver may cause transmission to pause. The sender may need to wait for more data, or the receiver may need to finish processing the data just received. The pause lasts as long as needed until both devices are ready to proceed. This cycle is repeated until the data transmission is complete. The sending and receiving devices do not relinquish control of the bus during a pause, and therefore are not required to re-initialize communications.

Abstract: A distributed directory structure and method are provided for writing directory information for compressed data on a direct access storage device (DASD). DASD includes a plurality of compression groups for storing compressed data. A micro directory table is written within each of the compression groups for the corresponding compressed data in the compression group. Compressed data and a directory update are written with a single write operation. A macro directory table is written in one area of the DASD. The macro directory table includes directory information used for translating a logical address to a physical base address for each compression group. The micro directory table includes directory information used for translating a logical address for a requested data page to a physical page address and page length within the compression group.