Patents by Inventor Darrell D. Truhitte

Darrell D. Truhitte has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10093468
    Abstract: A carrier tape system, in some embodiments, comprises: a tape; a series of index holes along a length of said tape; a series of pockets along said length; a first series of standoff units along said length; and a second series of standoff units along said length, wherein the series of pockets is positioned between the first series of standoff units and the second series of standoff units, wherein the standoff units create a clearance space between the bottom surfaces of said pockets and the tape when said tape is wound on a reel.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 9, 2018
    Assignee: Semiconductor Components Industries, LLC
    Inventor: Darrell D. Truhitte
  • Publication number: 20180174881
    Abstract: Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
    Type: Application
    Filed: January 30, 2018
    Publication date: June 21, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
  • Publication number: 20180145013
    Abstract: A leadless package with wettable flanks is formed by providing a substrate and plating a metal layer onto the substrate to form a contact on the substrate extending across a saw street. An encapsulant is deposited over the contact. The substrate is removed to expose the contact and encapsulant. The encapsulant and contact are singulated. In some embodiments, the substrate includes a ridge, and the contact is formed over the ridge.
    Type: Application
    Filed: November 21, 2016
    Publication date: May 24, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
  • Publication number: 20180053696
    Abstract: A method, in some embodiments, comprises: providing a component having first and second electrical nodes; determining that the component lacks multiple, functional electrical couplings between said first and second nodes; damaging at least part of the component as a result of said determination; and determining, as a result of said damage, that the component is defective.
    Type: Application
    Filed: August 18, 2016
    Publication date: February 22, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Darrell D. TRUHITTE, James P. LETTERMAN, JR.
  • Publication number: 20170334625
    Abstract: A carrier tape system, in some embodiments, comprises: a tape; a series of index holes along a length of said tape; a series of pockets along said length; a first series of standoff units along said length; and a second series of standoff units along said length, wherein the series of pockets is positioned between the first series of standoff units and the second series of standoff units, wherein the standoff units create a clearance space between the bottom surfaces of said pockets and the tape when said tape is wound on a reel.
    Type: Application
    Filed: May 18, 2016
    Publication date: November 23, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Darrell D. TRUHITTE
  • Patent number: 9659876
    Abstract: A method of wafer-scale marking includes coupling a first marking mask over a semiconductor wafer having unsingulated semiconductor devices thereon. The first marking mask has a plurality of first stencils therethrough and a surface of the wafer is plasma etched through the first stencils to form first markings in the surface. A second marking mask is coupled over the surface and includes a plurality of second stencils therethrough. The surface is plasma etched through the second stencils to form second markings in the surface. In implementations the first marking mask and second marking mask are simultaneously coupled over the surface and the first markings and second markings are simultaneously formed. In implementations a plurality of first windows of the first marking mask are aligned with the plurality of second stencils while a plurality of second windows of the second marking mask are aligned with the plurality of first stencils.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: May 23, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Darrell D. Truhitte
  • Publication number: 20170133302
    Abstract: A leadframe includes a frame, a die pad, a contact including a flank adjacent to the frame, a first tie bar between the frame and die pad, and a second tie bar between the die pad and contact. The leadframe is disposed over a carrier. A semiconductor die is disposed over the die pad. An encapsulant is deposited over the leadframe and semiconductor die including between the carrier and half-etched portions of the leadframe. A first trench is formed in the encapsulant to remove a portion of the frame and expose the flank of the contact. A conductive layer is formed over the flank by electroplating. A second trench is formed in the encapsulant through the second tie bar after forming the conductive layer.
    Type: Application
    Filed: January 25, 2017
    Publication date: May 11, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Darrell D. TRUHITTE, Soon Wei WANG, Chee Hiong CHEW
  • Patent number: 6852574
    Abstract: A method of forming a leadframe (10) provides blocking fulcrums (21,23) adjacent to the leads (12,13,14, and 15). During the process of encapsulating the leadframe (10), the blocking fulcrums (21,23) restrict encapsulating material from exiting the mold cavity and from attaching to the leads (12,13,14, and 15).
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: February 8, 2005
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Guan Keng Quah, Darrell D. Truhitte
  • Patent number: D504874
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: May 10, 2005
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Phillip Celaya, Darrell D. Truhitte, Michael J. Seddon
  • Patent number: D510728
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: October 18, 2005
    Assignee: Semiconductor Components Industries LLC
    Inventors: Phillip Celaya, Darrell D. Truhitte, Michael J. Seddon