Abstract: A closed system, spikeless, positive-flow valve device includes a body defining an internal cavity. At the proximal end of the body is an opening which is preferably sufficiently large to receive an ANSI standard tip of a medical implement. The valve includes a plastic, resilient silicon seal which fills the upper cavity and opening with an oval seal cap having a slit. The opening presses the oval seal cap to keep the slit closed in the decompressed state. The slit opens as the nose of the medical implement compresses the seal into the cavity and the seal cap is free from the opening. The housing also includes a fluid space which facilitates fluid flow between the medical implement and a catheter tip.

Abstract: A closed system, spikeless, positive-flow valve device includes a body defining an internal cavity. At the proximal end of the body is an opening which is preferably sufficiently large to receive an ANSI standard tip of a medical implement. The valve includes a plastic, resilient silicon seal which fills the upper cavity and opening with an oval seal cap having a slit. The opening presses the oval seal cap to keep the slit closed in the decompressed state. The slit opens as the nose of the medical implement compresses the seal into the cavity and the seal cap is free from the opening. The housing also includes a fluid space which facilitates fluid flow between the medical implement and a catheter tip.

Abstract: A computer system includes a main memory, at least one processor, and at least one level of cache. The system maintains reference history data with respect to each addressable page in memory, preferably in a page table. The reference history data is preferably used to determine which cacheable sub-units of the page should be pre-fetched to the cache. The reference history data is preferably an up or down counter which is incremented if the cacheable sub-unit is loaded into cache and is referenced by the processor, and decremented if the sub-unit is loaded into cache and is not referenced before being cast out. The reference counter thus expresses an approximate likelihood, based on recent history, that the sub-unit will be referenced in the near future.

Abstract: A seat belt retractor (10) has an actuator (14) for unlocking and locking the seat belt retractor (10). An inertial sensor (18) detects changes in vehicle acceleration and interacts with the actuator (14) to lock and unlock the seat belt retractor (10). The inertial sensor (18) has one inertial sensor mass, each mass (26, 27, 29, 30, 32, 33) has a wide portion (70) and a narrow portion (72). Preferably each inertial sensor mass (26, 27, 29, 30, 32, 33) has a high density body (31) embedded in the wide portion (70) of the elastomeric material (34). The inertial sensor mass (26, 27, 29, 30, 32, 33) has a greater density than the elastomeric material (34). Moreover, the elastomeric material (34) at least partially surrounds an exterior circumferential surface (38) of the inertial sensor mass (26, 27, 29, 30, 32, 33).

Abstract: A computer system includes a main memory, at least one processor, and at least one level of cache. The system contains at least one segment table having multiple segment entries recording the assignment of segments in an address space. At least some segment table entries include pre-fetch data indicating which portions of a segment should be pre-fetched. Preferably, a segment table entry contains a list of pages for pre-fetching. Preferably, pre-fetching a listed page causes address translation data for the page to be cached in at least one address translation caching structure. Pre-fetching may also cause data contents of the page to be loaded into a cache.

Abstract: Methods and apparatus are provided for eliminating hot spots on processor chips in a symmetric multiprocessor (SMP) computer system. Some operations, in particular, floating point multiply/add, repetitively utilize portions of a processor chip to the point that the average power of the affected portions exceeds cooling capabilities. The localized temperature of the affected portions can then exceed design limits. The current invention determines when a hot spot occurs and task swaps the task to another processor prior to the localized temperature becoming too hot. Moving of tasks to processors that have data affinity with the processor reporting a hot spot is considered. Further considerations include prioritizing unused processors and those processors that have not recently reported a hot spot.

Abstract: A web guide assembly has a D-ring to receive a seatbelt. The D-ring is attached to a support by a joint. The joint allows universal movement relative to the support. The web guide assembly may be part of a vehicle restraint system.

Abstract: Methods and apparatus are disclosed that provide for improved addressing of a register file in a computer system. The register file has one or more redundant words. A logical address in an instruction is mapped, during a predecode operation, to a physical address having a larger address space than the logical address. Addresses of nonfaulty words are mapped to the same word in the larger address space as the logical address. Logical addresses that point to faulty words are mapped to a redundant word that is in the larger address space but not in the address space of the logical address. Because all addresses presented to a register file decoder at access time point to nonfaulty words, no delay penalty associated with address compare during the access time is required.

Abstract: An apparatus and method for performing fast arithmetic operations, including addition, in a pipelined circuit is described. The apparatus and method operating on a first binary number and a second binary number comprise: a first arithmetic logic unit (ALU) operating on a first lower portion of the first binary number and a second lower portion of the second binary number to produce a first result and a carry out signal; and a second ALU operating on a first upper portion of the first binary number and a second upper portion of the second binary number to produce a second result; wherein at least a portion of the pipelined circuit stalls in response to the carry out signal. Another embodiment includes memory comprising a plurality of words, each word comprising data bits and a flag bit indicating a predetermined number of the most significant data bits are all zero.

Abstract: A height adjuster for a vehicle safety restraint has a web guide (38) and a track (84) for the web guide. The web guide (38) is vertically moveable along the track (84). A lock (76) has a lock condition for preventing vertical movement of the web guide (38) along the track (84) and an unlocked condition for allowing vertical movement of the web guide (38) along the track (84). A release mechanism (50, 80) is operatively connectable to said lock (76). The release mechanism (50, 80) has a release position for placing the lock (76) in the unlocked condition and an unreleased position from maintaining the lock (76) in the lock condition. A lift mechanism (66) at least partially assists vertical movement of the web guide (38) along the track (84) and biases the release mechanism (50, 80) toward the unreleased position.

Abstract: A method and apparatus for purging a cache line from an issuing processor and sending the cache line to the cache of one or more processors in a multi-processor shared memory computer system. The method and apparatus enables cache line data to be moved from one processor to another before the receiving processor needs the data thus preventing the receiving processor from incurring a cache miss event.

Abstract: A motorcycle is provided having front and rear wheels. A frame is supported on and connected to the front and rear wheels. The frame includes a rear swing frame pivotally connected to a front frame. A seat and an engine are mounted to the frame. The engine is disposed between the front and rear wheels. A radiator is mounted to the rear swing frame and is disposed between the engine and the rear wheel. A fan assembly is connected to the radiator and is disposed rearward of the radiator. An inner fender is disposed between the radiator and the rear wheel.

Abstract: Disclosed is a parity checking scheme for data forwarding of results from a first function unit to a second function unit. In one embodiment, the results of the first function unit are forwarded along a result forwarding bus to a destination parity generator at the second function unit. The destination parity generator generates destination parity bits for the forwarded results and sends the destination parity bits to a parity checking circuit at the second function unit. In addition, the results of the first function unit are sent to a source parity generator at the first function unit. The source parity generator generates source parity bits for the forwarded results and sends the source parity bits to the parity checking circuit at the second function unit via a parity forwarding bus. The parity checking circuit compares the source parity bits and the destination parity bits, and generates a parity error signal indicating whether result forwarding is with any error.

Abstract: Methods, apparatus, including computer program products, and systems implement and use techniques for rendering glyphs. A representation of a glyph is generated, the glyph to be rendered at a size on an output device having a device resolution. A bitmap representation of the glyph is generated using a first anti-aliasing process in a first direction and using a different second anti-aliasing process in a second direction.

Abstract: Methods, apparatus, including computer program products, and systems implement and use techniques for rendering glyphs. A plurality of glyphs to be rendered are received. For each glyph, an anti-aliasing procedure is selected to render the glyph. The anti-aliasing procedure is selected from a first anti-aliasing procedure and one or more alternative anti-aliasing procedures. The anti-aliasing procedure for each glyph is selected based on the glyph.

Abstract: Apparatus and method for performing fast arithmetic operations, including addition, in a pipelined circuit. In one embodiment, the apparatus comprises a plurality of gates, the critical path through the plurality of gates being three gates delays for some embodiments. The apparatus may comprise: a first level of logic for receiving at least two binary numbers and generating multi-bit P, G, Z, and K carry signals; a second level of logic receiving the multi-bit P, G, Z, and K carry signals and generating multi-bit section-based carry signals; and a third level of logic receiving the multi-bit section-based carry signals and generating a sum of the received binary numbers, the third level of logic comprising: a plurality of domino logic gates forming sum bits using the multi-bit section-based P, G, Z, and K carry signals.

Abstract: A wireless sensor and control system includes wireless RF transmitter units and one or more receivers that communicate using more than one narrowband radio channel to provide increased reliability in the presence of unintentional radio interference. The output of a sensor transducer or closure of a switch contact can trigger transmissions at two or more narrowband carrier frequencies that are subsequently decoded by the receiver(s). The remote sensor data can then be passed to another system for processing and/or utilized to control remote devices. In accordance with one practical embodiment, the remote sensor data indicates the ingress or egress of monitored product inventory.

Abstract: A motorcycle including a main frame, a rear swing frame, and a pull shock assembly operatively disposed between the main frame and the rear swing frame. The swing frame is pivotally mounted to the main frame. The main frame includes a pair of slide tracks that receive a slide member of the pull shock assembly. A link arm extends between a forward portion of the swing frame and the slide member, and translates pivotal movement of the swing frame into sliding longitudinal movement of the slide member. A damper associated with the slide member restricts sliding movement of the slide member and, thus, pivotal movement of the swing frame. The link has a forward end secured to the swing frame and a rearward end secured to the slide member.

Abstract: A motorcycle is provided having front and rear wheels. A chassis is supported on and connected to the front and rear wheels. An engine is mounted to the chassis and includes front and rear cylinder heads joined to an engine block. Front and rear mounting assemblies are provided for mounting the engine to the chassis. The rear mounting assembly includes a pair of laterally spaced-apart support plates secured between the engine and a top frame structure of the chassis. The support plates are disposed rearward of the rear cylinder head. A radiator is mounted to the chassis. A thermostat is connected between the engine and the radiator and is operable to control coolant flow from the engine to the radiator. The thermostat is disposed between the support plates.

Abstract: Methods, systems and apparatus for generating test patterns for selecting a transfer function of a display device. A method includes generating multiple simulated transfer functions for a display device, rendering multiple patterns of anti-aliased parallel lines on the display device, each pattern rendered according to a corresponding one of the simulated transfer functions and including off-vertical lines and off-horizontal lines, receiving an input from a user of the display device selecting one of the patterns rendered on the display device and setting a transfer function for the display device to the simulated transfer function representing the selected pattern, the transfer function characterizing a relationship between an applied input voltage and an output luminance for any given pixel on the display device.