Patents by Inventor David Hwang
David Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12550481Abstract: A device including an activated p-type layer comprising a III-Nitride based Mg-doped layer grown by vapor phase deposition or a growth method different from MBE. The p-type layer is activated through a sidewall of the p-type layer after the removal of defects from the sidewall thereby increasing a hole concentration in the p-type layer. In one or more examples, the device includes an active region between a first n-type layer and the p-type layer; a second n-type layer on the p-type layer; and a tunnel junction between the second n-type layer and the p-type layer, and the activated p-type layer has a hole concentration characterized by a current density of at least 100 Amps per centimeter square flowing between the first n-type layer and the second n-type layer in response to a voltage of 4 volts or less applied across the first n-type layer and the second n-type layer.Type: GrantFiled: February 28, 2022Date of Patent: February 10, 2026Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORIAInventors: David Hwang, Matthew S. Wong, Shuji Nakamura
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Publication number: 20260027655Abstract: A laser irradiation apparatus includes a first laser module emitting a first laser onto a substrate, and a second laser module emitting, onto the substrate, a second laser which is different from the first laser and includes a pulse laser. The first laser increases a temperature of the substrate to between a first temperature or higher and a second temperature or lower which is higher than the first temperature. The second laser is provided on the substrate for a time at which a temperature of the substrate is higher than the first temperature so as to heal a surface of the substrate.Type: ApplicationFiled: May 27, 2025Publication date: January 29, 2026Inventors: Seungkuk KUK, Insoo KIM, David HWANG
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Publication number: 20260013270Abstract: The present invention solves issues with microLED displays that use phosphors. A method to protect phosphor functionality in microLED displays during lamination includes depositing a protective bank with a transparent material before a phosphor coating. The method further includes having the protective bank acting as a barrier, so a top of the phosphor is below a top of the protective bank.Type: ApplicationFiled: October 6, 2023Publication date: January 8, 2026Applicant: VueReal Inc.Inventors: David HWANG, Hossein Zamani SIBONI, Gholamreza CHAJI
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Patent number: 12417092Abstract: The subject technology detects a code commit at a code repository. The subject technology sends a request for a build job to a build server. The subject technology determines that the build job is completed. The subject technology sends a training request and user token to a proxy authenticator. The subject technology determines determining that the user token is validated. The subject technology sends a training request and the user token to a training job manager. Further, the subject technology determines determining that the training job is completed.Type: GrantFiled: September 26, 2023Date of Patent: September 16, 2025Assignee: STRIPE, INC.Inventors: William Story, David Hwang
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Publication number: 20250157861Abstract: The present invention relates to the inspection process which includes providing access to the microdevice contacts, measuring the microdevice and analyzing the data to identify defects or performance of the micro device. The invention also relates to the forming of test electrodes on microdevices. The test electrodes may be connected to hidden contacts. The type of microdevices may be vertical, lateral or a flip chip.Type: ApplicationFiled: January 16, 2025Publication date: May 15, 2025Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI, David HWANG
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Patent number: 12237236Abstract: The present invention relates to the inspection process which includes providing access to the microdevice contacts, measuring the microdevice and analyzing the data to identify defects or performance of the micro device. The invention also relates to the forming of test electrodes on microdevices. The test electrodes may be connected to hidden contacts. The type of microdevices may be vertical, lateral or a flip chip.Type: GrantFiled: July 15, 2021Date of Patent: February 25, 2025Assignee: VueReal Inc.Inventors: Gholamreza Chaji, Ehsanollah Fathi, Hossein Zamani Siboni, David Hwang
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Publication number: 20250056828Abstract: Some implementations herein provide for a memory device and methods of formation. The memory device includes a plurality of storage cells arranged vertically and a plurality of corresponding gate all around transistors. Methods of forming the memory device include using a single trench to remove a liner material and form recesses that define cell contact lightly-doped drain regions of the gate all around transistors. Using the single trench to remove the liner material and form the recesses that define the cell contact lightly-doped drain region widths causes the cell contact lightly-doped drain regions to be formed having substantially similar widths.Type: ApplicationFiled: July 24, 2024Publication date: February 13, 2025Inventors: Si-Woo LEE, Yuichi YOKOYAMA, Scott E. SILLS, Gautham MUTHUSAMY, David HWANG, Yoshitaka NAKAMURA, Pavani Vamsi Krishna NITTALA, Yuanzhi MA, Glen H. WALTERS, Haitao LIU, Kamal M. KARDA
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Patent number: 12021168Abstract: Disclosed herein are systems and methods for reducing surface recombination losses in micro-LEDs. In some embodiments, a method of forming an LED involves forming a semiconductor structure on a substrate. The semiconductor structure includes a p-side semiconductor layer, an n-side semiconductor layer, and an active light emitting layer between the p-side semiconductor layer and the n-side semiconductor layer. The semiconductor structure is also formed to include a light outcoupling surface facing the substrate. The light outcoupling surface has a diameter less than twice an electron diffusion length of a material of the semiconductor structure. The method further involves implanting ions in an outer region of the semiconductor structure, then annealing the outer region after the ions have been implanted. The annealing causes the ions to intermix with atoms within the outer region, thereby increasing a bandgap of the outer region.Type: GrantFiled: January 27, 2023Date of Patent: June 25, 2024Assignee: META PLATFORMS TECHNOLOGIES, LLCInventors: Thomas Lauermann, Stephan Lutgen, David Hwang
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Publication number: 20240145625Abstract: A device including an activated p-type layer comprising a III-Nitride based Mg-doped layer grown by vapor phase deposition or a growth method different from MBE. The p-type layer is activated through a sidewall of the p-type layer after the removal of defects from the sidewall thereby increasing a hole concentration in the p-type layer. In one or more examples, the device includes an active region between a first n-type layer and the p-type layer; a second n-type layer on the p-type layer; and a tunnel junction between the second n-type layer and the p-type layer, and the activated p-type layer has a hole concentration characterized by a current density of at least 100 Amps per centimeter square flowing between the first n-type layer and the second n-type layer in response to a voltage of 4 volts or less applied across the first n-type layer and the second n-type layer.Type: ApplicationFiled: February 28, 2022Publication date: May 2, 2024Applicant: The Regents of the University of CaliforniaInventors: David Hwang, Matthew S. Wong, Shuji Nakamura
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Publication number: 20240020114Abstract: The subject technology detects a code commit at a code repository. The subject technology sends a request for a build job to a build server. The subject technology determines that the build job is completed. The subject technology sends a training request and user token to a proxy authenticator. The subject technology determines determining that the user token is validated. The subject technology sends a training request and the user token to a training job manager. Further, the subject technology determines determining that the training job is completed.Type: ApplicationFiled: September 26, 2023Publication date: January 18, 2024Inventors: William STORY, David HWANG
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Publication number: 20230395560Abstract: This disclosure is related to integrating microdevices into a system substrate. In particular the microdevices are transferred from a donor substrate into a system backplane where the microdevices connection pads are adhered to a pads on the system substrate at a temperature that is below the melting point of the materials on the pads of the system substrate and microdevice pads. The present disclosure also relates to integrating vertical microdevices into a system substrate. The system substrate can have a backplane circuit as well. The integration covers the microdevices with dielectrics and couples the backplane through a VIA. The disclosure further relates to a method and structure of microdevice or optoelectronic devices that allows for misalignment adjustment. The microdevices comprise a stack of semiconductor layers that in configuration with electrodes, substrate, VIA's and size factors minimize misalignment.Type: ApplicationFiled: September 2, 2021Publication date: December 7, 2023Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI, Lauren LESERGENT, David HWANG, Pranav GAVIRNENI
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Patent number: 11809863Abstract: The subject technology detects a code commit at a code repository. The subject technology sends a request for a build job to a build server. The subject technology determines that the build job is completed. The subject technology sends a training request and user token to a proxy authenticator. The subject technology determines determining that the user token is validated. The subject technology sends a training request and the user token to a training job manager. Further, the subject technology determines determining that the training job is completed.Type: GrantFiled: November 8, 2021Date of Patent: November 7, 2023Assignee: Stripe, Inc.Inventors: William Story, David Hwang
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Publication number: 20230260856Abstract: The present invention relates to the inspection process which includes providing access to the microdevice contacts, measuring the microdevice and analyzing the data to identify defects or performance of the micro device. The invention also relates to the forming of test electrodes on microdevices. The test electrodes may be connected to hidden contacts. The type of microdevices may be vertical, lateral or a flip chip.Type: ApplicationFiled: July 15, 2021Publication date: August 17, 2023Applicant: VueReal Inc.Inventors: Gholamreza CHAJI, Ehsanollah FATHI, Hossein Zamani SIBONI, David HWANG
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Patent number: 11677042Abstract: Disclosed herein are methods, systems, and apparatuses for an light emitting diode (LED) array apparatus. In some embodiments, the LED array apparatus may include a plurality of mesas etched from a layered epitaxial structure. The layered epitaxial structure may include a P-type doped semiconductor layer, a active layer, and an N-type doped semiconductor layer. The LED array apparatus may also include one or more regrowth semiconductor layers, including a first regrowth semiconductor layer, which may be grown epitaxially over etched facets of the plurality of mesas. In some cases, for each mesa, the first regrowth semiconductor layer may overlay etched facets of the P-type doped semiconductor layer, the active layer, and the N-type doped semiconductor layer, around an entire perimeter of the mesa.Type: GrantFiled: March 29, 2020Date of Patent: June 13, 2023Assignee: META PLATFORMS TECHNOLOGIES, LLCInventors: Markus Broell, Michael Grundmann, David Hwang, Stephan Lutgen, Brian Matthew Mcskimming, Anurag Tyagi
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Patent number: 11581457Abstract: Disclosed herein are systems and methods for reducing surface recombination losses in micro-LEDs. In some embodiments, a method includes increasing a bandgap in an outer region of a semiconductor layer by implanting ions in the outer region of the semiconductor layer and subsequently annealing the outer region of the semiconductor layer to intermix the ions with atoms within the outer region of the semiconductor layer. The semiconductor layer includes an active light emitting layer. A light outcoupling surface of the semiconductor layer has a diameter that is less than twice an electron diffusion length of the semiconductor layer. The outer region of the semiconductor layer extends from an outer surface of the semiconductor layer to a central region of the semiconductor layer that is shaded by a mask during the implanting of the ions.Type: GrantFiled: April 27, 2021Date of Patent: February 14, 2023Assignee: Meta Platforms Technologies, LLCInventors: Thomas Lauermann, Stephan Lutgen, David Hwang
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Publication number: 20220075617Abstract: The subject technology detects a code commit at a code repository. The subject technology sends a request for a build job to a build server. The subject technology determines that the build job is completed. The subject technology sends a training request and user token to a proxy authenticator. The subject technology determines determining that the user token is validated. The subject technology sends a training request and the user token to a training job manager. Further, the subject technology determines determining that the training job is completed.Type: ApplicationFiled: November 8, 2021Publication date: March 10, 2022Inventors: William Story, David Hwang
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Patent number: 11216273Abstract: The subject technology detects a code commit at a code repository. The subject technology sends a request for a build job to a build server. The subject technology determines that the build job is completed. The subject technology sends a training request and user token to a proxy authenticator. The subject technology determines determining that the user token is validated. The subject technology sends a training request and the user token to a training job manager. Further, the subject technology determines determining that the training job is completed.Type: GrantFiled: September 8, 2020Date of Patent: January 4, 2022Assignee: Stripe, Inc.Inventors: William Story, David Hwang
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Publication number: 20210193871Abstract: A reduction in leakage current and an increase in efficiency of III-nitride LEDs is obtained by sidewall passivation using atomic layer deposition of a dielectric. Atomic layer deposition is a hydrogen-free deposition method, which avoids problems associated with the effects of hydrogen on passivation and transparency.Type: ApplicationFiled: October 31, 2018Publication date: June 24, 2021Applicant: The Regents of the University of CaliforniaInventors: Matthew S. Wong, David Hwang, Abdullah Alhassan, Steven P. DenBaars
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Patent number: 11018280Abstract: Disclosed herein are systems and methods for reducing surface recombination losses in micro-LEDs. In some embodiments, a method includes increasing a bandgap in an outer region of a semiconductor layer by implanting ions in the outer region of the semiconductor layer and subsequently annealing the outer region of the semiconductor layer to intermix the ions with atoms within the outer region of the semiconductor layer. The semiconductor layer includes an active light emitting layer. A light outcoupling surface of the semiconductor layer has a diameter of less than 10 ?m. The outer region of the semiconductor layer extends from an outer surface of the semiconductor layer to a central region of the semiconductor layer that is shaded by a mask during the implanting of the ions.Type: GrantFiled: February 25, 2020Date of Patent: May 25, 2021Assignee: FACEBOOK TECHNOLOGIES, LLCInventors: Thomas Lauermann, Stephan Lutgen, David Hwang
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Publication number: 20210126164Abstract: A light source includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the p-type semiconductor layer and the n-type semiconductor layer and configured to emit light. The active region includes a plurality of barrier layers and one or more quantum well layers. The plurality of barrier layers of the active region includes at least one n-doped barrier layer that includes an n-type dopant. The active region is characterized by a lateral linear dimension equal to or less than about 10 ?m. The n-type dopant includes, for example, silicon, selenium, or tellurium.Type: ApplicationFiled: October 27, 2020Publication date: April 29, 2021Inventors: Markus BROELL, David HWANG, Steven David LESTER, Anurag TYAGI, Michael GRUNDMANN, Guillaume LHEUREUX, Alexander TONKIKH