Patents by Inventor David Hwang

David Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190207043
    Abstract: A physical vapor deposition (e.g., sputter deposition) method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and electron cyclotron resonance (ECR) sputtering to grow one or more tunnel junctions. In another method, the surface of the p-type layer is treated before deposition of the tunnel junction on the p-type layer. In yet another method, the whole device (including tunnel junction) is grown using MOCVD and the p-type layers of the III-nitride material are reactivated by lateral diffusion of hydrogen through mesa sidewalls in the III-nitride material, with one or more lateral dimensions of the mesa that are less than or equal to about 200 ?m. A flip chip display device is also disclosed.
    Type: Application
    Filed: August 17, 2017
    Publication date: July 4, 2019
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Benjamin P. Yonkee, Asad J. Mughal, David Hwang, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20190189512
    Abstract: A first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is on the first insulating layer. A second metallization layer comprises a set of second conductive lines on a third insulating layer and on the second insulating layer above the first metallization layer. The set of second conductive lines extend along a second direction that crosses the first direction at an angle. A via between the first metallization layer and the second metallization layer. The via is self-aligned along the second direction to one of the first conductive lines.
    Type: Application
    Filed: February 11, 2019
    Publication date: June 20, 2019
    Inventors: Ying Zhang, Abhijit Basu Mallick, Regina Freed, Nitin K. Ingle, Uday Mitra, Ho-yung David Hwang
  • Publication number: 20190189510
    Abstract: Methods of forming a self-aligned via comprising recessing a first metallization layer comprising a set of first conductive lines that extend along a first direction on a first insulating layer on a substrate. A second insulating layer is formed on the first insulating layer. A via is formed through the second insulating layer to one of the first conductive lines. Semiconductor devices comprising the self-aligned via and apparatus for forming the self-aligned via are also disclosed.
    Type: Application
    Filed: December 11, 2018
    Publication date: June 20, 2019
    Inventors: Yung-Chen Lin, Qingjun Zhou, Ying Zhang, Ho-yung David Hwang, Uday Mitra, Regina Freed
  • Patent number: 10317955
    Abstract: A portable computing device includes at least a base portion of a lightweight material that includes at least a wedge shaped top case having a trough formed at an interfacing edge thereof. The trough includes a raised portion having a first contact surface and a receiving area, and a bottom case coupled to the top case to form a complete housing for at least a portion of the portable computing device for enclosing at least a plurality of operational components and a plurality of structural components. The portable computing device also includes at least a lid portion pivotally connected to the base portion by a hinge assembly. In the described embodiments, the lid portion has a display in communication with one or more of the plurality of components in the base portion by way of or more electrical conductors that electrically connect the base portion to the lid portion.
    Type: Grant
    Filed: July 7, 2018
    Date of Patent: June 11, 2019
    Assignee: APPLE INC.
    Inventors: Brett W. Degner, Euan Abraham, John M. Brock, Matthew P. Casebolt, Robert L. Coish, Laura M. DeForest, Michelle Goldberg, Bradley Joseph Hamel, Ron Hopkinson, Jim Hwang, Caitlin E. Kalinowski, Steven Keiper, Patrick Kessler, Eugene Kim, Chris Ligtenberg, Jay K. Osborn, John Raff, Nicholas A. Rundle, David J. Yeh
  • Publication number: 20190169212
    Abstract: Disclosed is a Silicon Precursor Compound for deposition, the Silicon Precursor Compound comprising a compound which is a disilane and which comprises at least one chloro group, at least one dialkylamino group and at least one hydrido group. A composition for film forming is also disclosed, the composition comprising the Silicon Precursor Compound and at least one of an inert gas, molecular hydrogen, a carbon precursor, a nitrogen precursor, and an oxygen precursor. Further disclosed is a process of synthesizing the Silicon Precursor Compound; a method of forming a silicon-containing film on a substrate using the Silicon Precursor Compound; the silicon-containing film formed thereby; and a method of forming the Silicon Precursor Compound.
    Type: Application
    Filed: May 15, 2017
    Publication date: June 6, 2019
    Inventors: Noel CHANG, Byung K. HWANG, Brian David REKKEN, Xiaobing ZHOU
  • Patent number: 10274839
    Abstract: A method for controlling semiconductor production through use of a Focus Exposure Matrix (FEM) model includes taking measurements of characteristics of a two-dimensional mark formed onto a substrate, the two-dimensional mark including two different patterns along two different cut-lines, and comparing the measurements with a FEM model to determine focus and exposure conditions used to form the two-dimensional mark. The FEM model was created using measurements taken of corresponding two-dimensional marks formed onto a substrate under varying focus and exposure conditions.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Zhan Zhou, Heng-Jen Lee, Chen-Ming Wang, Kai-Hsiung Cheng, Chih-Ming Ke, Ho-Yung David Hwang
  • Publication number: 20190067102
    Abstract: Methods and apparatus to form fully self-aligned vias are described. A first metal film is formed in the recessed first conductive lines and on the first insulating layer of a substrate comprising alternating conductive lines and a first insulating layer. Pillars and a sheet are formed from the first metal film. Some of the pillars and a portion of the sheet are selectively removed and a second insulating layer is deposited around the remaining pillars and sheet. The remaining pillars and sheet are removed to form vias and a trench in the second insulating layer. A third insulating layer is deposited in the vias and trench and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer.
    Type: Application
    Filed: August 29, 2018
    Publication date: February 28, 2019
    Inventors: Ying Zhang, Abhijit Basu Mallick, Yung-Chen Lin, Qingjun Zhou, He Ren, Ho-yung David Hwang, Uday Mitra
  • Patent number: 10209477
    Abstract: A micro-optics assembly and a method for assembling the micro-optics assembly are provided. The micro-optics assembly may include an optical bench having an opening, a cylindrical body disposed in the opening and having a solder well, a heating element thermally coupled to the solder well, and an optical element. The optical element may include a frame having a post and a micro-optic mounted in the frame. The post may be secured in a solid solder material disposed within the solder well in the cylindrical body. The solder may be reflowable such that the micro-optics assembly is reconfigurable without the need for optical realignment components permanently mounted to the optical bench.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: February 19, 2019
    Assignee: Lockheed Martin Coherent Technologies, Inc.
    Inventors: David Hwang, Andrew Jonathan Gleason, Michael L. Tartaglia
  • Publication number: 20180306514
    Abstract: A method includes supporting a wafer on a heating element, wherein the heating element is located in a baking chamber. The method further includes heating the wafer for a first duration using the heating element. The method further includes measuring a temperature of the heating element and a temperature of the wafer during the first duration to obtain temperature information. The method further includes adjusting an amount of heat provided by the heating element during the first duration, wherein the adjusting of the amount of heat includes decreasing the amount of heat provided by the heating element as a rate of change of the temperature information versus time increases.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Tzung-Chen WU, Wen-Zhan ZHOU, Heng-Jen LEE, Ho-Yung David HWANG
  • Patent number: 10006717
    Abstract: An adaptive baking system includes a baking chamber configured to receive a wafer, and a heating element configured to support the wafer. The adaptive baking system further includes a controller configured to receive temperature information related to the heating element and the wafer, wherein the controller is further configured to adjust an amount of heat provided by the heating element during a baking process in response to the temperature information.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: June 26, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzung-Chen Wu, Wen-Zhan Zhou, Heng-Jen Lee, Ho-Yung David Hwang
  • Publication number: 20180083145
    Abstract: Methods of curing anti-reflective coatings, and photovoltaic modules produced using the methods, are described. The methods can include liquid metal curing, plasma curing, air knife curing, and flame curing.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 22, 2018
    Applicant: First Solar, Inc.
    Inventors: Brian Cohen, David Hwang, Mark Lewis, Gopal Mor, Nathan Martin Schuh, Frank Xia, Yu Yang, Zhibo Zhao
  • Publication number: 20180067395
    Abstract: A photolithography system includes a variable-volume buffer tank, a dispensing system connected to the buffer tank, and a valve configured to release gas from a head space of the buffer tank while blocking the release of liquid from the head space. A storage container has an opening at the bottom and drains to the buffer tank through that opening. The buffer tank has a storage capacity sufficient to receive the full contents of the storage container. The system supplies chemical solutions to the dispensing system while keeping the chemical solutions from contact with air and other gases.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventors: Wen-Zhan Zhou, Heng-Jen Lee, Hsu-Yuan Liu, Yu-Chen Huang, Cheng-Han Wu, Shih-Che Wang, Ho-Yung David Hwang
  • Patent number: 9817315
    Abstract: A photolithography system includes a variable-volume buffer tank, a dispensing system connected to the buffer tank, and a valve configured to release gas from a head space of the buffer tank while blocking the release of liquid from the head space. A storage container has an opening at the bottom and drains to the buffer tank through that opening. The buffer tank has a storage capacity sufficient to receive the full contents of the storage container. The system supplies chemical solutions to the dispensing system while keeping the chemical solutions from contact with air and other gases.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: November 14, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Zhan Zhou, Heng-Jen Lee, Hsu-Yuan Liu, Yu-Chen Huang, Cheng-Han Wu, Shih-Che Wang, Ho-Yung David Hwang
  • Publication number: 20170236807
    Abstract: III-V micro light-emitting diodes (LEDs) are fabricated using a photoelectrochemical (PEC) etch. A sacrificial layer and III-V device layers are epitaxially grown on a host substrate, wherein the III-V device layers are patterned to form the micro-LEDs. The sacrificial layer is removed by a photoelectrochemical (PEC) etch, so as to fully or partially separate the micro-LEDs from the substrate, before or after the micro-LEDs are bonded to a submount or intermediate substrate. The micro-LEDs may be bonded to a submount with a polymer film deposited thereon, wherein the polymer film with the micro-LEDs is subsequently delaminated from the submount. Alternatively, the intermediate substrate may be a transfer medium, wherein the micro-LEDs are separated from the host substrate by mechanical fracturing, and then bonded to a second substrate, after which the intermediate substrate is removed, wherein a third substrate may be bonded to exposed surfaces of the transferred micro-LEDs.
    Type: Application
    Filed: April 28, 2017
    Publication date: August 17, 2017
    Applicant: The Regents of the University of California
    Inventors: David Hwang, Nathan G. Young, Ben Yonkee, Burhan K. Saifaddin, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 9690212
    Abstract: A method for controlling semiconductor production through use of a hybrid Focus Exposure Matrix (FEM) model includes taking measurements of a set of structures formed onto a substrate. The method further includes using a FEM model to determine focus and exposure conditions used to form the structure The model was created through use of measurements of structures formed on a substrate under varying focus and exposure conditions, the measurements being taken using both an optical measurement tool and a scanning electron microscope.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: June 27, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Zhan Zhou, Heng-Jen Lee, Yen-Liang Chen, Kai-Hsiung Chen, Chih-Ming Ke, Ho-Yung David Hwang
  • Publication number: 20170133246
    Abstract: A method and apparatus for forming a crystalline cadmium stannate layer of a photovoltaic device by heating an amorphous layer in the presence of hydrogen gas.
    Type: Application
    Filed: December 28, 2015
    Publication date: May 11, 2017
    Inventors: Benyamin Buller, Markus Gloeckler, David Hwang, Rui Shao, Zhibo Zhao
  • Patent number: 9645349
    Abstract: A compact LIDAR pointing assembly can comprise a body, first and second ferrules, and a clip component that can be used to maintain an engagement between the first and second ferrules and an alignment of light emanating from the first and second ferrules relative to received light propagating along an optical axis of the assembly. The ferrules can be pivoted to adjust the orientation of the light emanating from the ferrules.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: May 9, 2017
    Assignee: LOCKHEED MARTIN COHERENT TECHNOLOGIES, INC.
    Inventors: David Hwang, Jesse William Fisher
  • Patent number: 9406829
    Abstract: A method to improve operation of a CdTe-based photovoltaic device is disclosed, the method comprising the steps of depositing a semiconductor absorber layer adjacent to a substrate, depositing a semiconductor buffer layer adjacent to the semiconductor layer, and annealing at least one of the semiconductor absorber layer and the semiconductor buffer layer with one of a laser and a flash lamp.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: August 2, 2016
    Assignee: First Solar, Inc.
    Inventors: Pratima Addepalli, Benyamin Buller, Markus Gloeckler, Akhlesh Gupta, David Hwang, Andrei Los, Rick Powell, Rui Shao, Gang Xiong, Ming Lun Yu, San Yu, Zhibo Zhao
  • Patent number: 9264344
    Abstract: A method and apparatus for providing a route recommendation are disclosed. For example, the method obtains network topology information, wherein the network topology information comprises a plurality of underlying subnetwork types for a network. The method creates a cost model for the network, and receives a request from a user for a connection to be supported by the network. The method provides the route recommendation for supporting the connection by applying the cost model.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: February 16, 2016
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: Guangzhi Li, Angela Lan Chiu, Chris Dailey, Robert Duncan Doverspike, Monica Naukam Gerhardstein, Dah-Min David Hwang, Dongmei Wang, Dahai Xu
  • Patent number: 9263095
    Abstract: A memory array having memory cells and methods of forming the same. The memory array may have a buried digit line formed in a first horizontal planar volume, a word line formed in a second horizontal planar volume above the first horizontal planar volume and storage devices formed on top of the vertical access devices, such as finFETs, in a third horizontal planar volume above the second horizontal planar volume. The memory array may have a 4F2 architecture, wherein each memory cell includes two vertical access devices, each coupled to a single storage device.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: February 16, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Kunal Parekh, David Hwang, Wen Kuei Huang, Kuo Chen Wang, Ching Kai Lin