Patents by Inventor David Lin

David Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9413568
    Abstract: According to at least one example embodiment a two phase calibration approach is employed for calibrating an input/output interface having multiple single-ended receivers. During a first phase, amplifier offset calibration is applied to each of the multiple single-ended receivers. During a second phase, reference voltage calibration is applied to a single-ended receiver of the multiple single-ended receivers to determine a calibration reference voltage value. The calibration reference voltage value is then employed in each of the multiple single-ended receivers during an active phase of the input/output interface.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: August 9, 2016
    Assignee: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Patent number: 9349434
    Abstract: A method of sampling data signals in response to a timing signal includes receiving data signals that are skewed relative to each other. Each data signal has a valid-data window having an extent such that, when a data signal is received, an invisible portion of the valid-data window is outside an observation window and a visible portion of the valid-data window is inside the observation window. The method further includes, for each of the data signals, identifying a designated location within the valid-data window that is part way across the extent of the valid-data window, and for each of the data signals, aligning the data signal such that the designated location aligns with the timing signal.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: May 24, 2016
    Assignee: Cavium, Inc.
    Inventors: David Lin, Edward Wade Thoenes
  • Publication number: 20160141013
    Abstract: An apparatus for controlling memory includes a memory controller, and a data interface that interfaces with and is in data communication with data lines, each having inherent skew. Each data line carries a data signal. The data lines connect the memory controller to the memory. The apparatus also includes data de-skewers, each associated with a corresponding data line, a strobe interface that interfaces with a strobe line that connects the memory controller to the memory and that applies a timing signal to the strobe line, and a strobe de-skewer connected to the strobe line. Each data de-skewer operates in read or write mode. A particular data line's data de-skewer applies a compensation skew to a data signal carried by that line.
    Type: Application
    Filed: March 30, 2015
    Publication date: May 19, 2016
    Inventors: David Lin, Edward Wade Thoenes
  • Publication number: 20160141012
    Abstract: An apparatus for controlling memory includes a memory controller, and an interface to data lines connecting it to memory. Each line carries a signal that corresponds to a bit to be written to memory. The interface includes, for each line, circuitry for transmitting a bit to memory via the line, and a data de-skewer. For each line, the de-skewer receives a first data signal that represents a bit to be written. Each line has an inherent skew. The de-skewer generates a second data signal by applying a skew to the first. A selected extent of skew increases a likelihood of sampling the second data signal during a data-valid window thereof. The same de-skewer receives and skews a first data bit read from the memory.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 19, 2016
    Inventors: David Lin, Edward Wade Thoenes, Thucydides Xanthopoulos
  • Patent number: 9327209
    Abstract: A separations tray assembly for use in a fluid-fluid exchange column. The separations tray assembly is of the type where a first fluid, in a continuous phase, is directed across successive trays in a serpentine flow path. A second fluid, in a dispersed phase ascends through apertures in the tray thus inducing interaction and mass transfer with the first fluid. In accordance with one aspect of the present invention, the separations tray further includes a diffuser skirt, having apertures disposed therein, operatively coupled to a fluid channel. The diffuser skirt is operable to direct the first fluid to cover substantially an entire volumetric cross-flow window between successive separations trays and to induce stirring and mixing of the first fluid and the second fluid to effect efficient mass transfer.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: May 3, 2016
    Assignee: GTC Technology US, LLC
    Inventors: Ian G. Buttridge, David Lin, Casey F. Bowles, SooWoong Kim, Michael J. Binkley
  • Patent number: 9306584
    Abstract: A delay circuit provides a quadrature-delayed strobe, a tightly controlled quadrature DLL and write/read leveling delay lines by using the same physical delay line pair. By multiplexing different usage models, the need for multiple delay lines is significantly reduced to only two delay lines per byte. As a result, the delay circuit provides substantial saving in terms of layout area and power.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: April 5, 2016
    Assignee: Cavium, Inc.
    Inventors: David Lin, Suresh Balasubramanian
  • Patent number: 9281034
    Abstract: In an embodiment, a method of generating strobe signals includes generating a first strobe signal in a first mode by operating a multiplexer with a clock signal to select between a first input signal and a second input signal, the first input signal having a static first signal level and the second input signal corresponding to a control signal. In a second mode, the method includes generating a second strobe signal by operating the multiplexer with the clock signal to select between the first input signal and the second input signal, the first input signal corresponding to the control signal inverted and delayed and the second input signal having a static second signal level.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: March 8, 2016
    Assignee: Cavium, Inc.
    Inventor: David Lin
  • Patent number: 9263151
    Abstract: A memory interface enables AC characterization under test conditions without requiring the use of Automated Test Equipment (ATE) and functional patterns. The memory controller may be configured to generate output patterns through the test interface and create a loopback path for input specification testing using an external stressed-eye random number generator and checker. As a result, the memory interface may be evaluated for electrical and timing specifications under a relatively simple test setup and test procedure through the test interface (JTAG), as opposed to a complex processor program that sets up a similar memory access pattern on Automated Test Equipment (ATE).
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: February 16, 2016
    Assignee: Cavium, Inc.
    Inventors: Thucydides Xanthopoulos, David Lin
  • Publication number: 20150347681
    Abstract: A method for processing Health Level 7 (HL7) data may involve: receiving multiple HL7 data feeds from multiple distinct locations; mapping data contained in the multiple HL7 data feeds; entering the data from the multiple HL7 data feeds into a non-relational database; performing initial indexing of the data; using the data to perform analytic tasks; and performing indexing functions on previously stored HL7 data.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 3, 2015
    Inventors: Rush L. BARTLETT, II, David LIN, Ryan J.F. VAN WERT, Frank T. WANG
  • Publication number: 20150294068
    Abstract: A method for providing access to patient information from within an electronic medical record may involve: receiving, from a user, at least one piece of identifying information, identifying the user as a person authorized to access the patient information; providing an encrypted link on an electronic medical record of the patient, wherein the encrypted link is preloaded with the at least one piece of identifying information and a patient medical record number corresponding to the patient; decrypting the encrypted link in response to the user clicking on the encrypted link, without requiring the user to provide any further identifying information; and providing the patient information to the user via a secure web site, in response to the user clicking on the link.
    Type: Application
    Filed: April 13, 2015
    Publication date: October 15, 2015
    Inventors: Rush L. BARTLETT, II, David Lin, Ryan J.F. Van Wert, Frank T. Wang, Jack Yeh
  • Patent number: 9143140
    Abstract: A delay circuit provides a quadrature-delayed strobe, a tightly controlled quadrature DLL and write/read leveling delay lines by using the same physical delay line pair. By multiplexing different usage models, the need for multiple delay lines is significantly reduced to only two delay lines per byte. As a result, the delay circuit provides substantial saving in terms of layout area and power.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: September 22, 2015
    Assignee: Cavium, Inc.
    Inventors: David Lin, Suresh Balasubramanian
  • Patent number: 9087567
    Abstract: According to at least one example embodiment, a method and corresponding system for calibrating an amplifier offset include applying an input value to both input leads of an amplifier. The amplifier includes one or more digital-to-analog converters (DACs) used to calibrate an offset of the amplifier. A digital value, provided as input to the DAC, is updated over a number of iterations, by a control logic coupled to the amplifier, based on an output of the amplifier. A final value of the digital value being updated, e.g., associated with the last iteration, is employed as input to the DAC of the one or more DACs in the amplifier for calibrating the offset of the amplifier during a data reception phase.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: July 21, 2015
    Assignee: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Publication number: 20150188528
    Abstract: A delay circuit provides a quadrature-delayed strobe, a tightly controlled quadrature DLL and write/read leveling delay lines by using the same physical delay line pair. By multiplexing different usage models, the need for multiple delay lines is significantly reduced to only two delay lines per byte.
    Type: Application
    Filed: March 5, 2015
    Publication date: July 2, 2015
    Inventors: David Lin, Suresh Balasubramanian
  • Publication number: 20150121113
    Abstract: Disclosed are systems and methods to provide energy control via power-requirement analysis and power-source enablement. Both demand-side and supply-side techniques are used alone or in conjunction to determine an optimal number of power sources to supply power to one or more loads. When fluctuations in power requirements are present, measures such as decoupling less-critical loads in order to continue delivering power to critical systems and turning on and off power sources as needed to meet the current power demands of a system are implemented. Power sources are periodically deactivated by the system on a rotational basis such that all power sources wear evenly, prolonging the life of the equipment. A scalable architecture that allows the virtualization of power from the underlying hardware form factor is also provided.
    Type: Application
    Filed: October 28, 2014
    Publication date: April 30, 2015
    Inventors: Shankar Ramamurthy, Erich Karl Nachbar, K David Lin, Frank Chuang, Rajeev P Huralikoppi, Ryan Justin Kennedy, Denis Kouroussis, Milind Kukanur, Pranthik Samal, Sushant Shankar, Rajaram Soundararajan, Andrew Sy
  • Patent number: 9020778
    Abstract: A method of monitoring the mechanical condition of a machine in which statistically significant measurements on a characteristic signal are made over a period of time which can include interruptions and variations in the operation of the machine giving rise to uncharacteristic signals and the processing of the signal during the statistically significant measurement automatically excludes those parts of the signal associated with interruptions and variations in the operation of the machine. The invention also includes apparatus for carrying out the above method including a preamplifier, adapted to provide output to a further amplifier, adapted to provided output to dynamic enveloping circuitry, adapted to provide an output to an analogue to digital converter, adapted to provide an output to a digital micro-electronic device.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: April 28, 2015
    Assignee: Kittiwake Holroyd Limited
    Inventors: Trevor James Holroyd, David Lin
  • Publication number: 20150098277
    Abstract: In an embodiment, a method of generating strobe signals includes generating a first strobe signal in a first mode by operating a multiplexer with a clock signal to select between a first input signal and a second input signal, the first input signal having a static first signal level and the second input signal corresponding to a control signal. In a second mode, the method includes generating a second strobe signal by operating the multiplexer with the clock signal to select between the first input signal and the second input signal, the first input signal corresponding to the control signal inverted and delayed and the second input signal having a static second signal level.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 9, 2015
    Applicant: Cavium, Inc.
    Inventor: David Lin
  • Publication number: 20150091631
    Abstract: According to at least one example embodiment, a method and corresponding system, or circuit, for calibrating a reference voltage of a single-ended receiver, include applying a clock signal and a reference voltage signal as inputs to the differential amplifier of the single-ended receiver. The differential amplifier provides an output signal, the output signal is processed, and an indication of a duty cycle associated with an output signal of the amplifier is evaluated. Based on the evaluated indication of the duty cycle, a control logic module, or circuit, adjusts a level of the reference voltage signal. The process of evaluating the indication of the duty cycle and adjusting the reference voltage level is repeated for a number of iterations.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Publication number: 20150092510
    Abstract: According to at least one example embodiment, a method and corresponding system for calibrating an amplifier offset include applying an input value to both input leads of an amplifier. The amplifier includes one or more digital-to-analog converters (DACs) used to calibrate an offset of the amplifier. A digital value, provided as input to the DAC, is updated over a number of iterations, by a control logic coupled to the amplifier, based on an output of the amplifier. A final value of the digital value being updated, e.g., associated with the last iteration, is employed as input to the DAC of the one or more DACs in the amplifier for calibrating the offset of the amplifier during a data reception phase.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Publication number: 20150092889
    Abstract: According to at least one example embodiment a two phase calibration approach is employed for calibrating an input/output interface having multiple single-ended receivers. During a first phase, amplifier offset calibration is applied to each of the multiple single-ended receivers. During a second phase, reference voltage calibration is applied to a single-ended receiver of the multiple single-ended receivers to determine a calibration reference voltage value. The calibration reference voltage value is then employed in each of the multiple single-ended receivers during an active phase of the input/output interface.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Cavium, Inc.
    Inventors: Omer O. Yildirim, David Lin, Scott E. Meninger
  • Publication number: 20150088437
    Abstract: In an embodiment, a memory interface includes integrated circuitry to verify the integrity of the memory interface. The circuitry propagates a test pattern through different paths of the memory interface, and checks the result against a reference value to determine whether the components of the paths are operating within an acceptable tolerance. The memory interface can also communicate with ATE to initiate such tests and return the results to the ATE.
    Type: Application
    Filed: September 25, 2013
    Publication date: March 26, 2015
    Applicant: Cavium, Inc.
    Inventor: David Lin