Abstract: Examples pertaining to reference signal (RS) enhancements in mobile communications are described. An apparatus (e.g., a user equipment (UE)) may receive a minimum broadcast RS from a network node (e.g., a base station (BS)). Based on the minimum broadcast RS, the apparatus may perform basic downlink (DL) measurement. The apparatus may also receive or transmit an on-demand RS from or to the network node in a case that a triggering condition is fulfilled. Based on the on-demand RS, the apparatus may perform additional DL or uplink (UL) measurement.

Abstract: A device includes source/drain epitaxial structures over a substrate, source/drain contacts over the source/drain epitaxial structures, respectively, a gate structure laterally between the source/drain contacts, a gate dielectric cap over the gate structure, an oxide-based etch-resistant layer over the gate dielectric cap, a nitride-based etch stop layer over the oxide-based etch-resistant layer, and an interlayer dielectric (ILD) layer over the nitride-based etch stop layer. The device further includes a via structure extending through the ILD layer, the nitride-based etch stop layer, and the oxide-based etch-resistant layer to electrically connect with the one of the source/drain contacts.

Abstract: The present application discloses a die sealant for chip packaging and a packaging structure, wherein epoxy resin adopted in the die sealant has flexible units such as polyether. In combination with the compounding of components such as a curing agent and a diluent, good flexibility and strength are achieved, and warpage is effectively reduced, wherein the warpage can be reduced to 0 mm, the modulus can reach up to 8 GPa or above, good silicon adhesion is achieved, and a silicon wafer can be effectively protected from bending cracks caused by warpage. Moreover, by adding a p-tert-butylphenol epoxy resin diluent, impacts of a monofunctional aliphatic diluent on a curing system can be further reduced effectively, and the flexibility and modulus of the die sealant can be further improved.

Abstract: Various solutions for cell reselection for network energy saving with respect to user equipment and network apparatus in mobile communications are described. An apparatus may receive a network energy saving assistant information (NESAI) from a network node. The NESAI may comprise a cell barred field or a cell reservation field for network energy saving (NWES) configured to differentiate between non-NES user equipments (UEs) and NES-capable UEs. The apparatus may perform a cell reselection for a network energy saving (NES) cell based on the NESAI.

Abstract: The present application discloses a composition, an adhesive film including the composition and a chip packaging structure. The composition includes epoxy resin, a surfactant, a curing agent and filler, wherein the surfactant is selected from a modified hexafluoropropylene compound. The surfactant in the composition is the modified hexafluoropropylene compound, the modified hexafluoropropylene compound is lower in surface energy, good in water resistance and oil resistance and capable of effectively lowering the surface tension of the composition, and therefore, when being used for preparing the adhesive film, the composition is higher in coating wettability. In, addition, the composition has stronger chemical cleaning resistance, and in a process that a residual solder flux obtained in a soldering process of a chip is cleaned, a chip protection film prepared from the composition has stronger cleaning resistance to an alkaline solution so as not to be easy to fall off.

Abstract: Disclosed are a chip protective film, a method for manufacturing the same, and a chip, which relate to the technical field of electronic chip protective films. The chip protective film includes: a first protective layer, and a second protective layer attached to at least a portion of a surface of the first protective layer. The second protective layer includes by mass: 90%-97% acrylate compounds; 0.1-5% fluorine-containing compounds; and a second adjuvant. The chip protective film features strong adhesion, low friction coefficient, high hardness, and good scratch resistance, which effectively solves the technical problem in the prior art that chip protective films are not scratch resistant.

Abstract: Various solutions for low power wake-up signal (LP-WUS) transmission with respect to user equipment and network apparatus in mobile communications are described. An apparatus may receive a wake-up signal (WUS) configuration from a network node. The apparatus may monitor a wake-up signal based on the WUS configuration. The wake-up signal may be modulated based on one-off keying (OOK) and generated by a multi-carrier amplitude shift-keying (MC-ASK) waveform generation, and wherein a parameter K is a size of inverse fast Fourier transform (IFFT) of cyclic-prefix orthogonal frequency-division multiple access (CP-OFDMA).

Abstract: Examples pertaining to connected-mode power saving with a low-power (LP) wake-up signal (WUS) for a dual-radio system in mobile communications are described. In one example, an apparatus may monitor, via a secondary radio of the apparatus, whether an LP WUS is received from a network node in a case that the apparatus is operating in a connected mode. The apparatus may determine whether to wake up a main radio of the apparatus for physical downlink control channel (PDCCH) monitoring in the connected mode based on the monitoring of the LP WUS.

Abstract: The present application discloses a composition, an adhesive film including the composition and a chip packaging structure. The composition includes epoxy resin, a surfactant, a curing agent and filler, wherein the surfactant is selected from a modified hexafluoropropylene compound. The surfactant in the composition is the modified hexafluoropropylene compound, the modified hexafluoropropylene compound is lower in surface energy, good in water resistance and oil resistance and capable of effectively lowering the surface tension of the composition, and therefore, when being used for preparing the adhesive film, the composition is higher in coating wettability. In addition, the composition has stronger chemical cleaning resistance, and in a process that a residual solder flux obtained in a soldering process of a chip is cleaned, a chip protection film prepared from the composition has stronger cleaning resistance to an alkaline solution so as not to be easy to fall off.

Abstract: Floating fastener includes base including main body provided with through hole, resisting ring protruded inside through hole, seat body extended around main body and docking portion protruded from seat body, positioning member having shank inserted into through hole, head located at one end of shank outside main body, joint portion located at an opposite end of shank to move in and out of docking portion and stopper provided between joint portion and shank to abut against resisting ring, elastic member set on shank and stopped between head and resisting ring, and pad provided with inner hole which is inserted outside docking portion of base, so that pad abuts against seat body near the docking portion. The pad is made of soft material, which can achieve the purpose of absorbing the shaking and vibration of the floating fastener under the influence of external force.

Abstract: A device comprises a source/drain contact over a source/drain region of a transistor, an etch stop layer above the source/drain contact, an interlayer dielectric (ILD) layer above the etch stop layer, and a source/drain via extending through the ILD layer and the etch stop layer to the source/drain contact. The etch stop layer has an oxidized region in contact with the source/drain via and separated from the source/drain contact.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. The first conductive via structure has a first substantially strip shape in a top view of the first conductive via structure.

Abstract: Aspects of the disclosure provide a method and device performing input bit allocation that includes receiving broadcasting information bits, generating timing related bits for the broadcasting information bits, and selecting a portion of the generated timing related bits. The method and device can further include allocating each of the selected timing related bits to selected input bits of an encoder, so that each of the selected timing related bits is allocated to an input bit of the encoder corresponding to an available bit channel of the encoder where the selected inputs bits of the encoder correspond to encoded bits that are located in a front portion of the encoded bits.

Abstract: The present application discloses an underfill for chip packaging, including 19-25% of epoxy resin, 55-60% of filler, 15-25% of curing agent and 0.5-0.8% of accelerator in mass percentage, wherein the curing agent includes a polycondensate of paraxylene and dihydroxynaphthalene and a polycondensate of paraxylene and naphthol. Both of the polycondensate of paraxylene and dihydroxynaphthalene and the polycondensate of paraxylene and naphthol are selected to be used in the underfill for chip packaging in the present application, so that the underfill has stronger adhesiveness after being cured. In addition, the present application further provides a chip packaging structure using the underfill.

Abstract: Various solutions for power saving enhancements with a wake-up signal for a dual-radio system are described. An apparatus may configure a main radio of the apparatus to enter a sleep mode and a secondary radio of the apparatus to be in an active mode. The apparatus may receive, via the secondary radio, a first signal from a network node. The apparatus may apply the first signal for at least one of: a time or frequency synchronization with the network node; an indication of whether to wake up the main radio from the sleep mode; and a signal quality measurement.

Abstract: A floating fastener with shock-absorbing structure includes a base having a cylindrical portion and a bottom plate and an abutment ring and an inner ring formed in the cylindrical portion, a fixing element having a head, a shank and locking portion, a flexible liner having a top-sided positioning embedding portion placed in a first fixing hole of a preset first plate, a positioning tube having a tube body and a protruding ring portion, and a buffer pad having a ring groove positioned on the protruding ring portion of the positioning tube. The assembly structure of the positioning tube and the buffer pad is placed outside the cylindrical portion of the base from top to bottom through the perforation of the positioning tube to form a positioning, and the bottom side of the buffer pad is held against the upper surface of the preset first plate.

Abstract: A heating apparatus including a rotating stage, a plurality of wafer carriers, a plurality of first heaters, and at least one second heater is provided. The plurality of wafer carriers is disposed on the rotating stage. The rotating stage drives the wafer carriers to rotate around a rotating axis of the rotating stage. The plurality of first heaters is disposed under a first heating region, each have a first width Wa. There is a first spacing Sa between any two adjacent first heaters. The at least one second heater is disposed under a second heating region, and has a second width Wb. There is a smallest spacing Sab between the at least one second heater and the first heating region, and Wa, Wb, Sa and Sab satisfy the equation: Wa/(Wa+Sa) ? Wb/(Wb+Sab). Each wafer carrier overlaps the first heating region in the axial direction of the rotating axis.

Abstract: A method includes forming a source/drain contact over a source/drain region. An ion implantation process is performed to form a doped region in a top of the source/drain contact. After the ion implantation process is performed, an interlayer dielectric (ILD) layer is deposited to cover the doped region of the source/drain contact. The ILD layer is etched to form a via opening exposing the source/drain contact. A source/drain via is filled in the via opening.

Abstract: A device comprises source/drain epitaxial structures over a substrate; source/drain contacts over the source/drain epitaxial structures, respectively; a gate structure laterally between the source/drain contacts; a gate dielectric cap over the gate structure and having a bottom surface below top surfaces of the source/drain contacts; an oxide-based etch-resistant layer over the gate dielectric cap; a nitride-based etch stop layer over the oxide-based etch-resistant layer; an interlayer dielectric (ILD) layer over the nitride-based etch stop layer; and a gate contact extending through the ILD layer, the nitride-based etch stop layer, the oxide-based etch-resistant layer, and the gate dielectric cap to electrically connect with the gate structure.

Abstract: A micro light-emitting device, including a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer, a first type electrode, a second type electrode, and a light reflection layer, is provided. The light-emitting layer is arranged on the first type semiconductor layer. The second type semiconductor layer is arranged on the light-emitting layer. The first type electrode and the second type electrode are both arranged on the second type semiconductor layer. The light reflection layer is arranged between the light-emitting layer and the first type electrode. The light reflection layer includes an oxidized area and a non-oxidized area. A reflectance of the oxidized area is greater than a reflectance of the non-oxidized area. An orthographic projection of a part of the oxidized area on the first type semiconductor layer and an orthographic projection of the first type electrode on the first type semiconductor layer at least partially overlap.