Abstract: A liquid molding compound for protecting five edges of a semiconductor chip and a preparation method thereof are disclosed. The liquid molding compound includes 15 to 40 parts by mass of an epoxy resin, 15 to 35 parts by mass of a curing agent, 0.1 to 3 parts by mass of a curing accelerator, 4 to 15 parts by mass of a toughening agent, 75 to 150 parts by mass of an inorganic filler, and 0.1 to 5 parts by mass of a coupling agent. The epoxy resin is one or more selected from the group consisting of a bisphenol A epoxy resin, a bisphenol F epoxy resin, and a biphenyl epoxy resin. The toughening agent is an adduct of an epoxy resin and a carboxyl-terminated liquid butyronitrile rubber, and the curing agent is a phenol-formaldehyde resin. The molding compound has a low coefficient of thermal expansion (CTE).

Abstract: A pressable locating device and a driving mechanism are disclosed. The locating device includes a shaft, a restraining rod and a restraining member; an accommodation space and a shaft hole of a sleeve of the driving mechanism are mounted on the shaft, the restraining rod and the restraining member. The pressing unit is movably assembled in the accommodation space and includes an inner sliding channel disposed on a bottom thereof, and the restraining member and the restraining rod are movably slid in the inner sliding channel. The inner sliding channel includes a through hole formed on a side thereof, and a locating member is axially movable in the through hole, so as to radially move to restrain with or depart from the restraining rod, along the restraining member. An elastic part is disposed and reciprocated between the bottom of the pressing unit and the accommodation space.

Abstract: A board to board positioning device includes a base including a shaft hole inside, two through hole arranged at two opposite sides perpendicular to the shaft hole and respectively mounted with a limiting ball, a connecting portion and a limiting portion respectively provided at two sides and two limiting grooves for aligning with the two through holes, and an adjustment knob including an operation space for the base to pass through, a sliding wall surface positioned against the through holes, a driving portion positioned against the limiting portion and a marking portion provided on the outside. The sliding wall surface has a pressing side and a retreating side used to push the limiting balls into and out of the through holes. The driving portion is protruded with locking protrusions that are used to rotate and slide along the limiting portion to enter and exit the limiting grooves.

Abstract: A push controlled positioning device includes a base with a through shaft hole, a push block horizontally and slidably coupled to the base and holding two limiting balls in two opposite through holes, and an axle seat with a shaft rod inserted into the shaft hole of the base and locked in place by the limiting balls under the effect of the elastic restoring force of an elastic member in the push block. When the push block is pushed laterally, the balls enter respective loosening grooves in the push block to unlock the axle seat, allowing removable of the base and the push block from the axle seat.

Abstract: A method of providing early paging indication (PEI) for power consumption enhancements in a 5G/NR network is proposed. Under the novel paging reception procedure with PEI, UE can skip PO monitoring if PEI indicates negative. The UE main receiver is typically turned on in every paging cycle, for LOOP, MEAS, and PEI reception. However, if PEI indicates no paging, then UE can turn off its main receiver right after performing measurements. Since PEIs are always transmitted and are located near synchronization signal block (SSB) bursts, power saving can be achieved not only for PO monitoring but also for light sleep between the last SSB/PEI and the PO monitoring gap and state transitions, when no UE in the UE group is paged.

Abstract: A liquid molding compound for protecting five edges of a semiconductor chip and a preparation method thereof are disclosed. The liquid molding compound includes 15 to 40 parts by mass of an epoxy resin, 15 to 35 parts by mass of a curing agent, 0.1 to 3 parts by mass of a curing accelerator, 4 to 15 parts by mass of a toughening agent, 75 to 150 parts by mass of an inorganic filler, and 0.1 to 5 parts by mass of a coupling agent. The epoxy resin is one or more selected from the group consisting of a bisphenol A epoxy resin, a bisphenol F epoxy resin, and a biphenyl epoxy resin. The toughening agent is an adduct of an epoxy resin and a carboxyl-terminated liquid butyronitrile rubber, and the curing agent is a phenol-formaldehyde resin. The molding compound has a low coefficient of thermal expansion (CTE).

Abstract: Aspects of the disclosure provide a method and an apparatus for performing a bandwidth part (BWP) switching process within different switching delays. For example, the apparatus can include receiving circuitry and processing circuitry. The receiving circuitry can receive from a BS a signaling indicating a change to a BWP configuration of the UE. The processing circuitry can perform a BWP configuration switching process based on the change to the BWP configuration to switch an active BWP configuration to a new BWP configuration, and monitor data transmission from the BS with the new BWP configuration either after a first predefined switching delay when the change to the BWP configuration includes at least one of a predefined set of BWP configuration parameters or after a second predefined switching delay when the change to the BWP configuration does not include any one of the predefined set of BWP configuration parameters.

Abstract: Examples pertaining to additional bit freezing for polar coding are described. An apparatus performs polar coding to encode a plurality of input subblocks of information bits, frozen bits and optional cyclic redundancy check (CRC) bits to generate a plurality of subblocks of coded bits. The apparatus then transmits at least some of the subblocks of coded bits. In performing the polar coding, the apparatus additionally freezes one of the plurality of input subblocks corresponding to one of the interleaved plurality of subblocks of coded bits which decreases polarization gain due to puncturing.

Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first etch stop layer from a portion of a gate mask, the gate mask extending between spacers adjacent a gate electrode, the gate electrode overlying a semiconductor fin. The method further includes forming a second etch stop layer adjacent the first etch stop layer, forming an opening through the second etch stop layer, and exposing the first etch stop layer by performing a first etching process. The method further includes extending the opening through the first etch stop layer and exposing the gate electrode by performing a second etching process. Once the gate electrode has been exposed, the method further includes forming a gate contact in the opening.

Abstract: Method and UE are provided for scheduling for PDCCH PEI detection. In particular, a BS can transmit a higher layer signaling to a UE. The higher layer signaling includes a configuration of at least one configurable PDCCH candidate number for PEI procedure used under a non-active mode. After receiving the higher layer signaling, the UE performs blind decoding under the non-active mode according to the configuration of the at least one configurable PDCCH candidate number.

Abstract: A method comprises forming a gate structure between gate spacers; etching back the gate structure to fall below top ends of the gate spacers; forming a gate dielectric cap over the etched back gate structure; performing an ion implantation process to form a doped region in the gate dielectric cap; depositing a contact etch stop layer over the gate dielectric cap and an ILD layer over the contact etch stop layer; performing a first etching process to form a gate contact opening extending through the ILD layer and terminating prior to reaching the doped region of the gate dielectric cap; performing a second etching process to deepen the gate contact opening, wherein the second etching process etches the doped region of the gate dielectric cap at a slower etch rate than etching the contact etch stop layer; and forming a gate contact in the deepened gate contact opening.

Abstract: A method for enhancing Bandwidth Part (BWP) operation towards Secondary Cell (SCell) dormancy indication is proposed. A User Equipment (UE) detects a Downlink Control Information (DCI) format including an SCell dormancy indication that indicates an active BWP change for a serving cell. The UE performs BWP switching for the serving cell in response to the DCI format. The UE stops transmission or reception in the serving cell during a time duration from a slot containing a last symbol of the DCI format, wherein the time duration includes a first period of time of delay for the BWP switching and a second period of time of interruption to other active serving cells.

Abstract: Herein disclosed are a wafer, a wafer testing system, and a method thereof. Said wafer testing method comprises the following steps. First, an incident light is provided toward a wafer. And, a wafer surface image corresponded to the wafer is generated. Then, determining whether the wafer surface image has a plurality of first strips and a plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical. When the wafer surface image has the plurality of first strips and the plurality of second strips, and the plurality of first strips and the plurality of second strips are symmetrical, a qualified signal corresponded to the wafer is provided.

Abstract: A method for Downlink Control Information (DCI)-based Physical Downlink Control Channel (PDCCH) monitoring adaptation is proposed. A User Equipment (UE) performs a Discontinuous Reception (DRX) operation. The UE detects a UE-specific DCI format during the DRX operation, wherein the UE-specific DCI format includes a bit field that indicates an adaptation on PDCCH monitoring. The UE adjusts a PDCCH monitoring periodicity in a DRX active time of the DRX operation according to the bit field.

Abstract: A micro light emitting diode chip including a first-type semiconductor layer, an active layer, a second-type semiconductor layer, a first-type electrode, and a second-type electrode is provided. The first-type semiconductor layer has a first high-concentration doping region and a first low-concentration doping region. The active layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The first-type electrode is directly contacted and electrically connected to the first high-concentration doping region. The second-type electrode is electrically connected to the second-type semiconductor layer.

Abstract: A heating apparatus including a rotating stage, a plurality of wafer carriers, a first heater, and a second heater is provided. The rotating stage includes a rotating axis. The plurality of wafer carriers is disposed on the rotating stage. The rotating stage drives the wafer carriers to rotate on the rotating axis. The first heater is disposed under the rotating stage. The first heater includes a first width in a radial direction of the rotating stage. The second heater is disposed under the rotating stage. The second heater and the first heater are separated from each other. The second heater includes a second width in the radial direction of the rotating stage, and the first width is not equal to the second width. A chemical vapor deposition (CVD) system using the heating apparatus is also provided.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. The first conductive via structure has a first substantially strip shape in a top view of the first conductive via structure.

Abstract: A method includes forming a conductive feature through a first dielectric layer, sequentially forming a second dielectric layer and a third dielectric layer over the first dielectric layer, and etching the third dielectric layer to form an opening. A first width of the opening at a top surface of the third dielectric layer is greater than a second width of the opening at a first interface between the third dielectric layer and the second dielectric layer. The method also includes etching the second dielectric layer until the opening extends to the conductive feature, thereby forming an enlarged opening, and forming a metal material in the enlarged opening. A third width of the enlarged opening at the first interface is equal to or less than a fourth width of the enlarged opening at a second interface between the second dielectric layer and the first dielectric layer.

Abstract: Examples pertaining to bit selection for polar coding incremental-redundancy hybrid automatic repeat request (IR-HARQ) are described. An apparatus (e.g., UE) generates a re-transmission polar code block (CB) in a polar incremental redundancy HARQ (IR-HARQ) procedure. The apparatus then transmits the re-transmission polar CB as a re-transmission of an initial transmission of an initial polar code carrying a plurality of information bits. In generating the re-transmission polar CB, the apparatus selects one or more re-transmission information bits from the plurality of information bits.

Abstract: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.