Patents by Inventor DeokKyung Yang

DeokKyung Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8546957
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having an outer pad at a substrate top side; forming a resist layer directly on the substrate top side, the resist layer having a resist top side with a channel array adjacent the outer pad exposed from the resist layer; mounting an integrated circuit having an active side facing the resist top side, the integrated circuit having a non-horizontal side adjacent the outer pad; and forming a dielectric between the active side and the resist top side, the dielectric having a fillet extended from the non-horizontal side to the substrate top side inside an inner extent of the channel array.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: October 1, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: WonJun Ko, DeokKyung Yang, Yeongbeom Ko
  • Patent number: 8518752
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package base having an inward base side and an outward base side; mounting a device over the inward base side and connected to the outward base side; connecting a silicon interposer having a through silicon via to the device and having an external side facing away from the device; and applying an encapsulant around the device, over the package base, and over the silicon interposer with the external side substantially exposed, the encapsulant having a protrusion over the outward base side.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: August 27, 2013
    Assignee: Stats Chippac Ltd.
    Inventors: DeokKyung Yang, DaeSik Choi
  • Patent number: 8497575
    Abstract: A method of manufacture of a semiconductor packaging system includes: providing a base substrate having edges; mounting an electrical interconnect on the base substrate; and applying an encapsulant having a reference marker and an opening over the electrical interconnect, the reference marker around the electrical interconnect based on physical locations of the edges.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: July 30, 2013
    Assignee: STATS Chippac Ltd.
    Inventors: In Sang Yoon, JoHyun Bae, DeokKyung Yang
  • Publication number: 20130154092
    Abstract: A method of manufacture of an integrated circuit packaging system including: providing a package carrier; mounting an integrated circuit to the package carrier; mounting a circuit interposer above the integrated circuit; mounting a mounting integrated circuit above the circuit interposer; forming a conductive pillar to the circuit interposer adjacent to the mounting integrated circuit; connecting the circuit interposer to the package carrier; and forming an encapsulation on the package carrier.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 20, 2013
    Inventors: DeokKyung Yang, In Sang Yoon, SeongHun Mun, KyungHwan Kim
  • Publication number: 20130069240
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a top integrated circuit on a first side of the substrate; mounting a bottom integrated circuit on a second side of the substrate; forming a top encapsulation over the top integrated circuit and a bottom encapsulation over the bottom integrated circuit simultaneously; and forming a bottom via through the bottom encapsulation to the substrate.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 21, 2013
    Inventors: DeokKyung Yang, DaeSik Choi
  • Publication number: 20130070438
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting an interposer having a top interposer surface over the substrate; attaching an interposer pad extension to the top interposer surface, the interposer pad extension having an extension contact surface and a lower contact surface, the surface area of the extension contact surface being smaller than the surface area of the lower contact surface; and forming a package encapsulation on the substrate, the interposer, and the interposer pad extension, the package encapsulation having a recess exposing the top interposer surface, the interposer pad extension embedded only in the package encapsulation.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 21, 2013
    Inventors: A Leam Choi, DeokKyung Yang, JoHyun Bae
  • Publication number: 20120319265
    Abstract: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Inventors: In Sang Yoon, DeokKyung Yang, Sungmin Song
  • Publication number: 20120319286
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a connection post on the substrate, the connection post having a post top and a post side; mounting an integrated circuit die on the substrate, the integrated circuit die having a top die surface; molding an encapsulation on the integrated circuit die and the connection post; and forming a connector recess in the encapsulation by removing the encapsulation around the connection post exposing a portion of the post side.
    Type: Application
    Filed: June 17, 2011
    Publication date: December 20, 2012
    Inventors: DeokKyung Yang, In Sang Yoon, SangJin Lee
  • Publication number: 20120223435
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base integrated circuit over a base substrate; stacking a mountable device over the base package with a flow channel between the mountable device and the base package; and forming an external lead having a lead platform and a lead leg, the lead platform extending from the mountable device and the lead leg parallel to the base package.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 6, 2012
    Inventors: A Leam Choi, Jae Han Chung, DeokKyung Yang
  • Patent number: 8247894
    Abstract: An integrated circuit package system includes: providing a stackable integrated circuit package system having a base encapsulation and a recess therein; stacking a top integrated circuit package system, having a top encapsulation with a protruding portion, with the stackable integrated circuit package system with the protruding portion aligned and matched within the recess; and connecting the top integrated circuit package system and the stackable integrated circuit package system.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: August 21, 2012
    Assignee: STATS ChipPAC Ltd.
    Inventors: In Sang Yoon, HanGil Shin, Jae Han Chung, DeokKyung Yang
  • Publication number: 20120146246
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having an outer pad at a substrate top side; forming a resist layer directly on the substrate top side, the resist layer having a resist top side with a channel array adjacent the outer pad exposed from the resist layer; mounting an integrated circuit having an active side facing the resist top side, the integrated circuit having a non-horizontal side adjacent the outer pad; and forming a dielectric between the active side and the resist top side, the dielectric having a fillet extended from the non-horizontal side to the substrate top side inside an inner extent of the channel array.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 14, 2012
    Inventors: WonJun Ko, DeokKyung Yang, Yeongbeom Ko
  • Publication number: 20120119360
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching a connection post to the substrate, the connection post having a post top and a post side; mounting an integrated circuit die on the substrate, the integrated circuit die having a top die surface; and forming a package body on the substrate, the connection post, and the integrated circuit die.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 17, 2012
    Inventors: YoungChul Kim, KyungHoon Lee, Seong Won Park, Ki Youn Jang, JaeHyun Lee, DeokKyung Yang, In Sang Yoon, SungEun Park
  • Patent number: 8102666
    Abstract: An integrated circuit package system includes: connecting a carrier and an integrated circuit mounted thereover; mounting an interposer, having an opening, over the integrated circuit; connecting an interconnect between the interposer and the carrier through the opening; and forming an encapsulation planar with a carrier vertical side of the carrier and an interposer vertical side of the interposer.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: January 24, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: HyungSang Park, In Sang Yoon, DeokKyung Yang, Soo-San Park
  • Patent number: 8093100
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a through silicon via die having an interconnect through a silicon substrate; depositing a re-distribution layer on the through silicon via die and connected to the interconnects; mounting a structure over the through silicon via die; connecting the structure to the interconnect of the through silicon via die with a direct interconnect; and encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: January 10, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: A Leam Choi, Jae Han Chung, DeokKyung Yang, HyungSang Park
  • Patent number: 8067306
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a component connector on the substrate; forming a resist layer on the substrate with the component connector exposed; forming a vertical insertion cavity in the resist layer, the vertical insertion cavity isolated from the component connector or a further vertical insertion cavity, the vertical insertion cavity having a cavity side that is orthogonal to the substrate; forming a rounded interconnect in the vertical insertion cavity, the rounded interconnect nonconformal to the vertical insertion cavity; and mounting an integrated circuit device on the component connector.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DeokKyung Yang, SeungYun Ahn
  • Patent number: 8063475
    Abstract: A semiconductor package system includes: providing a top package, a through silicon via interposer embedded in the top package; providing a bottom package having a bottom semiconductor die with a top connection adjacent the center active face thereof, a substrate interposer being embedded in the bottom package, the bottom semiconductor die being attached to the substrate interposer; and attaching the top package to the bottom package, the top package having the through silicon via interposer having a via connected to the top connection.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: November 22, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DaeSik Choi, DeokKyung Yang, Seung Won Kim
  • Publication number: 20110210437
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a component connector on the substrate; forming a resist layer on the substrate with the component connector exposed; forming a vertical insertion cavity in the resist layer, the vertical insertion cavity isolated from the component connector or a further vertical insertion cavity, the vertical insertion cavity having a cavity side that is orthogonal to the substrate; forming a rounded interconnect in the vertical insertion cavity, the rounded interconnect nonconformal to the vertical insertion cavity; and mounting an integrated circuit device on the component connector.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 1, 2011
    Inventors: DeokKyung Yang, SeungYun Ahn
  • Publication number: 20110204508
    Abstract: A method of manufacture of a semiconductor packaging system includes: providing a base substrate having edges; mounting an electrical interconnect on the base substrate; and applying an encapsulant having a reference marker and an opening over the electrical interconnect, the reference marker around the electrical interconnect based on physical locations of the edges.
    Type: Application
    Filed: February 22, 2010
    Publication date: August 25, 2011
    Inventors: In Sang Yoon, JoHyun Bae, DeokKyung Yang
  • Patent number: 7994625
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an internal structure substrate having an internal structure substrate cavity; mounting an internal structure die above the internal structure substrate; encapsulating the internal structure die with an internal structure encapsulation to form an internal structure package; forming an internal structure protrusion in the internal structure encapsulation below the internal structure substrate cavity; mounting the internal structure package above a substrate; and encapsulating the internal structure package above the substrate with an encapsulation.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: August 9, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DaeSik Choi, DeokKyung Yang, Jong-Woo Ha, Byoung Wook Jang, JaeSick Bae, Seung Won Kim
  • Publication number: 20110127662
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package base having an inward base side and an outward base side; mounting a device over the inward base side and connected to the outward base side; connecting a silicon interposer having a through silicon via to the device and having an external side facing away from the device; and applying an encapsulant around the device, over the package base, and over the silicon interposer with the external side substantially exposed, the encapsulant having a protrusion over the outward base side.
    Type: Application
    Filed: December 2, 2009
    Publication date: June 2, 2011
    Inventors: DeokKyung Yang, DaeSik Choi