Patents by Inventor DeokKyung Yang

DeokKyung Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110089552
    Abstract: A method of manufacture of an integrated circuit packaging system including: forming a top package including: providing a through silicon via interposer having a through silicon via; coupling a stacked integrated circuit die to the through silicon via, and testing a top package; forming a base package including: providing a substrate, coupling a base integrated circuit die to the substrate, and testing a base package; and coupling a stacked interconnect between the top package and the base package.
    Type: Application
    Filed: October 16, 2009
    Publication date: April 21, 2011
    Inventors: HyungSang Park, DeokKyung Yang, DaeSik Choi
  • Publication number: 20110062591
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a through silicon via die having an interconnect through a silicon substrate; depositing a re-distribution layer on the through silicon via die and connected to the interconnects; mounting a structure over the through silicon via die; connecting the structure to the interconnect of the through silicon via die with a direct interconnect; and encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation.
    Type: Application
    Filed: November 19, 2010
    Publication date: March 17, 2011
    Inventors: A Leam Choi, Jae Han Chung, DeokKyung Yang, HyungSang Park
  • Publication number: 20110037157
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a component over a side of the substrate; forming an interface module having a module via in any location for connectivity to the substrate; and mounting the entirety of the interface module over a portion of the side of the substrate next to the component.
    Type: Application
    Filed: August 17, 2009
    Publication date: February 17, 2011
    Inventors: HanGil Shin, DeokKyung Yang, Jong-Woo Ha
  • Patent number: 7875967
    Abstract: An integrated circuit package system including: providing a substrate; mounting an integrated circuit above the substrate; mounting an inner stacking module, having an inner stacking module encapsulation and a molded integral step molded in the inner stacking module encapsulation, above the integrated circuit; and encapsulating the inner stacking module, and the integrated circuit with an encapsulation.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: January 25, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DeokKyung Yang, In Sang Yoon, Jae Han Chung
  • Patent number: 7859099
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a through silicon via die having an interconnect through a silicon substrate; depositing a re-distribution layer on the through silicon via die and connected to the interconnects; mounting a structure over the through silicon via die; connecting the structure to the interconnect of the through silicon via die with a direct interconnect; and encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 28, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: A Leam Choi, Jae Han Chung, DeokKyung Yang, HyungSang Park
  • Publication number: 20100148354
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a through silicon via die having an interconnect through a silicon substrate; depositing a re-distribution layer on the through silicon via die and connected to the interconnects; mounting a structure over the through silicon via die; connecting the structure to the interconnect of the through silicon via die with a direct interconnect; and encapsulating the through silicon via die and partially encapsulating the structure with an encapsulation.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 17, 2010
    Inventors: A Leam Choi, Jae Han Chung, DeokKyung Yang, HyungSang Park
  • Publication number: 20100123232
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing an internal structure substrate having an internal structure substrate cavity; mounting an internal structure die above the internal structure substrate; encapsulating the internal structure die with an internal structure encapsulation to form an internal structure package; forming an internal structure protrusion in the internal structure encapsulation below the internal structure substrate cavity; mounting the internal structure package above a substrate; and encapsulating the internal structure package above the substrate with an encapsulation.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 20, 2010
    Inventors: DaeSik Choi, DeokKyung Yang, Jong-Woo Ha, Byoung Wook Jang, JaeSick Bae, Seung Won Kim
  • Publication number: 20100078789
    Abstract: A semiconductor package system includes: providing a top package, a through silicon via interposer embedded in the top package; providing a bottom package having a bottom semiconductor die with a top connection adjacent the center active face thereof, a substrate interposer being embedded in the bottom package, the bottom semiconductor die being attached to the substrate interposer; and attaching the top package to the bottom package, the top package having the through silicon via interposer having a via connected to the top connection.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Inventors: DaeSik Choi, DeokKyung Yang, Seung Won Kim
  • Patent number: 7687920
    Abstract: An integrated circuit package-on-package system includes: providing a base substrate having a central opening; attaching a bottom die below the base substrate partially covering the central opening, the bottom die connected through the central opening to a top surface of the base substrate; attaching a top die above the base substrate partially covering the central opening; attaching external conductive interconnections to a base bottom surface of the base substrate; and molding an encapsulant leaving the external conductive interconnections partially exposed.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: March 30, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: DeokKyung Yang, Jae Han Chung, Hyun Joung Kim
  • Publication number: 20100046183
    Abstract: An integrated circuit package system includes: connecting a carrier and an integrated circuit mounted thereover; mounting an interposer, having an opening, over the integrated circuit; connecting an interconnect between the interposer and the carrier through the opening; and forming an encapsulation planar with a carrier vertical side of the carrier and an interposer vertical side of the interposer.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 25, 2010
    Inventors: HyungSang Park, In Sang Yoon, DeokKyung Yang, Soo-San Park
  • Publication number: 20100044878
    Abstract: An integrated circuit package system includes providing a carrier having a first side and a second side; mounting an integrated circuit over the carrier with the first side facing the integrated circuit; attaching an external interconnect to the second side; and forming an encapsulation over the integrated circuit and around the external interconnect with the external interconnect exposed from the encapsulation and with the encapsulation and the second side forming a cavity.
    Type: Application
    Filed: August 22, 2008
    Publication date: February 25, 2010
    Inventors: Jong-Woo Ha, DaeSik Choi, DeokKyung Yang
  • Publication number: 20090256267
    Abstract: An integrated circuit package-on-package system includes: providing a base substrate having a central opening; attaching a bottom die below the base substrate partially covering the central opening, the bottom die connected through the central opening to a top surface of the base substrate; attaching a top die above the base substrate partially covering the central opening; attaching external conductive interconnections to a base bottom surface of the base substrate; and molding an encapsulant leaving the external conductive interconnections partially exposed.
    Type: Application
    Filed: April 11, 2008
    Publication date: October 15, 2009
    Inventors: DeokKyung Yang, Jae Han Chung, Hyun Joung Kim
  • Publication number: 20090236720
    Abstract: An integrated circuit package system includes: providing a stackable integrated circuit package system having a base encapsulation and a recess therein; stacking a top integrated circuit package system, having a top encapsulation with a protruding portion, with the stackable integrated circuit package system with the protruding portion aligned and matched within the recess; and connecting the top integrated circuit package system and the stackable integrated circuit package system.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Inventors: In Sang Yoon, HanGil Shin, Jae Han Chung, DeokKyung Yang
  • Publication number: 20090224390
    Abstract: An integrated circuit package system including: providing a substrate; mounting an integrated circuit above the substrate; mounting an inner stacking module, having an inner stacking module encapsulation and a molded integral step molded in the inner stacking module encapsulation, above the integrated circuit; and encapsulating the inner stacking module, and the integrated circuit with an encapsulation.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 10, 2009
    Inventors: DeokKyung Yang, In Sang Yoon, Jae Han Chung