Patents by Inventor Devendra K. Sadana
Devendra K. Sadana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10923458Abstract: A structure containing a vertical light emitting diode (LED) is provided. The vertical LED is present in an opening located in a display substrate, and the vertical LED is coupled to a back contact structure via a magnetic back contact structure. A first top contact structure contacts a topmost surface of the vertical LED and a second top contact structure contacts a surface of the back contact structure.Type: GrantFiled: October 3, 2019Date of Patent: February 16, 2021Assignee: International Business Machines CorporationInventors: Stephen W. Bedell, Bing Dang, Ning Li, Frank R. Libsch, Devendra K. Sadana
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Publication number: 20210043823Abstract: A gated Josephson junction includes a substrate and a vertical Josephson junction formed on the substrate and extending substantially normal the substrate. The vertical Josephson junction includes a first superconducting layer, a semiconducting layer, and a second superconducting layer. The first superconducting layer, the semiconducting layer, and the second superconducting layer form a stack that is substantially perpendicular to the substrate. The gated Josephson junction includes a gate dielectric layer in contact with the first superconducting layer, the semiconducting layer, and the second superconducting layer at opposing side surfaces of the vertical Josephson junction, and a gate electrically conducting layer in contact with the gate dielectric layer. The gate electrically conducting layer is separated from the vertical Josephson junction by the gate dielectric layer.Type: ApplicationFiled: August 7, 2019Publication date: February 11, 2021Inventors: Devendra K. Sadana, Ning Li, Stephen W. Bedell, Sean Hart, Patryk Gumann
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Patent number: 10903420Abstract: A method is presented for obtaining a controllable resistance change in a battery-like device. The method includes depositing a first lithium-compound based layer in direct contact with a bottom electrode, depositing an electrolyte layer in direct contact with the first lithium-compound based layer, depositing a second lithium-compound based layer in direct contact with the electrolyte layer, forming a top electrode in direct contact with the second lithium-compound based layer, and applying electrical pulses between the top and bottom electrodes to trigger lithium ion transport to modify lithium concentrations in the first and second lithium-compound based layers.Type: GrantFiled: April 16, 2019Date of Patent: January 26, 2021Assignee: International Business Machines CorporationInventors: Yun Seog Lee, Devendra K. Sadana, Joel P. de Souza
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Patent number: 10898725Abstract: Embodiments of the invention are directed to an integrated optogenetic device. The integrated optogenetic includes a substrate layer having a first substrate region and a second substrate region. The device further includes a first contact formed over the substrate layer in the first substrate region and a second contact layer formed over the substrate layer in the second region. In addition, the device includes a light-emitting diode (LED) structure communicatively coupled to the first contact layer and a biosensor element communicatively coupled to the second contact layer. The first contact layer is configured to operate as a bottom contact that provides electrical contact to the LED structure. The first contact layer is further configured to be substantially lattice matched with the substrate layer and a bottom layer of the LED structure.Type: GrantFiled: November 26, 2018Date of Patent: January 26, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Steve Holmes, Stephen W. Bedell, Jia Chen, Hariklia Deligianni, Devendra K. Sadana
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Patent number: 10903672Abstract: A method of charging a solid-state lithium-based battery that does not include a lithium deposited anode (i.e., lithium anode-free, solid-state lithium-based battery) is provided. The method includes charging a lithium anode-free, solid-state lithium-based battery that needs to be charged utilizing at least an initial charge stage in which a charge rate of 5 C or greater is performed for a period of time of 50 seconds or less. Such charging can produce a reduced deformation of the top electrode of the lithium anode-free, solid-state lithium-based battery.Type: GrantFiled: March 30, 2017Date of Patent: January 26, 2021Assignee: International Business Machines CorporationInventors: Joel P. de Souza, Yun Seog Lee, Devendra K. Sadana
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Patent number: 10892333Abstract: A method of making a GaN device includes: forming a GaN substrate; forming a plurality of spaced-apart first metal contacts directly on the GaN substrate; forming a layer of insulating GaN on the exposed portions of the upper surface; forming a stressor layer on the contacts and the layer of insulating GaN; forming a handle substrate on the first surface of the stressor layer; spalling the GaN substrate that is located beneath the stressor layer to separate a layer of GaN and removing the handle substrate; bonding the stressor layer to a thermally conductive substrate; forming a plurality of vertical channels through the GaN to define a plurality of device structures; removing the exposed portions of the layer of insulating GaN to electrically isolate the device structures; forming an ohmic contact layer on the second surface; and forming second metal contacts on the ohmic contact layer.Type: GrantFiled: May 29, 2019Date of Patent: January 12, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen W. Bedell, Keith E. Fogel, Paul A. Lauro, Devendra K. Sadana
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Patent number: 10886124Abstract: A semiconductor structure is provided that contains a non-volatile battery which controls gate bias and has increased output voltage retention and voltage resolution. The semiconductor structure may include a semiconductor substrate including at least one channel region that is positioned between source/drain regions. A gate dielectric material is located on the channel region of the semiconductor substrate. A battery stack is located on the gate dielectric material. The battery stack includes, a cathode current collector located on the gate dielectric material, a cathode material located on the cathode current collector, a first ion diffusion barrier material located on the cathode material, an electrolyte located on the first ion diffusion barrier material, a second ion diffusion barrier material located on the electrolyte, an anode region located on the second ion diffusion barrier material, and an anode current collector located on the anode region.Type: GrantFiled: December 23, 2019Date of Patent: January 5, 2021Assignee: International Business Machines CorporationInventors: Ning Li, Yun Seog Lee, Joel P. de Souza, Devendra K. Sadana
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Patent number: 10874876Abstract: Probes include a probe body configured to penetrate biological tissue. High-efficiency light sources are positioned within the probe body. Each high-efficiency light source has a sufficiently intense light output to trigger a light-sensitive reaction in neighboring tissues and has a sufficiently low power output such that a combined heat output of multiple light sources does cause a disruptive temperature increase in the neighboring tissues.Type: GrantFiled: January 26, 2018Date of Patent: December 29, 2020Assignee: International Business Machines CorporationInventors: Hariklia Deligianni, Ko-Tao Lee, Ning Li, Devendra K. Sadana
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Publication number: 20200397362Abstract: A method includes implanting an implantable biosensor within a subject where the implantable biosensor has an array of light sources and an array of light detectors, activating the array of light sources to direct light signals at a targeted tissue site in the subject, capturing, with the light detectors, the light signals reflected off the targeted site, calculating a roundtrip propagation time for each of the light signals and comparing the roundtrip propagation time for each of the light signals against previous calculated respective roundtrip propagation times to determine an occurrence of a change in the targeted tissue site.Type: ApplicationFiled: June 20, 2019Publication date: December 24, 2020Inventors: Steven J. Holmes, Devendra K. Sadana, Stephen W. Bedell
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Publication number: 20200403190Abstract: An energy storage device sits within a trench with electrically insulated sides within a substrate. Within the trench there is an anode, an electrolyte disposed on the anode, and a cathode structure disposed on the electrolyte. Variations of an electrically conductive contact are disposed on and in electrical contact with the cathode structure. At least part of the conductive contact is disposed within the trench and the conductive contact partially seals the anode, electrolyte, and cathode structure within the trench. Conductive and/or non-conductive adhesives are used to complete the seal thereby enabling full working electrochemical devices where singulation of the devices from the substrate enables high control of device dimensionality and footprint.Type: ApplicationFiled: June 18, 2019Publication date: December 24, 2020Inventors: John Collins, Devendra K. Sadana, Bucknell C. Webb, Paul S. Andry
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Publication number: 20200395628Abstract: According to an embodiment of the present invention there is a cathode of an energy storage device. The cathode is made of Lithium Manganese Oxyfluoride (LMOF), with the approximate stoichiometry of Li2MnO2F. In some embodiments, the cathode is made of Lithium Manganese Oxyfluoride (LMOF), Li2MnO2F combined with a solid polymer electrolyte (SPE). Other materials such as conductive material and binders can be included in the cathode. Methods of making are disclosed. According to an embodiment of the present invention there is a composition of matter. The composition is made of Lithium Manganese Oxyfluoride (LMOF), with the approximate stoichiometry of Li2MnO2F combined with a solid polymer electrolyte (SPE). Other materials such as conductive material and binders can be included in the cathode. Methods of making are disclosed. The composition can be used as a cathode in an energy storage device. An energy storage device, e.g. a battery, is disclosed.Type: ApplicationFiled: June 13, 2019Publication date: December 17, 2020Inventors: John Collins, Bucknell C. Webb, Paul S. Andry, Teodor Krassimirov Todorov, Devendra K. Sadana
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Publication number: 20200380343Abstract: Techniques are disclosed for fabricating and using a neuromorphic computing device including biological neurons. For example, a method for fabricating a neuromorphic computing device includes forming a channel in a first substrate and forming at least one sensor in a second substrate. At least a portion of the channel in the first substrate is seeded with a biological neuron growth material. The second substrate is attached to the first substrate such that the at least one sensor is proximate to the biological neuron growth material and growth of the seeded biological neuron growth material is stimulated to grow a neuron in the at least a portion of the channel.Type: ApplicationFiled: May 28, 2019Publication date: December 3, 2020Inventors: Steven J. Holmes, Devendra K. Sadana, Stephen W. Bedell, Teodor K. Todorov
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Publication number: 20200365737Abstract: Embodiments of the invention are directed to a resistive switching device (RSD). A non-limiting example of the RSD includes a fin-shaped element formed on a substrate, wherein the fin-shaped element includes a source region, a central channel region, and a drain region. A gate is formed over a top surface and sidewalls of the central channel region. The fin-shaped element is doped with impurities that generate interstitial charged particles configured to move interstitially through a lattice structure of the fin-shaped element under the influence of an electric field applied to the RSD.Type: ApplicationFiled: May 13, 2019Publication date: November 19, 2020Inventors: Joel P. de Souza, Babar Khan, Arvind Kumar, Yun Seog Lee, Ning Li, Devendra K. Sadana
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Patent number: 10833311Abstract: An anode structure for rechargeable lithium-ion batteries that have a high-capacity are provided. The anode structure, which is made utilizing an anodic etching process, is of unitary construction and includes a non-porous region and a porous region including a top porous layer (Porous Region 1) having a first thickness and a first porosity, and a bottom porous layer (Porous Region 2) located beneath the top porous layer and forming an interface with the non-porous region. At least an upper portion of the non-porous region and the entirety of the porous region are composed of silicon, and the bottom porous layer has a second thickness that is greater than the first thickness, and a second porosity that is greater than the first porosity.Type: GrantFiled: July 3, 2018Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Joel P. de Souza, John Collins, Devendra K. Sadana, John A. Ott, Marinus J. P. Hopstaken, Stephen W. Bedell
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Patent number: 10833357Abstract: Rechargeable lithium-ion batteries that have a high-capacity are provided. The lithium-ion batteries contain an anode structure that is of unitary construction and includes a non-porous region and a porous region including a top porous layer (Porous Region 1) having a first thickness and a first porosity, and a bottom porous layer (Porous Region 2) located beneath the top porous layer and forming an interface with the non-porous region. At least an upper portion of the non-porous region and the entirety of the porous region are composed of silicon, and the bottom porous layer has a second thickness that is greater than the first thickness, and a second porosity that is greater than the first porosity.Type: GrantFiled: July 3, 2018Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Joel P. de Souza, John Collins, Devendra K. Sadana
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Patent number: 10833175Abstract: A semiconductor device that includes a fin structure having a porous core, and a relaxed semiconductor layer present on the porous core. The semiconductor device may further include a strained semiconductor layer that is substantially free of defects that is present on the strained semiconductor layer. A gate structure may be present on a channel region of the fin structure, and source and drain regions may be present on opposing sides of the gate structure.Type: GrantFiled: June 4, 2015Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Stephen W. Bedell, Kangguo Cheng, Jeehwan Kim, Alexander Reznicek, Devendra K. Sadana
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Patent number: 10833356Abstract: Rechargeable lithium-ion batteries that have a high-capacity and a fast charge rate are provided. The lithium-ion batteries contain an anode structure that is of unitary construction and includes a non-porous region and a porous region including a top porous layer (Porous Region 1) having a first thickness and a first porosity, and a bottom porous layer (Porous Region 2) located beneath the top porous layer and forming an interface with the non-porous region. At least an upper portion of the non-porous region and the entirety of the porous region are composed of silicon, and the bottom porous layer has a second thickness that is greater than the first thickness, and a second porosity that is greater than the first porosity.Type: GrantFiled: July 3, 2018Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Joel P. de Souza, Devendra K. Sadana, John Collins
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Patent number: 10833187Abstract: A semiconductor device includes a substrate and a p-doped layer including a doped III-V material on the substrate. An n-type material is formed on or in the p-doped layer. The n-type material includes an oxide of a II-VI material. An oxygen scavenging interlayer is formed on the n-type material. An aluminum contact is formed in direct contact with the oxygen scavenging interlayer to form an electronic device.Type: GrantFiled: August 7, 2015Date of Patent: November 10, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jeehwan Kim, Wencong Liu, Devendra K. Sadana
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Publication number: 20200350449Abstract: Monolithic, lateral series photovoltaic and photodiode devices on an insulating substrate are provided. In one aspect, a method of forming a photovoltaic device includes: forming a photovoltaic stack on an insulating substrate that includes: a bottom contact layer disposed on the insulating substrate, a BSF layer disposed on the bottom contact layer, a junction layer disposed on the BSF layer, a window layer disposed on the junction layer, and a top contact layer disposed on the window layer; patterning the top contact layer, the window layer, the junction layer, the BSF layer and the bottom contact layer into individual device stacks; forming contact pads on patterned portions of the bottom/top contact layers in each of the device stacks; and forming interconnects in contact with the contact pads that serially connect the device stacks. A photovoltaic device is also provided.Type: ApplicationFiled: May 2, 2019Publication date: November 5, 2020Inventors: Ning Li, Devendra K. Sadana, William T. Spratt, Ghavam Shahidi
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Publication number: 20200343597Abstract: An interfacial additive layer for decreasing the interfacial resistance/impedance of a silicon based electrode-containing device such as, for example, an energy storage device or a micro-resistor, is disclosed. The interfacial additive, which is composed of evaporated lithium fluoride, is formed between a silicon based electrode and a solid polymer electrolyte layer of the device. The evaporated lithium fluoride serves as ion conductive layer. The presence of such an interfacial additive layer increases the ion and electron mobile dependent performances at the silicon based electrode interface due to significant decrease in the resistance/impedance that is observed at the respective interface as well as the impedance observed in the bulk of the device.Type: ApplicationFiled: April 29, 2019Publication date: October 29, 2020Inventors: John Collins, Teodor K. Todorov, Ali Afzali-Ardakani, Joel P. de Souza, Devendra K. Sadana