Patents by Inventor Devendra K. Sadana

Devendra K. Sadana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961958
    Abstract: A composition includes an electrode made of Lithium Manganese Oxyfluoride (LMOF). A single layer separator adheres to a surface of the electrode, is a dielectric that is conductive for Lithium ions but not electrons, and has top and bottom sides. A solid polymer electrolyte (SPE) saturates the electrode so that the LMOF is between 55 percent and 85 percent by mass of a composition of the LMOF electrode and the SPE is between 7.5 percent and 20 percent by mass of the composition of the LMOF electrode. The SPE saturates the separator so that the SPE resides both on the separator top and bottom sides so that the SPE residing on the separator top side contacts the surface. The LMOF exhibits X-Ray Diffraction spectrum peaks between twenty-two and twenty-four 2-theta degrees, between forty-eight and fifty 2-theta degrees, between fifty-four and fifty-six 2-theta degrees, and between fifty-six and fifty-eight 2-theta degrees.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: April 16, 2024
    Assignee: International Business Machines Corporation
    Inventors: John Collins, Bucknell C. Webb, Paul S. Andry, Teodor Krassimirov Todorov, Devendra K. Sadana
  • Patent number: 11948985
    Abstract: Devices, systems, methods, computer-implemented methods, apparatus, and/or computer program products that can facilitate a suspended Majorana fermion device comprising an ion implant defined nanorod in a semiconducting device are provided. According to an embodiment, a quantum computing device can comprise a Majorana fermion device coupled to an ion implanted region. The quantum computing device can further comprise an encapsulation film coupled to the ion implanted region and a substrate layer. The encapsulation film suspends the Majorana fermion device in the quantum computing device.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: April 2, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven J. Holmes, Devendra K. Sadana, Sean Hart, Patryk Gumann, Stephen W. Bedell, Ning Li
  • Publication number: 20240102201
    Abstract: An element to be used as an anode in a lithium-ion battery comprising a lithiated single crystal porous-silicon layer made on the surface of a p-doped single crystal Si of thickness 25-1000 mm and resistivity of less than 0.01-ohm cm. Successful lithiation is achieved either electrochemically or by direct alloying of lithium metal with the porous-Si with a wide range of porosities. The lithiated silicon anode allows a high cathode loading in a lithium-ion battery resulting in record current densities without the formation of lithium dendrites.
    Type: Application
    Filed: September 24, 2022
    Publication date: March 28, 2024
    Applicant: POSI ENERGY-SILICON POWER LLC
    Inventors: DEVENDRA K SADANA, Joel P. de Souza, Brain Williams, Francis Christpher Farmer
  • Patent number: 11908963
    Abstract: Photovoltaic device with band-stop filter. The photovoltaic device includes an amorphous photovoltaic material and a band-stop filter structure having a stopband extending from a lower limiting angular frequency ?min?0 to an upper limiting angular frequency ?max where ?max>?min. The band-stop filter structure is arranged in the photovoltaic device relative to the photovoltaic material in order to attenuate electromagnetic radiations reaching the photovoltaic material with angular frequencies of ?* in the stopband, so that ?min<?*<?max. The angular frequencies ?* correspond to electronic excitations ??* from valence band tail (VBT) states of the amorphous photovoltaic material to conduction band tail (CBT) states of the amorphous photovoltaic material.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: February 20, 2024
    Assignees: INTERNATIONA BUSINESS MACHINES CORPORATION, EGYPT NANOTECHNOLOGY CENTER
    Inventors: Wanda Andreoni, Alessandro Curioni, Petr Khomyakov, Jeehwan Kim, Devendra K. Sadana, Nasser D. Afify
  • Patent number: 11889774
    Abstract: A structure including a bottom electrode, a phase change material layer, the phase change material layer includes a similar lattice constant as a lattice constant of the substrate, a top electrode on and vertically aligned with the phase change material layer, a dielectric material horizontally isolating the bottom electrode from the top electrode and the phase change material layer. A structure including a phase change material layer selected from amorphous silicon, amorphous germanium and amorphous silicon germanium, a top electrode on the phase change material layer, a bottom electrode, a dielectric material isolating the bottom electrode from the top electrode and the phase change material layer. Forming a bottom electrode, forming a phase change material layer adjacent to the bottom electrode, forming a top electrode above the phase change material, forming a dielectric material horizontally isolating the bottom electrode from the top electrode and the phase change material layer.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: January 30, 2024
    Assignee: International Business Machines Corporation
    Inventors: Devendra K. Sadana, Ning Li, Bahman Hekmatshoartabari
  • Publication number: 20240014322
    Abstract: A semiconductor device fabrication method is provided. The semiconductor device fabrication method includes frontside semiconductor device processing on a frontside of a wafer, flipping the wafer, backside semiconductor device processing on a backside of the wafer and backside and frontside contact formation processing on the backside and frontside of the wafer, respectively.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Inventors: Sung Dae Suk, Somnath Ghosh, Chen Zhang, Junli Wang, Devendra K. Sadana, Dechao Guo
  • Patent number: 11864906
    Abstract: A method includes implanting an implantable biosensor within a subject where the implantable biosensor has an array of light sources and an array of light detectors, activating the array of light sources to direct light signals at a targeted tissue site in the subject, capturing, with the light detectors, the light signals reflected off the targeted site, calculating a roundtrip propagation time for each of the light signals and comparing the roundtrip propagation time for each of the light signals against previous calculated respective roundtrip propagation times to determine an occurrence of a change in the targeted tissue site.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: January 9, 2024
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Holmes, Devendra K. Sadana, Stephen W. Bedell
  • Publication number: 20230420664
    Abstract: An element to be used as an anode in a lithium-ion battery comprising an electrochemically lithiated thick or thin p or n-doped virgin single crystal Si with or without an oxide on the upper surface thereof. The lithiated structure further has a plurality of single crystalline p or n-doped Si particles dispersed over a non-lithium reactive reacting electrically conductive adhesive positioned atop a current collector.
    Type: Application
    Filed: September 24, 2022
    Publication date: December 28, 2023
    Applicant: Posi Energy- Silicon Power. LLC
    Inventors: Devendra K. Sadana, Joel P. De Souza, Brian Williams, Francis Christopher Farmer
  • Patent number: 11819333
    Abstract: A method includes implanting an implantable biosensor within a subject where the implantable biosensor has an array of light sources and an array of light detectors, activating the array of light sources to direct light signals at a targeted tissue site in the subject, capturing, with the light detectors, the light signals reflected off the targeted site, calculating a roundtrip propagation time for each of the light signals and comparing the roundtrip propagation time for each of the light signals against previous calculated respective roundtrip propagation times to determine an occurrence of a change in the targeted tissue site.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: November 21, 2023
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Holmes, Devendra K. Sadana, Stephen W. Bedell
  • Publication number: 20230363694
    Abstract: A method includes implanting an implantable biosensor within a subject where the implantable biosensor has an array of light sources and an array of light detectors, activating the array of light sources to direct light signals at a targeted tissue site in the subject, capturing, with the light detectors, the light signals reflected off the targeted site, calculating a roundtrip propagation time for each of the light signals and comparing the roundtrip propagation time for each of the light signals against previous calculated respective roundtrip propagation times to determine an occurrence of a change in the targeted tissue site.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Steven J. Holmes, Devendra K. Sadana, Stephen W. Bedell
  • Patent number: 11817501
    Abstract: A semiconductor device fabrication method is provided. The semiconductor device fabrication method includes frontside semiconductor device processing on a frontside of a wafer, flipping the wafer, backside semiconductor device processing on a backside of the wafer and backside and frontside contact formation processing on the backside and frontside of the wafer, respectively.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: November 14, 2023
    Assignee: International Business Machines Corporation
    Inventors: Sung Dae Suk, Somnath Ghosh, Chen Zhang, Junli Wang, Devendra K. Sadana, Dechao Guo
  • Patent number: 11805711
    Abstract: A Phase-Change Memory (PCM) device includes a dielectric layer, a bottom electrode disposed in the dielectric layer, a liner material disposed on the bottom electrode, a phase-change material disposed on the liner material, and a top electrode disposed on the phase-change material and in the dielectric layer.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: October 31, 2023
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Joel P. de Souza, Kevin W. Brew, Devendra K. Sadana
  • Publication number: 20230284458
    Abstract: A semiconductor structure includes a substrate having a doped silicon substrate, a buried oxide layer, and a silicon device layer. A trench capacitor having an inner electrode and a node dielectric layer is formed in a trench of the substrate. The inner electrode and the node dielectric layer extend into the doped silicon substrate. A select transistor is disposed in the silicon device layer. An embedded contact is disposed atop the trench capacitor to electrically couple a doped region of the select transistor with the inner electrode. A first dielectric layer is disposed around the select transistor. A second dielectric layer is deposited on the first dielectric layer. A contact plug is formed in the second dielectric layer and the first dielectric layer and is in direct contact with the embedded contact. A memory stack with a MTJ element is disposed on the contact plug.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Applicant: HeFeChip Corporation Limited
    Inventors: John H Zhang, Brian Li Ji, Yanzun Li, Devendra K Sadana
  • Patent number: 11742632
    Abstract: A laser structure including a Si or Ge substrate, a III-V buffer layer formed on the substrate, a light emitting diode (LED) formed on the buffer layer configured to produce visible light, a lens disposed on the LED to focus light from the LED, a photonic crystal layer formed on the LED to receive the light focused by the lens, and a monolayer semiconductor nanocavity laser formed on the photonic crystal layer for receiving light through the photonic crystal layer from the LED. The LED and the laser are formed monolithically and the LED acts as an optical pump for the laser.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: August 29, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana, Brent A. Wacaser
  • Patent number: 11730067
    Abstract: Techniques for the integration of SiGe/Si optical resonators with qubit and CMOS devices using structured substrates are provided. In one aspect, a waveguide structure includes: a wafer; and a waveguide disposed on the wafer, the waveguide having a SiGe core surrounded by Si, wherein the wafer has a lower refractive index than the Si (e.g., sapphire, diamond, SiC, and/or GaN). A computing device and a method for quantum computing are also provided.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: August 15, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jason S. Orcutt, Devendra K. Sadana
  • Publication number: 20230255123
    Abstract: Systems and techniques that facilitate quantum tuning via permanent magnetic flux elements are provided. In various embodiments, a system can comprise a qubit device. In various aspects, the system can further comprise a permanent magnet having a first magnetic flux, wherein an operational frequency of the qubit device is based on the first magnetic flux. In various instances, the system can further comprise an electromagnet having a second magnetic flux that tunes the first magnetic flux. In various cases, the permanent magnet can comprise a nanoparticle magnet. In various embodiments, the nanoparticle magnet can comprise manganese nanoparticles embedded in a silicon matrix. In various aspects, the system can further comprise an electrode that applies an electric current to the nanoparticle magnet in a presence of the second magnetic flux, thereby changing a strength of the first magnetic flux.
    Type: Application
    Filed: March 29, 2023
    Publication date: August 10, 2023
    Inventors: Steven J. Holmes, Devendra K. Sadana, David C. Mckay, Jared Barney Hertzberg, Stephen W. Bedell, Ning Li
  • Patent number: 11721801
    Abstract: A silicon-based electrode forms an interface with a layer pair being: 1. a thin, semi-dielectric layer made of a lithium (Li) compound, e.g. lithium fluoride, LiF, disposed on and adheres to the electrode surface of the silicon-based electrode and 2. an molten-ion conductive layer of a lithium containing salt (lithium salt layer) disposed on the semi-dielectric layer. One or more device layers can be disposed on the layer pair to make devices such as energy storage devices, like batteries. The interface has a low resistivity that reduces the energy losses and generated heat of the devices.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: August 8, 2023
    Assignee: International Business Machines Corporation, Armonk
    Inventors: John Collins, Teodor Krassimirov Todorov, Ali Afzali-Ardakani, Joel P. de Souza, Devendra K. Sadana
  • Publication number: 20230247917
    Abstract: A method of producing a quantum circuit includes forming a mask on a substrate to cover a first portion of the substrate, implanting a second portion of the substrate with ions, and removing the mask, thereby providing a nanowire. The method further includes forming a first lead and a second lead, the first lead and the second lead each partially overlapping the nanowire. In operation, a portion of the nanowire between the first and second leads forms a quantum dot, thereby providing a quantum dot Josephson junction. The method further includes forming a third lead and a fourth lead, one of the third and fourth leads partially overlapping the nanowire, wherein the third lead is separated from the fourth lead by a dielectric layer, thereby providing a Dolan bridge Josephson junction. The nanowire is configured to connect the quantum dot Josephson junction and the Dolan bridge Josephson junction in series.
    Type: Application
    Filed: March 29, 2023
    Publication date: August 3, 2023
    Inventors: Steven J. Holmes, Devendra K. Sadana, Ning Li, Stephen W. Bedell
  • Patent number: 11715517
    Abstract: A phase change (PCM) memory device that includes a PCM and a resistance-capacitance (RC) circuit. The PCM has one or more PCM properties, each PCM property has a plurality of PCM property states. As the PCM property states of a given property are Set or Reset, the PCM property states each produce an incremental change to a property level of the respective/associated PCM property, e.g., PCM conductance. The incremental changes to property level of the PCM memory device are in response to application of one or more of a pulse number of voltage pulses. The RC circuit produces a configuring current that flows through the PCM in response to one or more of the voltage pulses. The configuring current modifies one or more of the incremental changes to one or more of the property levels so that the property level changes lineally with respect to the pulse number. The PCM memory device has use in a synapse connector, e.g., in a memory array.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: August 1, 2023
    Assignee: International Business Machines Corporation
    Inventors: Ning Li, Wanki Kim, Devendra K Sadana
  • Publication number: 20230210018
    Abstract: A vertical Josephson Junction (JJ) qubit device that is fabricated from crystalline silicon material is provided. The JJ device has a substrate of epitaxial silicon, a lower superconducting electrode that is a superconducting region of the epitaxial silicon and an upper superconducting electrode of a metallic superconductor. The JJ device also has a junction layer. A section of the junction layer between the lower and upper superconducting electrodes forms a junction of the JJ device. Resonator and/or capacitor wiring of the JJ device is also fabricated using the metallic superconductor. The superconducting region is epitaxial silicon that is doped or implanted with boron or gallium. The substrate, the junction layer, and the implanted epitaxial silicon share a contiguous crystalline structure.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 29, 2023
    Inventors: Steven J. Holmes, Devendra K. Sadana, Oleg Gluschenkov, Stephen W. Bedell