Abstract: A semiconductor structure includes a substrate having a doped silicon substrate, a buried oxide layer, and a silicon device layer. A trench capacitor having an inner electrode and a node dielectric layer is formed in a trench of the substrate. The inner electrode and the node dielectric layer extend into the doped silicon substrate. A select transistor is disposed in the silicon device layer. An embedded contact is disposed atop the trench capacitor to electrically couple a doped region of the select transistor with the inner electrode. A first dielectric layer is disposed around the select transistor. A second dielectric layer is deposited on the first dielectric layer. A contact plug is formed in the second dielectric layer and the first dielectric layer and is in direct contact with the embedded contact. A memory stack with a MTJ element is disposed on the contact plug.

Abstract: Systems and techniques that facilitate quantum tuning via permanent magnetic flux elements are provided. In various embodiments, a system can comprise a qubit device. In various aspects, the system can further comprise a permanent magnet having a first magnetic flux, wherein an operational frequency of the qubit device is based on the first magnetic flux. In various instances, the system can further comprise an electromagnet having a second magnetic flux that tunes the first magnetic flux. In various cases, the permanent magnet can comprise a nanoparticle magnet. In various embodiments, the nanoparticle magnet can comprise manganese nanoparticles embedded in a silicon matrix. In various aspects, the system can further comprise an electrode that applies an electric current to the nanoparticle magnet in a presence of the second magnetic flux, thereby changing a strength of the first magnetic flux.

Abstract: A method of producing a quantum circuit includes forming a mask on a substrate to cover a first portion of the substrate, implanting a second portion of the substrate with ions, and removing the mask, thereby providing a nanowire. The method further includes forming a first lead and a second lead, the first lead and the second lead each partially overlapping the nanowire. In operation, a portion of the nanowire between the first and second leads forms a quantum dot, thereby providing a quantum dot Josephson junction. The method further includes forming a third lead and a fourth lead, one of the third and fourth leads partially overlapping the nanowire, wherein the third lead is separated from the fourth lead by a dielectric layer, thereby providing a Dolan bridge Josephson junction. The nanowire is configured to connect the quantum dot Josephson junction and the Dolan bridge Josephson junction in series.

Abstract: A vertical Josephson Junction (JJ) qubit device that is fabricated from crystalline silicon material is provided. The JJ device has a substrate of epitaxial silicon, a lower superconducting electrode that is a superconducting region of the epitaxial silicon and an upper superconducting electrode of a metallic superconductor. The JJ device also has a junction layer. A section of the junction layer between the lower and upper superconducting electrodes forms a junction of the JJ device. Resonator and/or capacitor wiring of the JJ device is also fabricated using the metallic superconductor. The superconducting region is epitaxial silicon that is doped or implanted with boron or gallium. The substrate, the junction layer, and the implanted epitaxial silicon share a contiguous crystalline structure.

Abstract: A Josephson Junction qubit device is provided. The device includes a substrate of silicon material. The device includes first and second electrodes of superconducting metal. The device may include a nanowire created by direct ion implantation on to the silicon material to connect the first and second electrodes. The device may include first and second superconducting regions created by direct ion implantation on to the silicon material, the first superconducting region connecting the first electrode and the second superconducting region connecting the second electrode, with a silicon channel formed by a gap between the first and second superconducting regions.

Abstract: A photovoltaic structure includes a substrate; and a plurality of off-axis, doped silicon regions outward of the substrate. The plurality of off-axis, doped silicon regions have an off-axis lattice orientation at a predetermined non-zero angle. A plurality of photovoltaic devices of a first chemistry are located outward of the plurality of off-axis, doped silicon regions. Optionally, a plurality of photovoltaic devices of a second chemistry, different than the first chemistry, are located outward of the substrate and are spaced away from the plurality of off-axis, doped silicon regions.

Abstract: A bottom electrode, a phase change material layer, the phase change material layer includes a similar lattice constant as a lattice constant of the bottom electrode, and a top electrode vertically aligned. A phase change material layer, a top electrode adjacent to a first vertical side surface of the phase change material layer, and a bottom electrode adjacent to a second vertical side surface of the phase change material layer. Forming a phase change material layer, forming a top electrode adjacent to a first vertical side surface and overlapping a first portion of an upper horizontal surface of the phase change material layer, forming a bottom electrode, adjacent to a second vertical side surface and overlapping a second portion of the upper horizontal surface of the phase change material layer, and forming a dielectric material horizontally isolating the bottom electrode and the top electrode.

Abstract: A crystallization seed layer in a substrate, a phase change material layer, the phase change material layer includes a similar lattice constant as a lattice constant of the crystallization seed layer, a top electrode adjacent to a first vertical side surface and a bottom electrode adjacent to a second vertical side surface of the phase change material layer. A plurality of memory structures configured in a crossbar array, each including a crystallization seed layer, a phase change material layer above, a top electrode adjacent to a first vertical side surface and a bottom electrode adjacent to a second vertical side surface of the phase change material layer. A method including forming a crystallization seed layer, forming a phase change material layer, forming a top electrode and a bottom electrode on the substrate, each adjacent to a vertical side surface of the phase change material layer.

Abstract: A structure including a bottom electrode, a phase change material layer, the phase change material layer includes a similar lattice constant as a lattice constant of the substrate, a top electrode on and vertically aligned with the phase change material layer, a dielectric material horizontally isolating the bottom electrode from the top electrode and the phase change material layer. A structure including a phase change material layer selected from amorphous silicon, amorphous germanium and amorphous silicon germanium, a top electrode on the phase change material layer, a bottom electrode, a dielectric material isolating the bottom electrode from the top electrode and the phase change material layer. Forming a bottom electrode, forming a phase change material layer adjacent to the bottom electrode, forming a top electrode above the phase change material, forming a dielectric material horizontally isolating the bottom electrode from the top electrode and the phase change material layer.

Abstract: Systems and techniques that facilitate quantum tuning via permanent magnetic flux elements are provided. In various embodiments, a system can comprise a qubit device. In various aspects, the system can further comprise a permanent magnet having a first magnetic flux, wherein an operational frequency of the qubit device is based on the first magnetic flux. In various instances, the system can further comprise an electromagnet having a second magnetic flux that tunes the first magnetic flux. In various cases, the permanent magnet can comprise a nanoparticle magnet. In various embodiments, the nanoparticle magnet can comprise manganese nanoparticles embedded in a silicon matrix. In various aspects, the system can further comprise an electrode that applies an electric current to the nanoparticle magnet in a presence of the second magnetic flux, thereby changing a strength of the first magnetic flux.

Abstract: A photovoltaic structure includes a substrate; and a plurality of off-axis, doped silicon regions outward of the substrate. The plurality of off-axis, doped silicon regions have an off-axis lattice orientation at a predetermined non-zero angle. A plurality of photovoltaic devices of a first chemistry are located outward of the plurality of off-axis, doped silicon regions. Optionally, a plurality of photovoltaic devices of a second chemistry, different than the first chemistry, are located outward of the substrate and are spaced away from the plurality of off-axis, doped silicon regions.

Abstract: Double gate/gate-all-around and variable threshold voltage MOSFET devices and techniques for fabrication thereof in a single backside process are provided. In one aspect, a MOSFET device includes: a channel in between source/drain regions; at least one first gate disposed on a first side of the channel at a frontside of the MOSFET device; gate spacers offsetting the source/drain regions from the at least one first gate; and at least one second gate disposed on a second side of the channel directly opposite the at least one first gate at a backside of the MOSFET device. At least one gate contact can be present in direct contact with the at least one first gate and the at least one second gate. A method of forming a MOSFET device is also provided.

Abstract: A gated Josephson junction includes a substrate and a vertical Josephson junction formed on the substrate and extending substantially normal the substrate. The vertical Josephson junction includes a first superconducting layer, a semiconducting layer, and a second superconducting layer. The first superconducting layer, the semiconducting layer, and the second superconducting layer form a stack that is substantially perpendicular to the substrate. The gated Josephson junction includes a gate dielectric layer in contact with the first superconducting layer, the semiconducting layer, and the second superconducting layer at opposing side surfaces of the vertical Josephson junction, and a gate electrically conducting layer in contact with the gate dielectric layer. The gate electrically conducting layer is separated from the vertical Josephson junction by the gate dielectric layer.

Abstract: A phase change memory (PCM) structure configured for performing a gradual reset operation includes first and second electrodes and a phase change material layer disposed between the first and second electrodes. The PCM structure further includes a thermal insulation layer disposed on at least sidewalls of the first and second electrodes and phase change material layer. The thermal insulation layer is configured to provide non-uniform heating of the phase change material layer. Optionally, the thermal insulation layer may be formed as an air gap. The PCM structure may be configured having the first and second electrodes aligned in a vertical or a lateral arrangement.

Abstract: Devices, systems, methods, computer-implemented methods, apparatus, and/or computer program products that can facilitate an epitaxial Josephson junction transmon device are provided. According to an embodiment, a device can comprise a substrate. The device can further comprise an epitaxial Josephson junction transmon device coupled to the substrate. According to an embodiment, a device can comprise an epitaxial Josephson junction transmon device coupled to a substrate. The device can further comprise a tuning gate coupled to the substrate and formed across the epitaxial Josephson junction transmon device. According to an embodiment, a device can comprise a first superconducting region and a second superconducting region formed on a substrate. The device can further comprise an epitaxial Josephson junction tunneling channel coupled to the first superconducting region and the second superconducting region.

Abstract: Compound semiconductor and silicon-based structures are epitaxially formed on semiconductor substrates and transferred to a carrier substrate. The transferred structures can be used to form discrete photovoltaic and light-emitting devices on the carrier substrate. Silicon-containing layers grown on doped donor semiconductor substrates and compound semiconductor layers grown on off-cut semiconductor substrates form elements of the devices. The carrier substrates may be electrically insulating substrates or include electrically insulating layers to which photovoltaic and/or light-emitting structures are bonded.

Abstract: A semiconductor device fabrication method is provided. The semiconductor device fabrication method includes frontside semiconductor device processing on a frontside of a wafer, flipping the wafer, backside semiconductor device processing on a backside of the wafer and backside and frontside contact formation processing on the backside and frontside of the wafer, respectively.

Abstract: A computing device is provided. The computing device includes a sapphire substrate having a first surface and a second surface opposed to the first surface, a light receiving device having a first surface and a second surface opposed to the first surface, the second surface of the light receiving device coupled to the first surface of the sapphire substrate, a memory coupled to the first surface of the light receiving device, and an antenna coupled to the first surface of the sapphire substrate.

Abstract: A system for and methods of semiconductor testing and characterization are disclosed. The system includes a parallel dipole line (PDL) system for applying a magnetic field to a sample in a measurement chamber and electrical equipment for testing the sample. The testing includes applying a first light exposure to the sample with the PDL system set to zero magnetic field and monitoring longitudinal resistance (Rxx) of the sample as intensity of the first light exposure varies. A second light exposure is applied with the PDL system set to maximum magnetic field, and transverse magnetoresistance (RB+) is monitored as light intensity varies. A third light exposure is applied with the PDL system set to minimum magnetic field, and transverse magnetoresistance (RB?) is monitored as light intensity varies. The characterization includes carrying out a photo-Hall analysis based on data from the testing.

Abstract: Methods of forming a controllable resistive element include forming source and drain regions in a substrate. A battery stack is formed on a substrate between the source and drain regions. Respective anode and cathode electrical connections are formed to the battery stack. Respective source and drain electrical connections are formed.