Patents by Inventor Devendra Kumar

Devendra Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040118816
    Abstract: Methods and apparatus are provided for igniting, modulating, and sustaining a plasma for various plasma processes and treatments. In one embodiment, a plasma is ignited by subjecting a gas in a multi-mode processing cavity to electromagnetic radiation having a frequency between about 1 MHz and about 333 GHz in the presence of a plasma catalyst, which may be passive or active. A passive plasma catalyst may include, for example, any object capable of inducing a plasma by deforming a local electric field. An active plasma catalyst can include any particle or high energy wave packet capable of transferring a sufficient amount of energy to a gaseous atom or molecule to remove at least one electron from the gaseous atom or molecule, in the presence of electromagnetic radiation.
    Type: Application
    Filed: May 7, 2003
    Publication date: June 24, 2004
    Inventors: Satyendra Kumar, Devendra Kumar
  • Publication number: 20040107796
    Abstract: Apparatus and methods for plasma-assisted melting are provided. In one embodiment, a plasma-assisted melting method can include: (1) adding a solid to a melting region, (2) forming a plasma in a cavity by subjecting a gas to electromagnetic radiation having a frequency less than about 333 GHz in the presence of a plasma catalyst, wherein the cavity has a wall, (3) sustaining the plasma in the cavity such that energy from the plasma passes through the wall into the melting region and melts the solid into a liquid, and (4) collecting the liquid. Solids that can be melted consistent with this invention can include metals, such as metal ore and scrap metal. Various plasma catalysts are also provided.
    Type: Application
    Filed: June 2, 2003
    Publication date: June 10, 2004
    Inventors: Satyendra Kumar, Devendra Kumar
  • Publication number: 20040107896
    Abstract: Methods and apparatus are provided for igniting, modulating, and sustaining a plasma for at least partially decrystallizing a surface of an object. In one embodiment, a method is provided for decrystallizing a surface of an object by forming a plasma (such as by subjecting a gas to an amount of electromagnetic radiation, optionally in the presence of a plasma catalyst) and exposing the surface of the object to the plasma.
    Type: Application
    Filed: May 7, 2003
    Publication date: June 10, 2004
    Inventors: Devendra Kumar, Satyendra Kumar
  • Publication number: 20040087133
    Abstract: A method for manufacturing a semiconductor device includes: (i) depositing a sacrificial layer made of an organic polymer such as benzocyclobutene on a substrate having a circuit formed thereon; (ii) etching the sacrificial layer except for a portion where air gaps are to be formed; (iii) depositing a low-dielectric layer over the substrate until the portion for air gaps is entirely enclosed in the low-dielectric layer; (iv) etching the low-dielectric layer to form via holes and trenches there through; (v) prior or subsequent to step (iv), removing the portion for air gaps; and (vi) depositing copper in the vias and trenches which are filled with the copper contacting a surface of the substrate.
    Type: Application
    Filed: October 24, 2003
    Publication date: May 6, 2004
    Applicant: ASM JAPAN K.K.
    Inventor: Devendra Kumar
  • Publication number: 20040047993
    Abstract: Single wafer processing methods and systems for manufacturing films having low-k properties and low indices of refraction. The methods incorporate a processing station in which both curing and post-cure, in situ gas cooling take place.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 11, 2004
    Inventors: Devendra Kumar, Jeffrey D. Womack, Vuong P. Nguyen, Jack S. Kasahara, Sokol Ibrani
  • Publication number: 20040013886
    Abstract: A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.
    Type: Application
    Filed: July 22, 2002
    Publication date: January 22, 2004
    Applicant: International Business Machines Corporation
    Inventors: Stephen Richard Fox, Neena Garg, Kenneth John Giewont, Junedong Lee, Siegfried Lutz Maurer, Dan Moy, Maurice Heathcote Norcott, Devendra Kumar Sadana
  • Publication number: 20040004062
    Abstract: Methods and apparatus for plasma-assisted joining of one or more parts together are provided. The joining process may include, for example, placing at least first and second joining areas in proximity to one another in a cavity, forming a plasma in the cavity by subjecting a gas to electromagnetic radiation in the presence of a plasma catalyst, and sustaining the plasma at least until the first and second joining areas are joined. Plasma catalysts, and methods and apparatus for igniting, modulating, and sustaining a joining plasma, are provided. Additional cavity shapes, and methods and apparatus for selective plasma-joining, are also provided.
    Type: Application
    Filed: May 7, 2003
    Publication date: January 8, 2004
    Inventors: Devendra Kumar, Satyendra Kumar
  • Publication number: 20040001295
    Abstract: Plasma-assisted methods and apparatus that use multiple radiation sources are provided. In one embodiment, a plasma is ignited by subjecting a gas in a processing cavity to electromagnetic radiation having a frequency less than about 333 GHz in the presence of a plasma catalyst, which may be passive or active. A controller can be used to delay activation of one radiation source with respect to another.
    Type: Application
    Filed: May 7, 2003
    Publication date: January 1, 2004
    Inventors: Satyendra Kumar, Devendra Kumar
  • Patent number: 6658118
    Abstract: Apparatus for suppressing fluid-borne noise in a fluid conduit (12 or 12a) that includes a vibration sensor (36, 36a or 36b) for operative coupling to the conduit for providing an electrical sensor signal as a function of fluid pressure fluctuations in the conduit. A piezoelectric actuator (40, 40a or 40b) is adapted to be mounted on the conduit for imparting pressure fluctuations to fluid in the conduit. An electronic controller (38, 38a or 38b) is responsive to the sensor signal for energizing the actuator 180° out of phase with fluid pressure fluctuations sensed by the sensor. The sensor may be either closely coupled to the actuator, or separate from the actuator and disposed upstream of the actuator with respect to the direction of fluid flow through the conduit. The sensor in the preferred embodiments of the invention comprises a piezoelectric sensor, and the actuator comprises a stack of piezoelectric elements.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: December 2, 2003
    Assignee: Dana Corporation
    Inventors: Satyendra Kumar, Devendra Kumar, Michael J. Dougherty
  • Publication number: 20030162408
    Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The silicon-containing hydrocarbon compound includes a cyclosiloxan compound or a linear siloxan compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a. low dielectric constant.
    Type: Application
    Filed: December 11, 2002
    Publication date: August 28, 2003
    Applicant: ASM JAPAN K.K.
    Inventors: Nobuo Matsuki, Yasuyoshi Hyodo, Masashi Yamaguchi, Yoshinori Morisada, Atsuki Fukazawa, Manabu Kato, Shinya Kaneko, Devendra Kumar, Seijiro Umemoto
  • Publication number: 20030104681
    Abstract: A method and structure for forming patterned SOI regions and bulk regions is described wherein a silicon containing layer over an insulator may have a plurality of selected thickness' and wherein bulk regions may be suitable to form DRAM's and SOI regions may be suitable to form merged logic such as CMOS. Ion implantation of oxygen is used to formed patterned buried oxide layers at selected depths and mask edges may be shaped to form stepped oxide regions from one depth to another. Trenches may be formed through buried oxide end regions to remove high concentrations of dislocations in single crystal silicon containing substrates. The invention overcomes the problem of forming DRAM with a storage capacitor formed with a deep, trench in bulk Si while forming merged logic regions on SOI.
    Type: Application
    Filed: October 11, 2001
    Publication date: June 5, 2003
    Inventors: Bijan Davari, Devendra Kumar Sadana, Ghavam G. Shahidi, Sandip Tiwari
  • Patent number: 6454877
    Abstract: A method and apparatus are provided for treating the surface of a metal body through phase transformation, ion implantation, and/or diffusion and to form new phases of metallic materials. The method and apparatus have been shown to be particularly useful to improve the hardness and corrosion resistance of ferrous and non-ferrous metals. Generally, the method comprises irradiating a portion of the metal body (18) with a laser (12), and directing a stream of gas (22) onto the same portion of the metal body simultaneously with and preferably for a duration after the laser is turned off. Preferably, the laser (12) is a carbon dioxide laser operated in a pulsed mode to control heating of the metal (18). The gas (22) is preferably carbon dioxide to quickly cool the metal when the laser is off, and to provide carbon atoms for deposition onto the body.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: September 24, 2002
    Assignee: Dana Corporation
    Inventors: Devendra Kumar, Satyendra Kumar, Michael L. Dougherty
  • Publication number: 20020132052
    Abstract: Single wafer processing methods and systems for manufacturing films having low-k properties and low indices of refraction. The methods incorporate a processing station in which both curing and post-cure, in situ gas cooling take place.
    Type: Application
    Filed: July 11, 2001
    Publication date: September 19, 2002
    Inventors: Devendra Kumar, Jeffrey D. Womack, Vuong P. Nguyen, Jack S. Kasahara, Sokol Ibrani
  • Publication number: 20020115240
    Abstract: The present invention provides various methods for forming a ground-plane SOI device which comprises at least a field effect transistor formed on a top Si-containing surface of a silicon-on-insulator (SOI) wafer; and an oxide region present beneath the field effect transistor, located in an area between source and drain regions which are formed in said SOI wafer, said oxide region is butted against shallow extensions formed in said SOI wafer, and is laterally adjacent to said source and drain regions.
    Type: Application
    Filed: February 20, 2001
    Publication date: August 22, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fariborz Assaderaghi, Tze-Chiang Chen, K. Paul Muller, Edward Joseph Nowak, Devendra Kumar Sadana, Ghavam G. Shahidi
  • Patent number: 6432754
    Abstract: The present invention provides various methods for forming a ground-plane SOI device which comprises at least a field effect transistor formed on a top Si-containing surface of a silicon-on-insulator (SOI) wafer; and an oxide region present beneath the field effect transistor, located in an area between source and drain regions which are formed in said SOI wafer, said oxide region is butted against shallow extensions formed in said SOI wafer, and is laterally adjacent to said source and drain regions.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: August 13, 2002
    Assignee: International Business Machines Corporation
    Inventors: Fariborz Assaderaghi, Tze-Chiang Chen, K. Paul Muller, Edward Joseph Nowak, Devendra Kumar Sadana, Ghavam G. Shahidi
  • Patent number: 6423947
    Abstract: A processing chamber and methods for employing this processing chamber to thermally treat wafer-like objects. The chamber comprises a double walled shell, a pedestal style heater, internal passages for the transport of cooling gases and removal of exhaust gases, independently variable gas introduction patterns, and a movable door for sealing the chamber. The chamber is designed to permit in situ cooling of wafer-like objects and to provide means for precise optimization of this cooling. The methods provide for the processing of the wafer-like object in an environment where the temperature, rate of change of the temperature, composition of gases and the relative timings of changes to these variables may be controlled to achieve the desired material properties in the wafer-like object or in films contained on this wafer-like object.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: July 23, 2002
    Assignee: FSI International, Inc.
    Inventors: Jeffrey D. Womack, Vuong P. Nguyen, Devendra Kumar, Jack S. Kasahara, Sokol Ibrani
  • Patent number: 6333532
    Abstract: A method and structure for forming patterned SOI regions and bulk regions is described wherein a silicon containing layer over an insulator may have a plurality of selected thickness' and wherein bulk regions may be suitable to form DRAM's and SOI regions may be suitable to form merged logic such as CMOS. Ion implantation of oxygen is used to formed patterned buried oxide layers at selected depths and mask edges may be shaped to form stepped oxide regions from one depth to another. Trenches may be formed through buried oxide end regions to remove high concentrations of dislocations in single crystal silicon containing substrates. The invention overcomes the problem of forming DRAM with a storage capacitor formed with a deep trench in bulk Si while forming merged logic regions on SOI.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Bijan Davari, Devendra Kumar Sadana, Ghavam G. Shahidi, Sandip Tiwari
  • Patent number: 6320079
    Abstract: A process for preparing S-(&ohgr;-aminoalkylamino) alkyl aryl sulfide dihydrochlorides includes the steps of (a) reacting aryl mercaptan and (&ohgr;-aminoalkylamino) alkylbromide dihydrobromide to cause condensation thereof in the presence of an organic base in an organic solvent and provide a condensation product; (b) converting the condensation product to a dihydrochloride salt; and (c) precipitating the dihydrochloride salt. Preferably the precipitated dihydrochloride salt is recrystallized. These dihydrochlorides are new and effective antidotes for sulfur mustard toxicity.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: November 20, 2001
    Assignee: The Chief Controller, Research & Ministry of Defense, Goverment of India
    Inventors: Uma Joshi, Syed Kalbey Raza, Pravin Kumar, Rajagopalan Vijayaraghavan, Devendra Kumar Jaiswal
  • Publication number: 20010040155
    Abstract: A processing chamber and methods for employing this processing chamber to thermally treat wafer-like objects. The chamber comprises a double walled shell, a pedestal style heater, internal passages for the transport of cooling gases and removal of exhaust gases, independently variable gas introduction patterns, and a movable door for sealing the chamber. The chamber is designed to permit in situ cooling of wafer-like objects and to provide means for precise optimization of this cooling. The methods provide for the processing of the wafer-like object in an environment where the temperature, rate of change of the temperature, composition of gases and the relative timings of changes to these variables may be controlled to achieve the desired material properties in the wafer-like object or in films contained on this wafer-like object.
    Type: Application
    Filed: June 29, 2001
    Publication date: November 15, 2001
    Applicant: FSI International Inc.
    Inventors: Jeffrey D. Womack, Vuong P. Nguyen, Devendra Kumar, Jack S. Kasahara, Sokol Ibrani
  • Patent number: 6307184
    Abstract: A processing chamber and methods for employing this processing chamber to thermally treat wafer-like objects. The chamber comprises a double walled shell, a pedestal style heater, internal passages for the transport of cooling gases and removal of exhaust gases, independently variable gas introduction patterns, and a movable door for sealing the chamber. The chamber is designed to permit in situ cooling of wafer-like objects and to provide means for precise optimization of this cooling. The methods provide for the processing of the wafer-like object in an environment where the temperature, rate of change of the temperature, composition of gases and the relative timings of changes to these variables may be controlled to achieve the desired material properties in the wafer-like object or in films contained on this wafer-like object.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: October 23, 2001
    Assignee: FSI International, Inc.
    Inventors: Jeffrey D. Womack, Vuong P. Nguyen, Devendra Kumar, Jack S. Kasahara, Sokol Ibrani