Patents by Inventor Dheeraj Srinivasan

Dheeraj Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9478305
    Abstract: A disclosed example includes selectively precharging first bitlines of first multi-level cell (MLC) memory cells of a wordline without precharging second bitlines of second MLC memory cells of the wordline during a program verify. First strobe state outputs of the first MLC memory cells are obtained based on first sensed threshold voltage levels of the first MLC memory cells sensed at a first time. Second strobe state outputs of the first MLC memory cells are obtained based on second sensed threshold voltage levels of the first MLC memory cells sensed at a second time. Based on the first and second strobe state outputs, a first MLC memory cell of the first MLC memory cells is programmed using a first programming pulse, and a second MLC memory cell of the first MLC memory cells is programmed using a second programming pulse having a relatively higher voltage than the first programming pulse.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventor: Dheeraj Srinivasan