Patents by Inventor Dieter Pierreux

Dieter Pierreux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11088002
    Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: August 10, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed, Cornelis Thaddeus Herbschleb, Hessel Sprey
  • Patent number: 11056353
    Abstract: The disclosure relates generally to the field of processing substrates, for example comprising materials such as quartz, glass or silicon. The disclosure more particular relates to providing wet etch protection layers comprising boron and carbon and etching the substrate in a hydrogen fluoride aqueous solution. One or more of the boron and carbon containing films can have a thickness of at least 5, preferably 10 and, more preferably 30 nm. The method comprises wet etching the substrate in a hydrofluoric acid solution with a hydrogen fluoride concentration of at least 10 wt. % for at least 5 minutes.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: July 6, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed
  • Publication number: 20210151315
    Abstract: Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 20, 2021
    Inventors: Dieter Pierreux, Anna Trovato, Kelly Houben, Steven van Aerde, Bert Jongbloed, Wilco A. Verweij
  • Publication number: 20210071298
    Abstract: A sequential infiltration synthesis apparatus comprising: a reaction chamber constructed and arranged to hold at least a first substrate; a precursor distribution and removal system to provide to and remove from the reaction chamber a vaporized first or second precursor; and, a sequence controller operably connected to the precursor distribution and removal system and comprising a memory provided with a program to execute infiltration of an infiltrateable material provided on the substrate when run on the sequence controller by: activating the precursor distribution and removal system to provide and maintain the first precursor for a first period T1 in the reaction chamber; activating the precursor distribution and removal system to remove a portion of the first precursor from the reaction chamber for a second period T2; and, activating the precursor distribution and removal system to provide and maintain the second precursor for a third period T3 in the reaction chamber.
    Type: Application
    Filed: November 19, 2020
    Publication date: March 11, 2021
    Inventors: Jan Willem Maes, Werner Knaepen, Krzysztof Kamil Kachel, David Kurt de Roest, Bert Jongbloed, Dieter Pierreux
  • Publication number: 20210057275
    Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.
    Type: Application
    Filed: August 17, 2020
    Publication date: February 25, 2021
    Inventors: Dieter Pierreux, Steven van Aerde, Bert Jongbloed
  • Publication number: 20200270752
    Abstract: The disclosure relates to a substrate processing apparatus, comprising: a first reactor constructed and arranged to process a rack with a plurality of substrates therein; a second reactor constructed and arranged to process a substrate; and, a substrate transfer device constructed and arranged to transfer substrates to and from the first and second reactor. The second reactor may be provided with an illumination system constructed and arranged to irradiate ultraviolet radiation within a range from 100 to 500 nanometers onto a top surface of at least a substrate in the second reactor.
    Type: Application
    Filed: February 21, 2020
    Publication date: August 27, 2020
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed, Jeroen Fluit
  • Patent number: 10741385
    Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: August 11, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido Van Der Star, Toshiya Suzuki
  • Publication number: 20200227250
    Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 16, 2020
    Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido Van Der Star, Toshiya Suzuki
  • Patent number: 10699899
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: June 30, 2020
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20200181769
    Abstract: Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.
    Type: Application
    Filed: December 10, 2019
    Publication date: June 11, 2020
    Inventors: Tom E. Blomberg, Eva E. Tois, Robert Huggare, Jan Willem Maes, Vladimir Machkaoutsan, Dieter Pierreux
  • Patent number: 10513772
    Abstract: Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: December 24, 2019
    Assignee: ASM International N.V.
    Inventors: Tom E. Blomberg, Eva E. Tois, Robert Huggare, Jan Willem Maes, Vladimir Machkaoutsan, Dieter Pierreux
  • Patent number: 10460932
    Abstract: Amorphous silicon-filled gaps may be formed having no or a low occurrence of voids in the amorphous silicon fill, while maintaining a smooth exposed silicon surface. A gap in a substrate may be filled with amorphous silicon by heating the substrate to a deposition temperature between 300 and 500° C. and providing a feed gas that comprises a first silicon reactant to deposit an amorphous silicon film into the gap with an hydrogen concentration between 0.1 and 10 at. %. The deposited silicon film may subsequently be annealed. After the anneal, any voids may be reduced in size and this reduction in size may occur to such an extent that the voids may be eliminated.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: October 29, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Steven R. A. Van Aerde, Kelly Houben, Maarten Stokhof, Bert Jongbloed, Dieter Pierreux
  • Patent number: 10453685
    Abstract: The invention relates to a method of forming a semiconductor device by patterning a substrate by providing an amorphous silicon layer on the substrate and forming a hard mask layer on the amorphous silicon layer. The amorphous silicon layer is provided with an anti-crystallization dopant to keep the layer amorphous at increased temperatures (relative to not providing the anti-crystallization dopant). The hard mask layer may comprise silicon and nitrogen.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: October 22, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Kelly Houben, Steven R. A. Van Aerde, Maarten Stokhof, Bert Jongbloed, Dieter Pierreux, Werner Knaepen
  • Publication number: 20190304821
    Abstract: The invention relates to a substrate rack and a substrate processing system for processing substrates in a reaction chamber. The substrate rack may be used for introducing a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the substrates in a spaced apart relationship. The rack may have an illumination system to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed, Cornelis Thaddeus Herbschleb, Hessel Sprey
  • Publication number: 20190301014
    Abstract: The invention relates to a substrate processing apparatus comprising a reaction chamber provided with a substrate rack for holding a plurality of substrates in the reaction chamber. The substrate rack may have a plurality of spaced apart substrate holding provisions configured to hold the plurality of substrates. The apparatus may have an illumination system constructed and arranged to irradiate radiation with a range from 100 to 500 nanometers onto a top surface of the substrates.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: Dieter Pierreux, Cornelis Thaddeus Herbschleb, Werner Knaepen, Bert Jongbloed, Steven Van Aerde, Kelly Houben, Theodorus Oosterlaken, Chris de Ridder, Lucian Jdira
  • Publication number: 20190295837
    Abstract: There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area.
    Type: Application
    Filed: July 14, 2017
    Publication date: September 26, 2019
    Inventors: Viljami Pore, Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Gido Van Der Star, Toshiya Suzuki
  • Patent number: 10343907
    Abstract: In some embodiments, a system is disclosed for delivering hydrogen peroxide to a semiconductor processing chamber. The system includes a process canister for holding a H2O2/H2O mixture in a liquid state, an evaporator provided with an evaporator heater, a first feed line for feeding the liquid H2O2/H2O mixture to the evaporator, and a second feed line for feeding the evaporated H2O2/H2O mixture to the processing chamber, the second feed line provided with a second feed line heater. The evaporator heater is configured to heat the evaporator to a temperature lower than 120° C. and the second feed line heater is configured to heat the feed line to a temperature equal to or higher than the temperature of the evaporator.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: July 9, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Bert Jongbloed, Dieter Pierreux, Cornelius A. van der Jeugd, Lucian Jdira, Radko G. Bankras, Theodorus G. M. Oosterlaken
  • Publication number: 20190103266
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Application
    Filed: August 20, 2018
    Publication date: April 4, 2019
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Patent number: 10199223
    Abstract: An etch stop layer comprises a metal oxide comprising a metal selected from the group consisting of metals of Group 4 of the periodic table, metals of Group 5 of the periodic table, metals of Group 6 of the periodic table, and yttrium. The metal oxide forms exceptionally thin layers that are resistant to ashing and HF exposure. Subjecting the etch stop layer to both ashing and HF etch processes removes less than 0.3 nm of the thickness of the etch stop layer, and more preferably less than 0.25 nm. The etch stop layer may be thin and may have a thickness of about 0.5-2 nm. In some embodiments, the etch stop layer comprises tantalum oxide (TaO).
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: February 5, 2019
    Assignee: ASM IP HOLDING B.V.
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed
  • Publication number: 20180350623
    Abstract: The disclosure relates generally to the field of processing substrates, for example comprising materials such as quartz, glass or silicon. The disclosure more particular relates to providing wet etch protection layers comprising boron and carbon and etching the substrate in a hydrogen fluoride aqueous solution. One or more of the boron and carbon containing films can have a thickness of at least 5, preferably 10 and, more preferably 30 nm. The method comprises wet etching the substrate in a hydrofluoric acid solution with a hydrogen fluoride concentration of at least 10 wt. % for at least 5 minutes.
    Type: Application
    Filed: May 31, 2018
    Publication date: December 6, 2018
    Inventors: Dieter Pierreux, Werner Knaepen, Bert Jongbloed