Patents by Inventor Dieter Pierreux

Dieter Pierreux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160240373
    Abstract: In some embodiments, an oxide layer is grown on a semiconductor substrate by oxidizing the semiconductor substrate by exposure to hydrogen peroxide at a process temperature of about 500° C. or less. The exposure to the hydrogen peroxide may continue until the oxide layer grows by a thickness of about 1 ? or more. Where the substrate is a germanium substrate, while oxidation using H2O has been found to form germanium oxide with densities of about 4.25 g/cm3, oxidation according to some embodiments can form an oxide layer with a density of about 6 g/cm3 or more (for example, about 6.27 g/cm3). In some embodiments, another layer of material is deposited directly on the oxide layer. For example, a dielectric layer may be deposited directly on the oxide layer.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 18, 2016
    Inventors: Fu Tang, Michael Givens, Qi Xie, Jan Willem Maes, Bert Jongbloed, Radko G. Bankras, Theodorus G.M. Oosterlaken, Dieter Pierreux, Werner Knaepen, Harald B. Profijt, Cornelius A. van der Jeugd
  • Publication number: 20160148805
    Abstract: A process for depositing aluminum oxynitride (AlON) is disclosed. The process comprises subjecting a substrate to temporally separated exposures to an aluminum precursor and a nitrogen precursor to form an aluminum and nitrogen-containing compound on the substrate. The aluminum and nitrogen-containing compound is subsequently exposed to an oxygen precursor to form AlON. The temporally separated exposures to an aluminum precursor and a nitrogen precursor, and the subsequent exposure to an oxygen precursor together constitute an AlON deposition cycle. A plurality of AlON deposition cycles may be performed to deposit an AlON film of a desired thickness. The deposition may be performed in a batch process chamber, which may accommodate batches of 25 or more substrates. The deposition may be performed without exposure to plasma.
    Type: Application
    Filed: November 26, 2014
    Publication date: May 26, 2016
    Inventors: Bert Jongbloed, Dieter Pierreux, Werner Knaepen
  • Publication number: 20160079058
    Abstract: In some embodiments, a nitride film is provided over a semiconductor substrate and densified. The nitride film may be a flowable nitride, which may be deposited to at least partially fill openings in the substrate. Densifying the film is accomplished without exposing the nitride film to plasma by exposing the nitride film to a non-plasma densifying agent in the process chamber. The non-plasma densifying agent may be a nitriding gas, a hydrogen scavenging gas, a silicon precursor, or a combination thereof.
    Type: Application
    Filed: August 19, 2015
    Publication date: March 17, 2016
    Inventors: Bert JONGBLOED, Dieter PIERREUX
  • Publication number: 20150357184
    Abstract: In some embodiments, a reactive curing process may be performed by exposing a semiconductor substrate in a process chamber to an ambient containing hydrogen peroxide, with the pressure in the process chamber at about 300 Torr or less. In some embodiments, the residence time of hydrogen peroxide molecules in the process chamber is about five minutes or less. The curing process temperature may be set at about 500° C. or less. The curing process may be applied to cure flowable dielectric materials and may provide highly uniform curing results, such as across a batch of semiconductor substrates cured in a batch process chamber.
    Type: Application
    Filed: May 21, 2015
    Publication date: December 10, 2015
    Inventors: Bert Jongbloed, Dieter Pierreux, Cornelius A. van der Jeugd, Herbert Terhorst, Lucian Jdira, Radko G. Bankras, Theodorus G.M. Oosterlaken
  • Publication number: 20150287591
    Abstract: Methods of depositing boron and carbon containing films are provided. In some embodiments, methods of depositing B, C films with desirable properties, such as conformality and etch rate, are provided. One or more boron and/or carbon containing precursors can be decomposed on a substrate at a temperature of less than about 400° C. One or more of the boron and carbon containing films can have a thickness of less than about 30 angstroms. Methods of doping a semiconductor substrate are provided. Doping a semiconductor substrate can include depositing a boron and carbon film over the semiconductor substrate by exposing the substrate to a vapor phase boron precursor at a process temperature of about 300° C. to about 450° C., where the boron precursor includes boron, carbon and hydrogen, and annealing the boron and carbon film at a temperature of about 800° C. to about 1200° C.
    Type: Application
    Filed: April 14, 2015
    Publication date: October 8, 2015
    Inventors: Viljami J. Pore, Yosuke Kimura, Kunitoshi Namba, Wataru Adachi, Hideaki Fukuda, Werner Knaepen, Dieter Pierreux, Bert Jongbloed
  • Publication number: 20150279693
    Abstract: In some embodiments, a system is disclosed for delivering hydrogen peroxide to a semiconductor processing chamber. The system includes a process canister for holding a H2O2/H2O mixture in a liquid state, an evaporator provided with an evaporator heater, a first feed line for feeding the liquid H2O2/H2O mixture to the evaporator, and a second feed line for feeding the evaporated H2O2/H2O mixture to the processing chamber, the second feed line provided with a second feed line heater. The evaporator heater is configured to heat the evaporator to a temperature lower than 120° C. and the second feed line heater is configured to heat the feed line to a temperature equal to or higher than the temperature of the evaporator.
    Type: Application
    Filed: March 17, 2015
    Publication date: October 1, 2015
    Inventors: Bert JONGBLOED, Dieter PIERREUX, Cornelius A. van der JEUGD, Lucian JDIRA, Radko G. BANKRAS, Theodorus G.M. OOSTERLAKEN
  • Publication number: 20150249005
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 3, 2015
    Inventors: RAIJA H. MATERO, LINDA LINDROOS, HESSEL SPREY, JAN WILLEM MAES, DAVID DE ROEST, DIETER PIERREUX, KEES VAN DER JEUGD, LUCIA D'URZO, TOM E. BLOMBERG
  • Patent number: 9006112
    Abstract: Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: April 14, 2015
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Linda Lindroos, Hessel Sprey, Jan Willem Maes, David de Roest, Dieter Pierreux, Kees van der Jeugd, Lucia D'Urzo, Tom E. Blomberg
  • Publication number: 20140357090
    Abstract: A process for depositing aluminum nitride is disclosed. The process comprises providing a plurality of semiconductor substrates in a batch process chamber and depositing an aluminum nitride layer on the substrates by performing a plurality of deposition cycles without exposing the substrates to plasma during the deposition cycles. Each deposition cycle comprises flowing an aluminum precursor pulse into the batch process chamber, removing the aluminum precursor from the batch process chamber, and removing the nitrogen precursor from the batch process chamber after flowing the nitrogen precursor and before flowing another pulse of the aluminum precursor. The process chamber may be a hot wall process chamber and the deposition may occur at a deposition pressure of less than 1 Torr.
    Type: Application
    Filed: May 31, 2013
    Publication date: December 4, 2014
    Inventors: Werner Knaepen, Bert Jongbloed, Dieter Pierreux, Peter Zagwijn, Hessel Sprey, Cornelius A. van der Jeugd, Marinus Josephus de Blank, Robin Roelofs, Qi Xie, Jan Willem Maes
  • Patent number: 8633050
    Abstract: A method of manufacturing a solar cell having an effective minority charge carrier lifetime (?eff) of at least 500 ?s, said method comprising: providing a semiconductor wafer; and passivating a surface of said wafer by ALD-depositing a metal oxide layer on said surface by sequentially and alternatingly: (iii) exposing said surface to a first precursor, resulting in a coverage of the surface with the first precursor, and (iv) exposing said surface to a second precursor, resulting in a coverage of the surface with the second precursor, wherein at least one of steps (i) and (ii) is stopped before the coverage of the surface reaches a saturation level.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: January 21, 2014
    Assignee: ASM International N.V.
    Inventor: Dieter Pierreux
  • Publication number: 20130276707
    Abstract: A vertical furnace comprises a substantially cylindrical process tube vertically extending and delimiting a reaction space; a boat for accommodating a plurality of substrates to be vertically spaced apart from each other; a gas inlet system comprising a plurality of distribution tubes disposed at a circumference of the reaction space, wherein each of the distribution tubes have a plurality of gas injection holes distributed over a length of the distribution tubes and the distribution tubes are symmetrically disposed along an entire circumference of the reaction space; and at least one reaction gas source connected to the gas inlet system.
    Type: Application
    Filed: April 23, 2012
    Publication date: October 24, 2013
    Applicant: ASM IP Holding B.V.
    Inventor: Dieter Pierreux
  • Patent number: 8399344
    Abstract: A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric VT adjustment layer, the dielectric VT adjustment layer being a metal oxide or semimetal oxide having a second electronegativity; and forming a gate electrode over the gate dielectric layer and the VT adjustment layer; wherein the Effective Work Function of said gate stack is tuned to a desired value by tuning the thickness and composition of the dielectric VT adjustment layer and wherein the second electronegativity value is higher than both the first electronegativity value and the electronegativity of Al2O3.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: March 19, 2013
    Assignee: ASM International N.V.
    Inventors: Dieter Pierreux, Vladimir Machkaoutsan, Jan Willem Maes
  • Publication number: 20120269962
    Abstract: Methods are disclosed herein for depositing a passivation layer comprising fluorine over a dielectric material that is sensitive to chlorine, bromine, and iodine. The passivation layer can protect the sensitive dielectric layer thereby enabling deposition using precursors comprising chlorine, bromine, and iodine over the passivation layer.
    Type: Application
    Filed: October 14, 2010
    Publication date: October 25, 2012
    Applicant: ASM INTERNATIONAL N.V.
    Inventors: Tom E. Blomberg, Eva E. Tois, Robert Huggare, Jan Willem Maes, Vladimir Machkaoutsan, Dieter Pierreux
  • Publication number: 20120255612
    Abstract: Discloses is a method for depositing a thin metal oxide film on a substrate, comprising: providing a substrate (104); sequentially and alternatingly exposing a surface of said substrate to a first metal precursor and a first oxidant precursor, so as to deposit a first portion (116) of said metal oxide film (114) having a first thickness; and sequentially and alternatingly exposing the surface of the substrate to a second metal precursor and a second oxidant precursor, so as to deposit a second portion (118) of said metal oxide film (114) having a second thickness over said first portion of said metal oxide film, wherein the second oxidant precursor is ozone or oxygen plasma, while the first oxidant precursor is a milder oxidant than ozone. Also disclosed is a solar cell (100) including a metal oxide passivation film (114) deposited by said method.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 11, 2012
    Inventor: Dieter Pierreux
  • Publication number: 20110284079
    Abstract: A method of manufacturing a solar cell having an effective minority charge carrier lifetime (?eff) of at least 500 ?s, said method comprising: providing a semiconductor wafer; and passivating a surface of said wafer by ALD-depositing a metal oxide layer on said surface by sequentially and alternatingly: (iii) exposing said surface to a first precursor, resulting in a coverage of the surface with the first precursor, and (iv) exposing said surface to a second precursor, resulting in a coverage of the surface with the second precursor, wherein at least one of steps (i) and (ii) is stopped before the coverage of the surface reaches a saturation level.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 24, 2011
    Inventor: Dieter Pierreux
  • Publication number: 20110081775
    Abstract: A method for fabricating a semiconductor device comprising a gate stack of a gate dielectric and a gate electrode, the method including forming a gate dielectric layer over a semiconductor substrate the gate dielectric layer being a metal oxide or semimetal oxide having a first electronegativity; forming a dielectric VT adjustment layer, the dielectric VT adjustment layer being a metal oxide or semimetal oxide having a second electronegativity; and forming a gate electrode over the gate dielectric layer and the VT adjustment layer; wherein the Effective Work Function of said gate stack is tuned to a desired value by tuning the thickness and composition of the dielectric VT adjustment layer and wherein the second electronegativity value is higher than both the first electronegativity value and the electronegativity of Al2O3
    Type: Application
    Filed: October 6, 2010
    Publication date: April 7, 2011
    Inventors: Dieter Pierreux, Vladimir Machkaoutsan, Jan Willem Maes
  • Publication number: 20090035946
    Abstract: A method is disclosed depositing multiple layers of different materials in a sequential process within a deposition chamber. A substrate is provided in a deposition chamber. A plurality of cycles of a first atomic layer deposition (ALD) process is sequentially conducted to deposit a layer of a first material on the substrate in the deposition chamber. These first cycles include pulsing a cyclopentadienyl metal precursor. A plurality of cycles of a second ALD process is sequentially conducted to deposit a layer of a second material on the layer of the first material in the deposition chamber. The second material comprises a metal different from the metal in the cyclopentadienyl metal precursor.
    Type: Application
    Filed: July 15, 2008
    Publication date: February 5, 2009
    Inventors: Dieter Pierreux, Bert Jongbloed, Peter Zagwijn