Patents by Inventor Donald C. Abbott

Donald C. Abbott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040140539
    Abstract: A leadframe for use in the assembly of integrated circuit (IC) chips, which has first and second surfaces and a base metal structure (606) with an adherent layer (607) of nickel having a rough, non-reflecting surface covering the base metal. This rough nickel enhances adhesion to molding compounds. An adherent layer (608) of smooth, reflective nickel selectively covers the first surface of the leadframe in areas intended for attachment of bonding wires and the IC chip. This smooth nickel facilitates the use of vision systems. A first adherent metal layer (609) is deposited in selected areas of the first leadframe surface for wire bond attachment, and a second adherent metal layer (610) is deposited to provide attachment to external parts.
    Type: Application
    Filed: January 17, 2003
    Publication date: July 22, 2004
    Inventor: Donald C. Abbott
  • Publication number: 20040113241
    Abstract: A leadframe for use with integrated circuit chips comprising a plated layer of gold selectively covering areas of said leadframe intended for solder attachment; and said gold layer providing a visual distinction to said areas.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 17, 2004
    Inventors: Donald C. Abbott, Paul R. Moehle
  • Patent number: 6724070
    Abstract: A lead frame including a first set of leads in a first plane and a second set of leads in a second plane offset vertically from the second plane. The leads in the first and second planes are offset from each other by a lead width.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: April 20, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Fritzsche, Donald C. Abbott
  • Patent number: 6713852
    Abstract: A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering said base metal; a plated layer of pure tin on said nickel layer, selectively covering areas of said leadframe intended for attachment to other parts; and a plated layer of palladium on said nickel layer, selectively covering areas of said leadframe intended for bonding wire attachment.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: March 30, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Donald C. Abbott, Douglas W. Romm
  • Patent number: 6706561
    Abstract: A method for fabricating a leadframe structure comprising a chip mount pad and a plurality of lead segments, each having a first end near the mount pad and a second end remote from said mount pad. The structure is formed from a sheet-like starting material. In a first plating system, the leadframe is plated with a layer of nickel. Next, the second segment ends are selectively masked and a layer of palladium is selectively plated on the nickel layer on the exposed chip pad and first segments ends in a thickness suitable for wire bonding attachment. In a second plating system, the chip pad and first segment ends are selectively masked and a pure tin layer is selectively plated on the nickel layer on the exposed second segment ends in a thickness suitable for parts attachment.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: March 16, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C. Abbott
  • Patent number: 6683380
    Abstract: An integrated circuit device (10) with a bonding surface (12) directly over its active circuitry, and a method of making such integrated circuits (FIGS. 2A-2E). To make the bonding surface (12), a wafer (20) is provided with vias (24) to its metallization layer (21) and then coated with a seed metal layer (25). A plating pattern (26) is formed on the wafer (20), exposing portions of the seed metal layer (25) and blocking the rest of the seed metal layer (25). These exposed portions are plated with successive metal layers (27, 28, 29), thereby forming a bonding surface (12) having a number of layered stacks (200) that fill the vias (24). The plating pattern and the nonplated portions of the seed metal layer (25) are then removed.
    Type: Grant
    Filed: July 10, 2002
    Date of Patent: January 27, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Taylor R. Efland, Donald C. Abbott, Walter Bucksch, Marco Corsi, Chi-Cheong Shen, John P. Erdeljac, Louis N. Hutter, Quang X. Mai, Konrad Wagensohner, Charles E. Williams, Milton L. Buschbom
  • Publication number: 20030178707
    Abstract: For a semiconductor integrated circuit (IC) leadframe, a base metal sheet (10 in FIG. 3B) of a first metal, including copper, has substantially parallel first (11) and second (12) surfaces and an adherent layer of a second metal 13a and 13b), including nickel, covering both surfaces. A first layer (14) of a third metal, including palladium, adherent to the second metal, is pre-plated on the first surface in a thickness suitable for bonding wire attachment. On the opposite surface, a second layer (15) of the third metal is adherent to the second metal on the second surface in a thickness suitable for parts attachment. Alternatively, a layer of a fourth metal, including tin, is used for parts attachment. The leadframe structure is then stamped from the sheet so that the base metal is exposed at the stamped edges (10a in FIG. 3A). Finally, the exposed base metal is preferentially chemically etched so that it is contoured (10b) for maximum adhesion and imbued with affinity to polymeric compounds.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 25, 2003
    Inventor: Donald C. Abbott
  • Publication number: 20030153129
    Abstract: A method for fabricating a leadframe structure comprising a chip mount pad and a plurality of lead segments, each having a first end near the mount pad and a second end remote from said mount pad. The structure is formed from a sheet-like starting material. In a first plating system, the leadframe is plated with a layer of nickel. Next, the second segment ends are selectively masked and a layer of palladium is selectively plated on the nickel layer on the exposed chip pad and first segments ends in a thickness suitable for wire bonding attachment. In a second plating system, the chip pad and first segment ends are selectively masked and a pure tin layer is selectively plated on the nickel layer on the exposed second segment ends in a thickness suitable for parts attachment.
    Type: Application
    Filed: February 11, 2002
    Publication date: August 14, 2003
    Inventor: Donald C. Abbott
  • Publication number: 20030146497
    Abstract: A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering said base metal; a plated layer of pure tin on said nickel layer, selectively covering areas of said leadframe intended for attachment to other parts; and a plated layer of palladium on said nickel layer, selectively covering areas of said leadframe intended for bonding wire attachment.
    Type: Application
    Filed: February 1, 2002
    Publication date: August 7, 2003
    Inventors: Donald C. Abbott, Douglas W. Romm
  • Publication number: 20030137032
    Abstract: A leadframe for use with integrated circuit chips comprising a base metal, usually copper or a copper alloy, having a modified surface adapted to provide bondability and solderability and adhesion to polymeric compounds. The modified surface comprises a layer created by converting a percentage of base metal atoms into substitutional metal complexes, usually hydrated chromates. A thin layer of plated copper may be employed for controlling uniformity and consistency of the replacement reaction.
    Type: Application
    Filed: November 20, 2002
    Publication date: July 24, 2003
    Inventor: Donald C. Abbott
  • Patent number: 6583500
    Abstract: A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering the base metal and a plated layer of pure tin, only </=0.5 &mgr;m thick, on the nickel layer, selectively covering areas of the leadframe intended for attachment to other parts. For devices with gull-wing-shaped leads, these pre-plated tin areas cover only the external lead surface intended to face an outside part, and the lead edges. Further, a plated layer of palladium on the nickel layer selectively covers areas of the leadframe intended for bonding wire attachment.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: June 24, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Donald C. Abbott, Douglas W. Romm
  • Publication number: 20030094689
    Abstract: An electrical apparatus having resistance to atmospheric effects includes at least one electrical device and a packaging structure. The packaging structure substantially encloses the at least one electrical device. The packaging structure includes a corrosion-resisting agent.
    Type: Application
    Filed: November 16, 2001
    Publication date: May 22, 2003
    Inventors: Donald C. Abbott, Douglas W. Romm
  • Patent number: 6545342
    Abstract: A leadframe for use with integrated circuit chips comprising a base metal, usually copper or a copper alloy, having a modified surface adapted to provide bondability and solderability and adhesion to polymeric compounds. The modified surface comprises a layer created by converting a percentage of base metal atoms into substitutional metal complexes, usually hydrated chromates. A thin layer of plated copper may be employed for controlling uniformity and consistency of the replacement reaction.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: April 8, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C. Abbott
  • Patent number: 6545344
    Abstract: A leadframe for use with integrated circuit chips comprising a base metal having a plated layer of nickel fully covering said base metal; a plated layer of lead-free solder on said nickel layer, selectively covering areas of said leadframe intended for attachment to other parts; and a plated layer of palladium on said nickel layer, selectively covering areas of said leadframe intended for bonding wire attachment.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: April 8, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C. Abbott
  • Publication number: 20030036256
    Abstract: An integrated circuit device (10) with a bonding surface (12) directly over its active circuitry, and a method of making such integrated circuits (FIGS. 2A-2E). To make the bonding surface (12), a wafer (20) is provided with vias (24) to its metallization layer (21) and then coated with a seed metal layer (25). A plating pattern (26) is formed on the wafer (20), exposing portions of the seed metal layer (25) and blocking the rest of the seed metal layer (25). These exposed portions are plated with successive metal layers (27, 28, 29), thereby forming a bonding surface (12) having a number of layered stacks (200) that fill the vias (24). The plating pattern and the nonplated portions of the seed metal layer (25) are then removed.
    Type: Application
    Filed: July 10, 2002
    Publication date: February 20, 2003
    Inventors: Taylor R. Efland, Donald C. Abbott, Walter Bucksch, Marco Corsi, Chi-Cheong Shen, John P. Erdeljac, Louis N. Hutter, Quang X. Mai, Konrad Wagensohner, Charles E. Williams, Milton L. Buschbom
  • Publication number: 20030011048
    Abstract: A leadframe for use with integrated circuit chips comprising a plated layer of gold selectively covering areas of said leadframe intended for solder attachment; and said gold layer providing a visual distinction to said areas.
    Type: Application
    Filed: March 14, 2000
    Publication date: January 16, 2003
    Inventors: Donald C. Abbott, Paul R. Moehle
  • Publication number: 20020153597
    Abstract: The invention is a lead frame that has leads formed in two levels during the etching process in which the lead frame is formed. A lead frame form (40), or continuous strip of lead frame material, is coated on two sides with a photo resist material (41,43). Each photo resist coated side is patterned to define leads on the lead frame. The lead patterns (41,43, 42,44) on the two sides are offset from each other so that patterns on one side of the lead frame material alternate with the patterns on the other side of the lead frame material. Both sides of the photo resist patterned lead frame material are etched to a depth exceeding the thickness of a lead. The photo resist (41,43) material is then removed. The resulting lead frame has leads (50-56) that are in two levels, each level having leads offset by a lead width from the other level, but with an effective zero distance between leads horizontally.
    Type: Application
    Filed: June 12, 2002
    Publication date: October 24, 2002
    Inventors: Robert M. Fritzsche, Donald C. Abbott
  • Patent number: 6429050
    Abstract: The invention is a lead frame that has leads formed in two levels during the etching process in which the lead frame is formed. A lead frame form (40), or continuous strip of lead frame material, is coated on two sides with a photo resist material (41,43). Each photo resist coated side is patterned to define leads on the lead frame. The lead patterns (41,43, 42,44) on the two sides are offset from each other so that patterns on one side of the lead frame material alternate with the patterns on the other side of the lead frame material. Both sides of the photo resist patterned lead frame material are etched to a depth exceeding the thickness of a lead. The photo resist (41,43) material is then removed. The resulting lead frame has leads (50-56)that are in two levels, each level having leads offset by a lead width from the other level, but with an effective zero distance between leads horizontally.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: August 6, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Fritzsche, Donald C. Abbott
  • Publication number: 20020070434
    Abstract: A leadframe for use in the assembly of integrated circuit chips comprising a base metal structure having an adherent layer of nickel covering said base metal; an adherent film of palladium on said nickel layer; and an adherent layer of palladium on said palladium film, selectively covering areas of said leadframe suitable for bonding wire attachment and solder attachment.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 13, 2002
    Inventors: Donald C. Abbott, Michael E. Mitchell, Paul R. Moehle, Douglas W. Romm
  • Patent number: 6376901
    Abstract: A leadframe for use with integrated circuit chips Comprising a base metal having a plated layer of nickel fully covering said base metal; a plated layer of palladium on said nickel layer, selectively covering areas of said leadframe intended for bonding wire attachment; and a plated layer of solder on said nickel layer, selectively covering areas of said leadframe intended for parts attachment.
    Type: Grant
    Filed: June 6, 2000
    Date of Patent: April 23, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Donald C. Abbott