Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A display device is provided. The display device includes a display panel including first and second display substrates that face each other, having an overlap area in which the first and second display substrates overlap with each other, and having a protruding area on one side of the overlap area, a sealing member between the first and second display substrates along edges of the overlap area, and at least one chamfered portion including a first chamfered portion, which is formed on at least one side of the protruding area, and a second chamfered portion, which is formed on the overlap area and adjacent to the first chamfered portion, wherein in the second chamfered portion, an end of the first display substrate is positioned beyond an end of the second display substrate.

Abstract: A display device is provided. The display device includes a display panel including first and second display substrates that face each other, having an overlap area in which the first and second display substrates overlap with each other, and having a protruding area on one side of the overlap area, a sealing member between the first and second display substrates along edges of the overlap area, and at least one chamfered portion including a first chamfered portion, which is formed on at least one side of the protruding area, and a second chamfered portion, which is formed on the overlap area and adjacent to the first chamfered portion, wherein in the second chamfered portion, an end of the first display substrate is positioned beyond an end of the second display substrate.

Abstract: A display device is provided. The display device includes a display panel including first and second display substrates that face each other, having an overlap area in which the first and second display substrates overlap with each other, and having a protruding area on one side of the overlap area, a sealing member between the first and second display substrates along edges of the overlap area, and at least one chamfered portion including a first chamfered portion, which is formed on at least one side of the protruding area, and a second chamfered portion, which is formed on the overlap area and adjacent to the first chamfered portion, wherein in the second chamfered portion, an end of the first display substrate is positioned beyond an end of the second display substrate.

Abstract: A display device is provided. The display device includes a display panel including first and second display substrates that face each other, having an overlap area in which the first and second display substrates overlap with each other, and having a protruding area on one side of the overlap area, a sealing member between the first and second display substrates along edges of the overlap area, and at least one chamfered portion including a first chamfered portion, which is formed on at least one side of the protruding area, and a second chamfered portion, which is formed on the overlap area and adjacent to the first chamfered portion, wherein in the second chamfered portion, an end of the first display substrate is positioned beyond an end of the second display substrate.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: Disclosed is a gas vehicle injector having improved lubrication characteristics. The injector is provided with a housing installed at a fuel supply pipe of an engine, a needle valve installed at a lower portion of the housing and having an injection nozzle, a coil installed inside the housing and generating a magnetomotive force by receiving electric power, a solenoid having a core generating an attractive force by the magnetomotive force, and a plunger reciprocating and installed below the solenoid, and the injector includes: a depression groove circumferentially formed on an inner circumferential surface of the housing; and a communication groove formed on the inner circumferential surface of the housing, and communicating with the depression groove.

Abstract: A display device is provided. The display device includes a display panel including first and second display substrates that face each other, having an overlap area in which the first and second display substrates overlap with each other, and having a protruding area on one side of the overlap area, a sealing member between the first and second display substrates along edges of the overlap area, and at least one chamfered portion including a first chamfered portion, which is formed on at least one side of the protruding area, and a second chamfered portion, which is formed on the overlap area and adjacent to the first chamfered portion, wherein in the second chamfered portion, an end of the first display substrate is positioned beyond an end of the second display substrate.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: Disclosed is a compressed natural gas injector. The injector includes: a housing provided at a fuel supply pipe of an engine; a needle valve provided at a lower portion of the housing, and having an injection nozzle; a solenoid having a coil provided in the housing and generating a magnetomotive force by receiving power, and a core generating an attraction force due to the magnetomotive force; a reciprocating plunger provided below the solenoid; and an elastic member placed on the plunger and including a contact portion provided in parallel to a lower surface of the core, and a protruding portion inclinedly protruding upwards and outwards from the contact portion.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract: A thin film transistor substrate includes the following elements: a base substrate, a data line disposed on the base substrate, a source electrode contacting the data line, a drain electrode spaced from the source electrode, a channel disposed between the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a gate insulation pattern disposed on the channel, and a gate electrode disposed on the gate insulation pattern.

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A thin film transistor array panel may include a channel layer including an oxide semiconductor and formed in a semiconductor layer, a source electrode formed in the semiconductor layer and connected to the channel layer at a first side, a drain electrode formed in the semiconductor layer and connected to the channel layer at an opposing second side, a pixel electrode formed in the semiconductor layer in a same portion of the semiconductor layer as the drain electrode, an insulating layer disposed on the channel layer, a gate line including a gate electrode disposed on the insulating layer, a passivation layer disposed on the source and drain electrodes, the pixel electrode, and the gate line, and a data line disposed on the passivation layer. A width of the channel layer may be substantially equal to a width of the pixel electrode in a direction parallel to the gate line.

Abstract: A thin film transistor includes a bottom gate electrode, a top gate electrode and an active pattern. The top gate electrode includes a transparent conductive material and overlaps with the bottom gate electrode. A boundary of the bottom gate electrode and a boundary of the top gate electrode are coincident with each other in a cross-sectional view. The active pattern includes a source portion, a drain portion and a channel portion disposed between the source portion and the drain portion. The channel portion overlaps with the bottom gate electrode and the top gate electrode.