Abstract: An apparatus and method of forming the same including, in one embodiment, a printed circuit board and a semiconductor device coupled to the printed circuit board. The apparatus also includes a decoupling device coupled to the printed circuit board and positioned under the semiconductor device.

Abstract: A semiconductor device and method of forming the same including, in one embodiment, a semiconductor die formed with a plurality of laterally diffused metal oxide semiconductor (“LDMOS”) cells, and a metallic layer electrically coupled to the plurality of LDMOS cells. The semiconductor device also includes a plurality of gate drivers positioned along a periphery of the semiconductor die and electrically coupled to gates of the plurality of LDMOS cells through the metallic layer.

Abstract: A semiconductor device and method of forming the same including, in one embodiment, a semiconductor die formed with a plurality of laterally diffused metal oxide semiconductor (“LDMOS”) cells. The semiconductor device also includes a redistribution layer electrically coupled to the plurality of LDMOS cells and a plurality of metallic pillars distributed over and electrically coupled to the redistribution layer.

Abstract: A semiconductor device and method of forming the same including, in one embodiment, a substrate and a plurality of source and drain regions formed as alternating pattern on the substrate. The semiconductor device also includes a plurality of gates formed over the substrate between and parallel to ones of the plurality of source and drain regions. The semiconductor device also includes a first plurality of alternating source and drain metallic strips formed in a first metallic layer above the substrate and parallel to and forming an electrical contact with respective ones of the plurality of source and drain regions.

Abstract: A power converter and method of controlling the same for selected modes of operation. In one embodiment, the power converter includes a first power switch coupled to a source of electrical power and a second power switch coupled to the first power switch and to an output terminal of the power converter. The power converter also includes a controller configured to control an operation of the first and second power switches during selected modes of operation.

Abstract: Embodiments of the invention can provide systems and methods for determining a target exhaust temperature for gas turbines. In one embodiment of the disclosure, there is disclosed a method for determining a target exhaust temperature for a gas turbine. The method can include determining a target exhaust temperature based at least in part on a compressor pressure condition; determining a temperature adjustment to the target exhaust temperature based at least in part on steam humidity; and changing the target exhaust temperature based at least in part on the temperature adjustment.

Abstract: A power converter and method of controlling the same for selected modes of operation. In one embodiment, the power converter includes a first power switch coupled to a source of electrical power and a second power switch coupled to the first power switch and to an output terminal of the power converter. The power converter also includes a controller configured to control an operation of the first and second power switches during selected modes of operation.

Abstract: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region and a portion of the lightly or heavily doped region of the source/drain. The transistor also includes a channel extension, within the oppositely doped well, under the channel region and extending under a portion of the lightly or heavily doped region of the source/drain.

Abstract: Provided are methods for producing a reprogrammed fibroblast or epithelial cell. The methods include growing a plurality of fibroblasts or epithelial cells in monolayer culture to confluency; and disrupting the monolayer culture to place at least a fraction of the plurality of fibroblasts or epithelial cells into suspension culture under conditions sufficient to form one or more embryoid body-like spheres, wherein the one or more embryoid body-like spheres comprise one or more reprogrammed fibroblasts or epithelial cells that express one or more markers not expressed prior to the disrupting step. Also provided are reprogrammed fibroblasts or epithelial cells produced by the disclosed methods, formulations that include reprogrammed fibroblasts or epithelial cells, methods for using the reprogrammed fibroblasts or epithelial cells, methods for producing chimeric non-human mammals that include one or more sphere-induced Pluripotent Cells (siPS), and chimeric non-human mammals produced thereby.

Abstract: An aerospace vessel including a fuselage, a means for causing the fuselage to fly coupled to the fuselage, and an environmental control system within the fuselage. The environmental control system includes a duct made of closed cell thermoplastic foam, such as polyvinylidene fluoride foam.

Abstract: Embodiments can provide systems and methods for detecting fuel leaks in gas turbine engines. According to one embodiment, there is disclosed a method for detecting a fuel leak in a gas turbine engine. The method may include adjusting a control valve to correspond with a desired fuel flow. The method may also include determining an actual fuel flow based at least in part on an upstream pressure in a fuel manifold and one or more gas turbine engine parameters. The method may also include comparing the desired fuel flow with the actual fuel flow. Moreover, the method may include determining a difference between the desired fuel flow and the actual fuel flow, wherein the difference indicates a fuel leak.

Abstract: A power converter and method of controlling the same for selected modes of operation. In one embodiment, the power converter includes a first power switch coupled to a source of electrical power and a second power switch coupled to the first power switch and to an output terminal of the power converter. The power converter also includes a controller configured to control an operation of the first and second power switches during selected modes of operation.

Abstract: A drop emitting apparatus may include a drop generator having a piezoelectric element and configured to receive a drop firing waveform having a drop firing voltage pulse during a drop ejection period. A poling waveform may be applied to the drop generator during a poling period that occurs before the drop ejection period, the poling waveform having a poling voltage pulse that has a longer duration than that of the drop firing voltage pulse.

Abstract: A power converter and method of controlling the same for selected modes of operation. In one embodiment, the power converter includes a first power switch coupled to a source of electrical power and a second power switch coupled to the first power switch and to an output terminal of the power converter. The power converter also includes a controller configured to control an operation of the first and second power switches during selected modes of operation.

Abstract: A module having a stacked magnetic device and semiconductor device, and method of forming the same. In one embodiment, the module includes a printed wiring board including a patterned conductor formed on an upper surface thereof. The module also includes a magnetic core mounted on the upper surface of the printed wiring board proximate the patterned conductor and a semiconductor device mounted on an upper surface of the magnetic core.

Abstract: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region and a portion of the lightly or heavily doped region of the source/drain. The transistor also includes a channel extension, within the oppositely doped well, under the channel region and extending under a portion of the lightly or heavily doped region of the source/drain.

Abstract: A module having a stacked magnetic device and semiconductor device, and method of forming the same. In one embodiment, the module includes a printed wiring board including a patterned conductor formed on an upper surface thereof. The module also includes a magnetic core mounted on the upper surface of the printed wiring board proximate the patterned conductor and a semiconductor device mounted on an upper surface of the magnetic core.

Abstract: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region and a portion of the lightly or heavily doped region of the source/drain. The transistor also includes a channel extension, within the oppositely doped well, under the channel region and extending under a portion of the lightly or heavily doped region of the source/drain.

Abstract: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region and a portion of the lightly or heavily doped region of the source/drain. The transistor also includes a channel extension, within the oppositely doped well, under the channel region and extending under a portion of the lightly or heavily doped region of the source/drain.

Abstract: An integrated circuit with a transistor advantageously embodied in a laterally diffused metal oxide semiconductor device having a gate located over a channel region recessed into a semiconductor substrate and a method of forming the same. In one embodiment, the transistor includes a source/drain including a lightly or heavily doped region adjacent the channel region, and an oppositely doped well extending under the channel region and a portion of the lightly or heavily doped region of the source/drain. The transistor also includes a channel extension, within the oppositely doped well, under the channel region and extending under a portion of the lightly or heavily doped region of the source/drain.